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@@ -69,9 +69,11 @@ def _intstobits(*ints): |
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return ''.join(r) |
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import vlanmang |
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def checkchanges(module): |
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mod = importlib.import_module(module) |
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mods = [ i for i in mod.__dict__.itervalues() if isinstance(i, SwitchConfig) ] |
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mods = [ i for i in mod.__dict__.itervalues() if isinstance(i, vlanmang.SwitchConfig) ] |
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res = [] |
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@@ -121,7 +123,7 @@ def getpvidmapping(data, lookupfun): |
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res = [] |
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for id in data: |
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for i in data[id]['u']: |
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for i in data[id].get('u', []): |
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if isinstance(i, str): |
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i = lookupfun(i) |
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res.append((i, id)) |
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@@ -131,15 +133,15 @@ def getpvidmapping(data, lookupfun): |
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def getegress(data, lookupfun): |
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r = {} |
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for id in data: |
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r[id] = _intstobits(*(getidxs(data[id]['u'], lookupfun) + |
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getidxs(data[id].get('t', []), lookupfun))) |
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r[id] = _intstobits(*(getidxs(data[id].get('u', []), |
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lookupfun) + getidxs(data[id].get('t', []), lookupfun))) |
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return r |
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def getuntagged(data, lookupfun): |
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r = {} |
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for id in data: |
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r[id] = _intstobits(*getidxs(data[id]['u'], lookupfun)) |
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r[id] = _intstobits(*getidxs(data[id].get('u', []), lookupfun)) |
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return r |
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@@ -149,7 +151,7 @@ def getportlist(data, lookupfun): |
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res = set() |
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for id in data: |
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res.update(data[id]['u']) |
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res.update(data[id].get('u', [])) |
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res.update(data[id].get('t', [])) |
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# filter out the strings |
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@@ -230,7 +232,7 @@ class SNMPSwitch(object): |
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ObjectType(oid), |
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lexicographicMode=False): |
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if errorInd: # pragma: no cover |
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raise ValueError(errorIndication) |
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raise ValueError(errorInd) |
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elif errorStatus: # pragma: no cover |
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raise ValueError('%s at %s' % (errorStatus.prettyPrint(), errorIndex and varBinds[int(errorIndex)-1][0] or '?')) |
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else: |
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@@ -299,6 +301,9 @@ class SNMPSwitch(object): |
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return r |
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if __name__ == '__main__': # pragma: no cover |
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print `checkchanges('data')` |
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class _TestMisc(unittest.TestCase): |
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def setUp(self): |
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import test_data |
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@@ -319,14 +324,17 @@ class _TestMisc(unittest.TestCase): |
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data = { |
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1: { |
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'u': [ 1, 5, 10 ] + range(13, 20), |
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't': [ 'lag2', 6, 7 ] |
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't': [ 'lag2', 6, 7 ], |
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}, |
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10: { |
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'u': [ 2, 3, 6, 7, 8, 'lag2' ], |
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}, |
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13: { |
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'u': [ 4, 9 ], |
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't': [ 'lag2', 6, 7 ] |
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't': [ 'lag2', 6, 7 ], |
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}, |
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14: { |
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't': [ 'lag2' ], |
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}, |
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} |
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lookup = { |
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@@ -351,6 +359,7 @@ class _TestMisc(unittest.TestCase): |
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1: '1000111001001111111' + '0' * (30 - 20) + '1', |
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10: '01100111' + '0' * (30 - 9) + '1', |
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13: '000101101' + '0' * (30 - 10) + '1', |
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14: '0' * (30 - 1) + '1', |
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} |
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self.assertEqual(getegress(data, lufun), checkegress) |
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@@ -359,6 +368,7 @@ class _TestMisc(unittest.TestCase): |
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1: '1000100001001111111', |
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10: '01100111' + '0' * (30 - 9) + '1', |
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13: '000100001', |
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14: '', |
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} |
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self.assertEqual(getuntagged(data, lufun), checkuntagged) |
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