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  1. /**
  2. ******************************************************************************
  3. * @file stm32h7xx_hal_dfsdm.c
  4. * @author MCD Application Team
  5. * @brief This file provides firmware functions to manage the following
  6. * functionalities of the Digital Filter for Sigma-Delta Modulators
  7. * (DFSDM) peripherals:
  8. * + Initialization and configuration of channels and filters
  9. * + Regular channels configuration
  10. * + Injected channels configuration
  11. * + Regular/Injected Channels DMA Configuration
  12. * + Interrupts and flags management
  13. * + Analog watchdog feature
  14. * + Short-circuit detector feature
  15. * + Extremes detector feature
  16. * + Clock absence detector feature
  17. * + Break generation on analog watchdog or short-circuit event
  18. *
  19. @verbatim
  20. ==============================================================================
  21. ##### How to use this driver #####
  22. ==============================================================================
  23. [..]
  24. *** Channel initialization ***
  25. ==============================
  26. [..]
  27. (#) User has first to initialize channels (before filters initialization).
  28. (#) As prerequisite, fill in the HAL_DFSDM_ChannelMspInit() :
  29. (++) Enable DFSDMz clock interface with __HAL_RCC_DFSDMz_CLK_ENABLE().
  30. (++) Enable the clocks for the DFSDMz GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().
  31. (++) Configure these DFSDMz pins in alternate mode using HAL_GPIO_Init().
  32. (++) If interrupt mode is used, enable and configure DFSDMz_FLT0 global
  33. interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
  34. (#) Configure the output clock, input, serial interface, analog watchdog,
  35. offset and data right bit shift parameters for this channel using the
  36. HAL_DFSDM_ChannelInit() function.
  37. *** Channel clock absence detector ***
  38. ======================================
  39. [..]
  40. (#) Start clock absence detector using HAL_DFSDM_ChannelCkabStart() or
  41. HAL_DFSDM_ChannelCkabStart_IT().
  42. (#) In polling mode, use HAL_DFSDM_ChannelPollForCkab() to detect the clock
  43. absence.
  44. (#) In interrupt mode, HAL_DFSDM_ChannelCkabCallback() will be called if
  45. clock absence is detected.
  46. (#) Stop clock absence detector using HAL_DFSDM_ChannelCkabStop() or
  47. HAL_DFSDM_ChannelCkabStop_IT().
  48. (#) Please note that the same mode (polling or interrupt) has to be used
  49. for all channels because the channels are sharing the same interrupt.
  50. (#) Please note also that in interrupt mode, if clock absence detector is
  51. stopped for one channel, interrupt will be disabled for all channels.
  52. *** Channel short circuit detector ***
  53. ======================================
  54. [..]
  55. (#) Start short circuit detector using HAL_DFSDM_ChannelScdStart() or
  56. or HAL_DFSDM_ChannelScdStart_IT().
  57. (#) In polling mode, use HAL_DFSDM_ChannelPollForScd() to detect short
  58. circuit.
  59. (#) In interrupt mode, HAL_DFSDM_ChannelScdCallback() will be called if
  60. short circuit is detected.
  61. (#) Stop short circuit detector using HAL_DFSDM_ChannelScdStop() or
  62. or HAL_DFSDM_ChannelScdStop_IT().
  63. (#) Please note that the same mode (polling or interrupt) has to be used
  64. for all channels because the channels are sharing the same interrupt.
  65. (#) Please note also that in interrupt mode, if short circuit detector is
  66. stopped for one channel, interrupt will be disabled for all channels.
  67. *** Channel analog watchdog value ***
  68. =====================================
  69. [..]
  70. (#) Get analog watchdog filter value of a channel using
  71. HAL_DFSDM_ChannelGetAwdValue().
  72. *** Channel offset value ***
  73. =====================================
  74. [..]
  75. (#) Modify offset value of a channel using HAL_DFSDM_ChannelModifyOffset().
  76. *** Filter initialization ***
  77. =============================
  78. [..]
  79. (#) After channel initialization, user has to init filters.
  80. (#) As prerequisite, fill in the HAL_DFSDM_FilterMspInit() :
  81. (++) If interrupt mode is used , enable and configure DFSDMz_FLTx global
  82. interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
  83. Please note that DFSDMz_FLT0 global interrupt could be already
  84. enabled if interrupt is used for channel.
  85. (++) If DMA mode is used, configure DMA with HAL_DMA_Init() and link it
  86. with DFSDMz filter handle using __HAL_LINKDMA().
  87. (#) Configure the regular conversion, injected conversion and filter
  88. parameters for this filter using the HAL_DFSDM_FilterInit() function.
  89. *** Filter regular channel conversion ***
  90. =========================================
  91. [..]
  92. (#) Select regular channel and enable/disable continuous mode using
  93. HAL_DFSDM_FilterConfigRegChannel().
  94. (#) Start regular conversion using HAL_DFSDM_FilterRegularStart(),
  95. HAL_DFSDM_FilterRegularStart_IT(), HAL_DFSDM_FilterRegularStart_DMA() or
  96. HAL_DFSDM_FilterRegularMsbStart_DMA().
  97. (#) In polling mode, use HAL_DFSDM_FilterPollForRegConversion() to detect
  98. the end of regular conversion.
  99. (#) In interrupt mode, HAL_DFSDM_FilterRegConvCpltCallback() will be called
  100. at the end of regular conversion.
  101. (#) Get value of regular conversion and corresponding channel using
  102. HAL_DFSDM_FilterGetRegularValue().
  103. (#) In DMA mode, HAL_DFSDM_FilterRegConvHalfCpltCallback() and
  104. HAL_DFSDM_FilterRegConvCpltCallback() will be called respectively at the
  105. half transfer and at the transfer complete. Please note that
  106. HAL_DFSDM_FilterRegConvHalfCpltCallback() will be called only in DMA
  107. circular mode.
  108. (#) Stop regular conversion using HAL_DFSDM_FilterRegularStop(),
  109. HAL_DFSDM_FilterRegularStop_IT() or HAL_DFSDM_FilterRegularStop_DMA().
  110. *** Filter injected channels conversion ***
  111. ===========================================
  112. [..]
  113. (#) Select injected channels using HAL_DFSDM_FilterConfigInjChannel().
  114. (#) Start injected conversion using HAL_DFSDM_FilterInjectedStart(),
  115. HAL_DFSDM_FilterInjectedStart_IT(), HAL_DFSDM_FilterInjectedStart_DMA() or
  116. HAL_DFSDM_FilterInjectedMsbStart_DMA().
  117. (#) In polling mode, use HAL_DFSDM_FilterPollForInjConversion() to detect
  118. the end of injected conversion.
  119. (#) In interrupt mode, HAL_DFSDM_FilterInjConvCpltCallback() will be called
  120. at the end of injected conversion.
  121. (#) Get value of injected conversion and corresponding channel using
  122. HAL_DFSDM_FilterGetInjectedValue().
  123. (#) In DMA mode, HAL_DFSDM_FilterInjConvHalfCpltCallback() and
  124. HAL_DFSDM_FilterInjConvCpltCallback() will be called respectively at the
  125. half transfer and at the transfer complete. Please note that
  126. HAL_DFSDM_FilterInjConvCpltCallback() will be called only in DMA
  127. circular mode.
  128. (#) Stop injected conversion using HAL_DFSDM_FilterInjectedStop(),
  129. HAL_DFSDM_FilterInjectedStop_IT() or HAL_DFSDM_FilterInjectedStop_DMA().
  130. *** Filter analog watchdog ***
  131. ==============================
  132. [..]
  133. (#) Start filter analog watchdog using HAL_DFSDM_FilterAwdStart_IT().
  134. (#) HAL_DFSDM_FilterAwdCallback() will be called if analog watchdog occurs.
  135. (#) Stop filter analog watchdog using HAL_DFSDM_FilterAwdStop_IT().
  136. *** Filter extreme detector ***
  137. ===============================
  138. [..]
  139. (#) Start filter extreme detector using HAL_DFSDM_FilterExdStart().
  140. (#) Get extreme detector maximum value using HAL_DFSDM_FilterGetExdMaxValue().
  141. (#) Get extreme detector minimum value using HAL_DFSDM_FilterGetExdMinValue().
  142. (#) Start filter extreme detector using HAL_DFSDM_FilterExdStop().
  143. *** Filter conversion time ***
  144. ==============================
  145. [..]
  146. (#) Get conversion time value using HAL_DFSDM_FilterGetConvTimeValue().
  147. *** Callback registration ***
  148. =============================
  149. [..]
  150. The compilation define USE_HAL_DFSDM_REGISTER_CALLBACKS when set to 1
  151. allows the user to configure dynamically the driver callbacks.
  152. Use functions HAL_DFSDM_Channel_RegisterCallback(),
  153. HAL_DFSDM_Filter_RegisterCallback() or
  154. HAL_DFSDM_Filter_RegisterAwdCallback() to register a user callback.
  155. [..]
  156. Function HAL_DFSDM_Channel_RegisterCallback() allows to register
  157. following callbacks:
  158. (+) CkabCallback : DFSDM channel clock absence detection callback.
  159. (+) ScdCallback : DFSDM channel short circuit detection callback.
  160. (+) MspInitCallback : DFSDM channel MSP init callback.
  161. (+) MspDeInitCallback : DFSDM channel MSP de-init callback.
  162. [..]
  163. This function takes as parameters the HAL peripheral handle, the Callback ID
  164. and a pointer to the user callback function.
  165. [..]
  166. Function HAL_DFSDM_Filter_RegisterCallback() allows to register
  167. following callbacks:
  168. (+) RegConvCpltCallback : DFSDM filter regular conversion complete callback.
  169. (+) RegConvHalfCpltCallback : DFSDM filter half regular conversion complete callback.
  170. (+) InjConvCpltCallback : DFSDM filter injected conversion complete callback.
  171. (+) InjConvHalfCpltCallback : DFSDM filter half injected conversion complete callback.
  172. (+) ErrorCallback : DFSDM filter error callback.
  173. (+) MspInitCallback : DFSDM filter MSP init callback.
  174. (+) MspDeInitCallback : DFSDM filter MSP de-init callback.
  175. [..]
  176. This function takes as parameters the HAL peripheral handle, the Callback ID
  177. and a pointer to the user callback function.
  178. [..]
  179. For specific DFSDM filter analog watchdog callback use dedicated register callback:
  180. HAL_DFSDM_Filter_RegisterAwdCallback().
  181. [..]
  182. Use functions HAL_DFSDM_Channel_UnRegisterCallback() or
  183. HAL_DFSDM_Filter_UnRegisterCallback() to reset a callback to the default
  184. weak function.
  185. [..]
  186. HAL_DFSDM_Channel_UnRegisterCallback() takes as parameters the HAL peripheral handle,
  187. and the Callback ID.
  188. [..]
  189. This function allows to reset following callbacks:
  190. (+) CkabCallback : DFSDM channel clock absence detection callback.
  191. (+) ScdCallback : DFSDM channel short circuit detection callback.
  192. (+) MspInitCallback : DFSDM channel MSP init callback.
  193. (+) MspDeInitCallback : DFSDM channel MSP de-init callback.
  194. [..]
  195. HAL_DFSDM_Filter_UnRegisterCallback() takes as parameters the HAL peripheral handle,
  196. and the Callback ID.
  197. [..]
  198. This function allows to reset following callbacks:
  199. (+) RegConvCpltCallback : DFSDM filter regular conversion complete callback.
  200. (+) RegConvHalfCpltCallback : DFSDM filter half regular conversion complete callback.
  201. (+) InjConvCpltCallback : DFSDM filter injected conversion complete callback.
  202. (+) InjConvHalfCpltCallback : DFSDM filter half injected conversion complete callback.
  203. (+) ErrorCallback : DFSDM filter error callback.
  204. (+) MspInitCallback : DFSDM filter MSP init callback.
  205. (+) MspDeInitCallback : DFSDM filter MSP de-init callback.
  206. [..]
  207. For specific DFSDM filter analog watchdog callback use dedicated unregister callback:
  208. HAL_DFSDM_Filter_UnRegisterAwdCallback().
  209. [..]
  210. By default, after the call of init function and if the state is RESET
  211. all callbacks are reset to the corresponding legacy weak functions:
  212. examples HAL_DFSDM_ChannelScdCallback(), HAL_DFSDM_FilterErrorCallback().
  213. Exception done for MspInit and MspDeInit callbacks that are respectively
  214. reset to the legacy weak functions in the init and de-init only when these
  215. callbacks are null (not registered beforehand).
  216. If not, MspInit or MspDeInit are not null, the init and de-init keep and use
  217. the user MspInit/MspDeInit callbacks (registered beforehand)
  218. [..]
  219. Callbacks can be registered/unregistered in READY state only.
  220. Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
  221. in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
  222. during the init/de-init.
  223. In that case first register the MspInit/MspDeInit user callbacks using
  224. HAL_DFSDM_Channel_RegisterCallback() or
  225. HAL_DFSDM_Filter_RegisterCallback() before calling init or de-init function.
  226. [..]
  227. When The compilation define USE_HAL_DFSDM_REGISTER_CALLBACKS is set to 0 or
  228. not defined, the callback registering feature is not available
  229. and weak callbacks are used.
  230. @endverbatim
  231. ******************************************************************************
  232. * @attention
  233. *
  234. * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  235. * All rights reserved.</center></h2>
  236. *
  237. * This software component is licensed by ST under BSD 3-Clause license,
  238. * the "License"; You may not use this file except in compliance with the
  239. * License. You may obtain a copy of the License at:
  240. * opensource.org/licenses/BSD-3-Clause
  241. *
  242. ******************************************************************************
  243. */
  244. /* Includes ------------------------------------------------------------------*/
  245. #include "stm32h7xx_hal.h"
  246. /** @addtogroup STM32H7xx_HAL_Driver
  247. * @{
  248. */
  249. #ifdef HAL_DFSDM_MODULE_ENABLED
  250. /** @defgroup DFSDM DFSDM
  251. * @brief DFSDM HAL driver module
  252. * @{
  253. */
  254. /* Private typedef -----------------------------------------------------------*/
  255. /* Private define ------------------------------------------------------------*/
  256. /** @defgroup DFSDM_Private_Define DFSDM Private Define
  257. * @{
  258. */
  259. #define DFSDM_FLTCR1_MSB_RCH_OFFSET 8
  260. #define DFSDM_MSB_MASK 0xFFFF0000U
  261. #define DFSDM_LSB_MASK 0x0000FFFFU
  262. #define DFSDM_CKAB_TIMEOUT 5000U
  263. #define DFSDM1_CHANNEL_NUMBER 8U
  264. #if defined(DFSDM2_Channel0)
  265. #define DFSDM2_CHANNEL_NUMBER 2U
  266. #endif /* DFSDM2_Channel0 */
  267. /**
  268. * @}
  269. */
  270. /* Private macro -------------------------------------------------------------*/
  271. /* Private variables ---------------------------------------------------------*/
  272. /** @defgroup DFSDM_Private_Variables DFSDM Private Variables
  273. * @{
  274. */
  275. static __IO uint32_t v_dfsdm1ChannelCounter = 0;
  276. static DFSDM_Channel_HandleTypeDef *a_dfsdm1ChannelHandle[DFSDM1_CHANNEL_NUMBER] = {NULL};
  277. #if defined(DFSDM2_Channel0)
  278. static __IO uint32_t v_dfsdm2ChannelCounter = 0;
  279. static DFSDM_Channel_HandleTypeDef *a_dfsdm2ChannelHandle[DFSDM2_CHANNEL_NUMBER] = {NULL};
  280. #endif /* DFSDM2_Channel0 */
  281. /**
  282. * @}
  283. */
  284. /* Private function prototypes -----------------------------------------------*/
  285. /** @defgroup DFSDM_Private_Functions DFSDM Private Functions
  286. * @{
  287. */
  288. static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels);
  289. static uint32_t DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef *Instance);
  290. static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
  291. static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
  292. static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
  293. static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
  294. static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma);
  295. static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma);
  296. static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma);
  297. static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma);
  298. static void DFSDM_DMAError(DMA_HandleTypeDef *hdma);
  299. /**
  300. * @}
  301. */
  302. /* Exported functions --------------------------------------------------------*/
  303. /** @defgroup DFSDM_Exported_Functions DFSDM Exported Functions
  304. * @{
  305. */
  306. /** @defgroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions
  307. * @brief Channel initialization and de-initialization functions
  308. *
  309. @verbatim
  310. ==============================================================================
  311. ##### Channel initialization and de-initialization functions #####
  312. ==============================================================================
  313. [..] This section provides functions allowing to:
  314. (+) Initialize the DFSDM channel.
  315. (+) De-initialize the DFSDM channel.
  316. @endverbatim
  317. * @{
  318. */
  319. /**
  320. * @brief Initialize the DFSDM channel according to the specified parameters
  321. * in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle.
  322. * @param hdfsdm_channel DFSDM channel handle.
  323. * @retval HAL status.
  324. */
  325. HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  326. {
  327. __IO uint32_t *channelCounterPtr;
  328. DFSDM_Channel_HandleTypeDef **channelHandleTable;
  329. DFSDM_Channel_TypeDef *channel0Instance;
  330. /* Check DFSDM Channel handle */
  331. if(hdfsdm_channel == NULL)
  332. {
  333. return HAL_ERROR;
  334. }
  335. /* Check parameters */
  336. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  337. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_channel->Init.OutputClock.Activation));
  338. assert_param(IS_DFSDM_CHANNEL_INPUT(hdfsdm_channel->Init.Input.Multiplexer));
  339. assert_param(IS_DFSDM_CHANNEL_DATA_PACKING(hdfsdm_channel->Init.Input.DataPacking));
  340. assert_param(IS_DFSDM_CHANNEL_INPUT_PINS(hdfsdm_channel->Init.Input.Pins));
  341. assert_param(IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(hdfsdm_channel->Init.SerialInterface.Type));
  342. assert_param(IS_DFSDM_CHANNEL_SPI_CLOCK(hdfsdm_channel->Init.SerialInterface.SpiClock));
  343. assert_param(IS_DFSDM_CHANNEL_FILTER_ORDER(hdfsdm_channel->Init.Awd.FilterOrder));
  344. assert_param(IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(hdfsdm_channel->Init.Awd.Oversampling));
  345. assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset));
  346. assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift));
  347. #if defined(DFSDM2_Channel0)
  348. if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
  349. {
  350. channelCounterPtr = &v_dfsdm1ChannelCounter;
  351. channelHandleTable = a_dfsdm1ChannelHandle;
  352. channel0Instance = DFSDM1_Channel0;
  353. }
  354. else
  355. {
  356. channelCounterPtr = &v_dfsdm2ChannelCounter;
  357. channelHandleTable = a_dfsdm2ChannelHandle;
  358. channel0Instance = DFSDM2_Channel0;
  359. }
  360. #else /* DFSDM2_Channel0 */
  361. channelCounterPtr = &v_dfsdm1ChannelCounter;
  362. channelHandleTable = a_dfsdm1ChannelHandle;
  363. channel0Instance = DFSDM1_Channel0;
  364. #endif /* DFSDM2_Channel0 */
  365. /* Check that channel has not been already initialized */
  366. if (channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)
  367. {
  368. return HAL_ERROR;
  369. }
  370. #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
  371. /* Reset callback pointers to the weak predefined callbacks */
  372. hdfsdm_channel->CkabCallback = HAL_DFSDM_ChannelCkabCallback;
  373. hdfsdm_channel->ScdCallback = HAL_DFSDM_ChannelScdCallback;
  374. /* Call MSP init function */
  375. if(hdfsdm_channel->MspInitCallback == NULL)
  376. {
  377. hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;
  378. }
  379. hdfsdm_channel->MspInitCallback(hdfsdm_channel);
  380. #else
  381. /* Call MSP init function */
  382. HAL_DFSDM_ChannelMspInit(hdfsdm_channel);
  383. #endif
  384. /* Update the channel counter */
  385. (*channelCounterPtr)++;
  386. /* Configure output serial clock and enable global DFSDM interface only for first channel */
  387. if(*channelCounterPtr == 1U)
  388. {
  389. assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));
  390. /* Set the output serial clock source */
  391. channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);
  392. channel0Instance->CHCFGR1 |= hdfsdm_channel->Init.OutputClock.Selection;
  393. /* Reset clock divider */
  394. channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);
  395. if(hdfsdm_channel->Init.OutputClock.Activation == ENABLE)
  396. {
  397. assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
  398. /* Set the output clock divider */
  399. channel0Instance->CHCFGR1 |= (uint32_t)((hdfsdm_channel->Init.OutputClock.Divider - 1U) <<
  400. DFSDM_CHCFGR1_CKOUTDIV_Pos);
  401. }
  402. /* enable the DFSDM global interface */
  403. channel0Instance->CHCFGR1 |= DFSDM_CHCFGR1_DFSDMEN;
  404. }
  405. /* Set channel input parameters */
  406. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK | DFSDM_CHCFGR1_DATMPX |
  407. DFSDM_CHCFGR1_CHINSEL);
  408. hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer |
  409. hdfsdm_channel->Init.Input.DataPacking |
  410. hdfsdm_channel->Init.Input.Pins);
  411. /* Set serial interface parameters */
  412. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP | DFSDM_CHCFGR1_SPICKSEL);
  413. hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.SerialInterface.Type |
  414. hdfsdm_channel->Init.SerialInterface.SpiClock);
  415. /* Set analog watchdog parameters */
  416. hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD | DFSDM_CHAWSCDR_AWFOSR);
  417. hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder |
  418. ((hdfsdm_channel->Init.Awd.Oversampling - 1U) << DFSDM_CHAWSCDR_AWFOSR_Pos));
  419. /* Set channel offset and right bit shift */
  420. hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET | DFSDM_CHCFGR2_DTRBS);
  421. hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_Pos) |
  422. (hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_Pos));
  423. /* Enable DFSDM channel */
  424. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CHEN;
  425. /* Set DFSDM Channel to ready state */
  426. hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;
  427. /* Store channel handle in DFSDM channel handle table */
  428. channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
  429. return HAL_OK;
  430. }
  431. /**
  432. * @brief De-initialize the DFSDM channel.
  433. * @param hdfsdm_channel DFSDM channel handle.
  434. * @retval HAL status.
  435. */
  436. HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  437. {
  438. __IO uint32_t *channelCounterPtr;
  439. DFSDM_Channel_HandleTypeDef **channelHandleTable;
  440. DFSDM_Channel_TypeDef *channel0Instance;
  441. /* Check DFSDM Channel handle */
  442. if(hdfsdm_channel == NULL)
  443. {
  444. return HAL_ERROR;
  445. }
  446. /* Check parameters */
  447. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  448. #if defined(DFSDM2_Channel0)
  449. if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
  450. {
  451. channelCounterPtr = &v_dfsdm1ChannelCounter;
  452. channelHandleTable = a_dfsdm1ChannelHandle;
  453. channel0Instance = DFSDM1_Channel0;
  454. }
  455. else
  456. {
  457. channelCounterPtr = &v_dfsdm2ChannelCounter;
  458. channelHandleTable = a_dfsdm2ChannelHandle;
  459. channel0Instance = DFSDM2_Channel0;
  460. }
  461. #else /* DFSDM2_Channel0 */
  462. channelCounterPtr = &v_dfsdm1ChannelCounter;
  463. channelHandleTable = a_dfsdm1ChannelHandle;
  464. channel0Instance = DFSDM1_Channel0;
  465. #endif /* DFSDM2_Channel0 */
  466. /* Check that channel has not been already deinitialized */
  467. if (channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL)
  468. {
  469. return HAL_ERROR;
  470. }
  471. /* Disable the DFSDM channel */
  472. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN);
  473. /* Update the channel counter */
  474. (*channelCounterPtr)--;
  475. /* Disable global DFSDM at deinit of last channel */
  476. if (*channelCounterPtr == 0U)
  477. {
  478. channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN);
  479. }
  480. /* Call MSP deinit function */
  481. #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
  482. if(hdfsdm_channel->MspDeInitCallback == NULL)
  483. {
  484. hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;
  485. }
  486. hdfsdm_channel->MspDeInitCallback(hdfsdm_channel);
  487. #else
  488. HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel);
  489. #endif
  490. /* Set DFSDM Channel in reset state */
  491. hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET;
  492. /* Reset channel handle in DFSDM channel handle table */
  493. channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = (DFSDM_Channel_HandleTypeDef *) NULL;
  494. return HAL_OK;
  495. }
  496. /**
  497. * @brief Initialize the DFSDM channel MSP.
  498. * @param hdfsdm_channel DFSDM channel handle.
  499. * @retval None
  500. */
  501. __weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  502. {
  503. /* Prevent unused argument(s) compilation warning */
  504. UNUSED(hdfsdm_channel);
  505. /* NOTE : This function should not be modified, when the function is needed,
  506. the HAL_DFSDM_ChannelMspInit could be implemented in the user file.
  507. */
  508. }
  509. /**
  510. * @brief De-initialize the DFSDM channel MSP.
  511. * @param hdfsdm_channel DFSDM channel handle.
  512. * @retval None
  513. */
  514. __weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  515. {
  516. /* Prevent unused argument(s) compilation warning */
  517. UNUSED(hdfsdm_channel);
  518. /* NOTE : This function should not be modified, when the function is needed,
  519. the HAL_DFSDM_ChannelMspDeInit could be implemented in the user file.
  520. */
  521. }
  522. #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
  523. /**
  524. * @brief Register a user DFSDM channel callback
  525. * to be used instead of the weak predefined callback.
  526. * @param hdfsdm_channel DFSDM channel handle.
  527. * @param CallbackID ID of the callback to be registered.
  528. * This parameter can be one of the following values:
  529. * @arg @ref HAL_DFSDM_CHANNEL_CKAB_CB_ID clock absence detection callback ID.
  530. * @arg @ref HAL_DFSDM_CHANNEL_SCD_CB_ID short circuit detection callback ID.
  531. * @arg @ref HAL_DFSDM_CHANNEL_MSPINIT_CB_ID MSP init callback ID.
  532. * @arg @ref HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID MSP de-init callback ID.
  533. * @param pCallback pointer to the callback function.
  534. * @retval HAL status.
  535. */
  536. HAL_StatusTypeDef HAL_DFSDM_Channel_RegisterCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  537. HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID,
  538. pDFSDM_Channel_CallbackTypeDef pCallback)
  539. {
  540. HAL_StatusTypeDef status = HAL_OK;
  541. if(pCallback == NULL)
  542. {
  543. /* update return status */
  544. status = HAL_ERROR;
  545. }
  546. else
  547. {
  548. if(HAL_DFSDM_CHANNEL_STATE_READY == hdfsdm_channel->State)
  549. {
  550. switch (CallbackID)
  551. {
  552. case HAL_DFSDM_CHANNEL_CKAB_CB_ID :
  553. hdfsdm_channel->CkabCallback = pCallback;
  554. break;
  555. case HAL_DFSDM_CHANNEL_SCD_CB_ID :
  556. hdfsdm_channel->ScdCallback = pCallback;
  557. break;
  558. case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
  559. hdfsdm_channel->MspInitCallback = pCallback;
  560. break;
  561. case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
  562. hdfsdm_channel->MspDeInitCallback = pCallback;
  563. break;
  564. default :
  565. /* update return status */
  566. status = HAL_ERROR;
  567. break;
  568. }
  569. }
  570. else if(HAL_DFSDM_CHANNEL_STATE_RESET == hdfsdm_channel->State)
  571. {
  572. switch (CallbackID)
  573. {
  574. case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
  575. hdfsdm_channel->MspInitCallback = pCallback;
  576. break;
  577. case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
  578. hdfsdm_channel->MspDeInitCallback = pCallback;
  579. break;
  580. default :
  581. /* update return status */
  582. status = HAL_ERROR;
  583. break;
  584. }
  585. }
  586. else
  587. {
  588. /* update return status */
  589. status = HAL_ERROR;
  590. }
  591. }
  592. return status;
  593. }
  594. /**
  595. * @brief Unregister a user DFSDM channel callback.
  596. * DFSDM channel callback is redirected to the weak predefined callback.
  597. * @param hdfsdm_channel DFSDM channel handle.
  598. * @param CallbackID ID of the callback to be unregistered.
  599. * This parameter can be one of the following values:
  600. * @arg @ref HAL_DFSDM_CHANNEL_CKAB_CB_ID clock absence detection callback ID.
  601. * @arg @ref HAL_DFSDM_CHANNEL_SCD_CB_ID short circuit detection callback ID.
  602. * @arg @ref HAL_DFSDM_CHANNEL_MSPINIT_CB_ID MSP init callback ID.
  603. * @arg @ref HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID MSP de-init callback ID.
  604. * @retval HAL status.
  605. */
  606. HAL_StatusTypeDef HAL_DFSDM_Channel_UnRegisterCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  607. HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID)
  608. {
  609. HAL_StatusTypeDef status = HAL_OK;
  610. if(HAL_DFSDM_CHANNEL_STATE_READY == hdfsdm_channel->State)
  611. {
  612. switch (CallbackID)
  613. {
  614. case HAL_DFSDM_CHANNEL_CKAB_CB_ID :
  615. hdfsdm_channel->CkabCallback = HAL_DFSDM_ChannelCkabCallback;
  616. break;
  617. case HAL_DFSDM_CHANNEL_SCD_CB_ID :
  618. hdfsdm_channel->ScdCallback = HAL_DFSDM_ChannelScdCallback;
  619. break;
  620. case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
  621. hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;
  622. break;
  623. case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
  624. hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;
  625. break;
  626. default :
  627. /* update return status */
  628. status = HAL_ERROR;
  629. break;
  630. }
  631. }
  632. else if(HAL_DFSDM_CHANNEL_STATE_RESET == hdfsdm_channel->State)
  633. {
  634. switch (CallbackID)
  635. {
  636. case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
  637. hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;
  638. break;
  639. case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
  640. hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;
  641. break;
  642. default :
  643. /* update return status */
  644. status = HAL_ERROR;
  645. break;
  646. }
  647. }
  648. else
  649. {
  650. /* update return status */
  651. status = HAL_ERROR;
  652. }
  653. return status;
  654. }
  655. #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */
  656. /**
  657. * @}
  658. */
  659. /** @defgroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions
  660. * @brief Channel operation functions
  661. *
  662. @verbatim
  663. ==============================================================================
  664. ##### Channel operation functions #####
  665. ==============================================================================
  666. [..] This section provides functions allowing to:
  667. (+) Manage clock absence detector feature.
  668. (+) Manage short circuit detector feature.
  669. (+) Get analog watchdog value.
  670. (+) Modify offset value.
  671. @endverbatim
  672. * @{
  673. */
  674. /**
  675. * @brief This function allows to start clock absence detection in polling mode.
  676. * @note Same mode has to be used for all channels.
  677. * @note If clock is not available on this channel during 5 seconds,
  678. * clock absence detection will not be activated and function
  679. * will return HAL_TIMEOUT error.
  680. * @param hdfsdm_channel DFSDM channel handle.
  681. * @retval HAL status
  682. */
  683. HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  684. {
  685. HAL_StatusTypeDef status = HAL_OK;
  686. uint32_t channel;
  687. uint32_t tickstart;
  688. DFSDM_Filter_TypeDef *filter0Instance;
  689. /* Check parameters */
  690. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  691. #if defined(DFSDM2_Channel0)
  692. if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
  693. {
  694. filter0Instance = DFSDM1_Filter0;
  695. }
  696. else
  697. {
  698. filter0Instance = DFSDM2_Filter0;
  699. }
  700. #else /* DFSDM2_Channel0 */
  701. filter0Instance = DFSDM1_Filter0;
  702. #endif /* DFSDM2_Channel0 */
  703. /* Check DFSDM channel state */
  704. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  705. {
  706. /* Return error status */
  707. status = HAL_ERROR;
  708. }
  709. else
  710. {
  711. /* Get channel number from channel instance */
  712. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  713. /* Get timeout */
  714. tickstart = HAL_GetTick();
  715. /* Clear clock absence flag */
  716. while ((((filter0Instance->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) != 0U)
  717. {
  718. filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
  719. /* Check the Timeout */
  720. if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
  721. {
  722. /* Set timeout status */
  723. status = HAL_TIMEOUT;
  724. break;
  725. }
  726. }
  727. if(status == HAL_OK)
  728. {
  729. /* Start clock absence detection */
  730. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
  731. }
  732. }
  733. /* Return function status */
  734. return status;
  735. }
  736. /**
  737. * @brief This function allows to poll for the clock absence detection.
  738. * @param hdfsdm_channel DFSDM channel handle.
  739. * @param Timeout Timeout value in milliseconds.
  740. * @retval HAL status
  741. */
  742. HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  743. uint32_t Timeout)
  744. {
  745. uint32_t tickstart;
  746. uint32_t channel;
  747. DFSDM_Filter_TypeDef *filter0Instance;
  748. /* Check parameters */
  749. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  750. #if defined(DFSDM2_Channel0)
  751. if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
  752. {
  753. filter0Instance = DFSDM1_Filter0;
  754. }
  755. else
  756. {
  757. filter0Instance = DFSDM2_Filter0;
  758. }
  759. #else /* DFSDM2_Channel0 */
  760. filter0Instance = DFSDM1_Filter0;
  761. #endif /* DFSDM2_Channel0 */
  762. /* Check DFSDM channel state */
  763. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  764. {
  765. /* Return error status */
  766. return HAL_ERROR;
  767. }
  768. else
  769. {
  770. /* Get channel number from channel instance */
  771. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  772. /* Get timeout */
  773. tickstart = HAL_GetTick();
  774. /* Wait clock absence detection */
  775. while ((((filter0Instance->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) == 0U)
  776. {
  777. /* Check the Timeout */
  778. if(Timeout != HAL_MAX_DELAY)
  779. {
  780. if(((HAL_GetTick()-tickstart) > Timeout) || (Timeout == 0U))
  781. {
  782. /* Return timeout status */
  783. return HAL_TIMEOUT;
  784. }
  785. }
  786. }
  787. /* Clear clock absence detection flag */
  788. filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
  789. /* Return function status */
  790. return HAL_OK;
  791. }
  792. }
  793. /**
  794. * @brief This function allows to stop clock absence detection in polling mode.
  795. * @param hdfsdm_channel DFSDM channel handle.
  796. * @retval HAL status
  797. */
  798. HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  799. {
  800. HAL_StatusTypeDef status = HAL_OK;
  801. uint32_t channel;
  802. DFSDM_Filter_TypeDef *filter0Instance;
  803. /* Check parameters */
  804. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  805. #if defined(DFSDM2_Channel0)
  806. if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
  807. {
  808. filter0Instance = DFSDM1_Filter0;
  809. }
  810. else
  811. {
  812. filter0Instance = DFSDM2_Filter0;
  813. }
  814. #else /* DFSDM2_Channel0 */
  815. filter0Instance = DFSDM1_Filter0;
  816. #endif /* DFSDM2_Channel0 */
  817. /* Check DFSDM channel state */
  818. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  819. {
  820. /* Return error status */
  821. status = HAL_ERROR;
  822. }
  823. else
  824. {
  825. /* Stop clock absence detection */
  826. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
  827. /* Clear clock absence flag */
  828. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  829. filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
  830. }
  831. /* Return function status */
  832. return status;
  833. }
  834. /**
  835. * @brief This function allows to start clock absence detection in interrupt mode.
  836. * @note Same mode has to be used for all channels.
  837. * @note If clock is not available on this channel during 5 seconds,
  838. * clock absence detection will not be activated and function
  839. * will return HAL_TIMEOUT error.
  840. * @param hdfsdm_channel DFSDM channel handle.
  841. * @retval HAL status
  842. */
  843. HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  844. {
  845. HAL_StatusTypeDef status = HAL_OK;
  846. uint32_t channel;
  847. uint32_t tickstart;
  848. DFSDM_Filter_TypeDef *filter0Instance;
  849. /* Check parameters */
  850. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  851. #if defined(DFSDM2_Channel0)
  852. if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
  853. {
  854. filter0Instance = DFSDM1_Filter0;
  855. }
  856. else
  857. {
  858. filter0Instance = DFSDM2_Filter0;
  859. }
  860. #else /* DFSDM2_Channel0 */
  861. filter0Instance = DFSDM1_Filter0;
  862. #endif /* DFSDM2_Channel0 */
  863. /* Check DFSDM channel state */
  864. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  865. {
  866. /* Return error status */
  867. status = HAL_ERROR;
  868. }
  869. else
  870. {
  871. /* Get channel number from channel instance */
  872. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  873. /* Get timeout */
  874. tickstart = HAL_GetTick();
  875. /* Clear clock absence flag */
  876. while ((((filter0Instance->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) != 0U)
  877. {
  878. filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
  879. /* Check the Timeout */
  880. if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
  881. {
  882. /* Set timeout status */
  883. status = HAL_TIMEOUT;
  884. break;
  885. }
  886. }
  887. if(status == HAL_OK)
  888. {
  889. /* Activate clock absence detection interrupt */
  890. filter0Instance->FLTCR2 |= DFSDM_FLTCR2_CKABIE;
  891. /* Start clock absence detection */
  892. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
  893. }
  894. }
  895. /* Return function status */
  896. return status;
  897. }
  898. /**
  899. * @brief Clock absence detection callback.
  900. * @param hdfsdm_channel DFSDM channel handle.
  901. * @retval None
  902. */
  903. __weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  904. {
  905. /* Prevent unused argument(s) compilation warning */
  906. UNUSED(hdfsdm_channel);
  907. /* NOTE : This function should not be modified, when the callback is needed,
  908. the HAL_DFSDM_ChannelCkabCallback could be implemented in the user file
  909. */
  910. }
  911. /**
  912. * @brief This function allows to stop clock absence detection in interrupt mode.
  913. * @note Interrupt will be disabled for all channels
  914. * @param hdfsdm_channel DFSDM channel handle.
  915. * @retval HAL status
  916. */
  917. HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  918. {
  919. HAL_StatusTypeDef status = HAL_OK;
  920. uint32_t channel;
  921. DFSDM_Filter_TypeDef *filter0Instance;
  922. /* Check parameters */
  923. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  924. #if defined(DFSDM2_Channel0)
  925. if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
  926. {
  927. filter0Instance = DFSDM1_Filter0;
  928. }
  929. else
  930. {
  931. filter0Instance = DFSDM2_Filter0;
  932. }
  933. #else /* DFSDM2_Channel0 */
  934. filter0Instance = DFSDM1_Filter0;
  935. #endif /* DFSDM2_Channel0 */
  936. /* Check DFSDM channel state */
  937. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  938. {
  939. /* Return error status */
  940. status = HAL_ERROR;
  941. }
  942. else
  943. {
  944. /* Stop clock absence detection */
  945. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
  946. /* Clear clock absence flag */
  947. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  948. filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
  949. /* Disable clock absence detection interrupt */
  950. filter0Instance->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE);
  951. }
  952. /* Return function status */
  953. return status;
  954. }
  955. /**
  956. * @brief This function allows to start short circuit detection in polling mode.
  957. * @note Same mode has to be used for all channels
  958. * @param hdfsdm_channel DFSDM channel handle.
  959. * @param Threshold Short circuit detector threshold.
  960. * This parameter must be a number between Min_Data = 0 and Max_Data = 255.
  961. * @param BreakSignal Break signals assigned to short circuit event.
  962. * This parameter can be a values combination of @ref DFSDM_BreakSignals.
  963. * @retval HAL status
  964. */
  965. HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  966. uint32_t Threshold,
  967. uint32_t BreakSignal)
  968. {
  969. HAL_StatusTypeDef status = HAL_OK;
  970. /* Check parameters */
  971. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  972. assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
  973. assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
  974. /* Check DFSDM channel state */
  975. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  976. {
  977. /* Return error status */
  978. status = HAL_ERROR;
  979. }
  980. else
  981. {
  982. /* Configure threshold and break signals */
  983. hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
  984. hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \
  985. Threshold);
  986. /* Start short circuit detection */
  987. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
  988. }
  989. /* Return function status */
  990. return status;
  991. }
  992. /**
  993. * @brief This function allows to poll for the short circuit detection.
  994. * @param hdfsdm_channel DFSDM channel handle.
  995. * @param Timeout Timeout value in milliseconds.
  996. * @retval HAL status
  997. */
  998. HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  999. uint32_t Timeout)
  1000. {
  1001. uint32_t tickstart;
  1002. uint32_t channel;
  1003. DFSDM_Filter_TypeDef *filter0Instance;
  1004. /* Check parameters */
  1005. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  1006. #if defined(DFSDM2_Channel0)
  1007. if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
  1008. {
  1009. filter0Instance = DFSDM1_Filter0;
  1010. }
  1011. else
  1012. {
  1013. filter0Instance = DFSDM2_Filter0;
  1014. }
  1015. #else /* DFSDM2_Channel0 */
  1016. filter0Instance = DFSDM1_Filter0;
  1017. #endif /* DFSDM2_Channel0 */
  1018. /* Check DFSDM channel state */
  1019. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  1020. {
  1021. /* Return error status */
  1022. return HAL_ERROR;
  1023. }
  1024. else
  1025. {
  1026. /* Get channel number from channel instance */
  1027. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  1028. /* Get timeout */
  1029. tickstart = HAL_GetTick();
  1030. /* Wait short circuit detection */
  1031. while (((filter0Instance->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_Pos + channel)) == 0U)
  1032. {
  1033. /* Check the Timeout */
  1034. if(Timeout != HAL_MAX_DELAY)
  1035. {
  1036. if(((HAL_GetTick()-tickstart) > Timeout) || (Timeout == 0U))
  1037. {
  1038. /* Return timeout status */
  1039. return HAL_TIMEOUT;
  1040. }
  1041. }
  1042. }
  1043. /* Clear short circuit detection flag */
  1044. filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
  1045. /* Return function status */
  1046. return HAL_OK;
  1047. }
  1048. }
  1049. /**
  1050. * @brief This function allows to stop short circuit detection in polling mode.
  1051. * @param hdfsdm_channel DFSDM channel handle.
  1052. * @retval HAL status
  1053. */
  1054. HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  1055. {
  1056. HAL_StatusTypeDef status = HAL_OK;
  1057. uint32_t channel;
  1058. DFSDM_Filter_TypeDef *filter0Instance;
  1059. /* Check parameters */
  1060. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  1061. #if defined(DFSDM2_Channel0)
  1062. if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
  1063. {
  1064. filter0Instance = DFSDM1_Filter0;
  1065. }
  1066. else
  1067. {
  1068. filter0Instance = DFSDM2_Filter0;
  1069. }
  1070. #else /* DFSDM2_Channel0 */
  1071. filter0Instance = DFSDM1_Filter0;
  1072. #endif /* DFSDM2_Channel0 */
  1073. /* Check DFSDM channel state */
  1074. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  1075. {
  1076. /* Return error status */
  1077. status = HAL_ERROR;
  1078. }
  1079. else
  1080. {
  1081. /* Stop short circuit detection */
  1082. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
  1083. /* Clear short circuit detection flag */
  1084. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  1085. filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
  1086. }
  1087. /* Return function status */
  1088. return status;
  1089. }
  1090. /**
  1091. * @brief This function allows to start short circuit detection in interrupt mode.
  1092. * @note Same mode has to be used for all channels
  1093. * @param hdfsdm_channel DFSDM channel handle.
  1094. * @param Threshold Short circuit detector threshold.
  1095. * This parameter must be a number between Min_Data = 0 and Max_Data = 255.
  1096. * @param BreakSignal Break signals assigned to short circuit event.
  1097. * This parameter can be a values combination of @ref DFSDM_BreakSignals.
  1098. * @retval HAL status
  1099. */
  1100. HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  1101. uint32_t Threshold,
  1102. uint32_t BreakSignal)
  1103. {
  1104. HAL_StatusTypeDef status = HAL_OK;
  1105. DFSDM_Filter_TypeDef *filter0Instance;
  1106. /* Check parameters */
  1107. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  1108. assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
  1109. assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
  1110. #if defined(DFSDM2_Channel0)
  1111. if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
  1112. {
  1113. filter0Instance = DFSDM1_Filter0;
  1114. }
  1115. else
  1116. {
  1117. filter0Instance = DFSDM2_Filter0;
  1118. }
  1119. #else /* DFSDM2_Channel0 */
  1120. filter0Instance = DFSDM1_Filter0;
  1121. #endif /* DFSDM2_Channel0 */
  1122. /* Check DFSDM channel state */
  1123. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  1124. {
  1125. /* Return error status */
  1126. status = HAL_ERROR;
  1127. }
  1128. else
  1129. {
  1130. /* Activate short circuit detection interrupt */
  1131. filter0Instance->FLTCR2 |= DFSDM_FLTCR2_SCDIE;
  1132. /* Configure threshold and break signals */
  1133. hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
  1134. hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \
  1135. Threshold);
  1136. /* Start short circuit detection */
  1137. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
  1138. }
  1139. /* Return function status */
  1140. return status;
  1141. }
  1142. /**
  1143. * @brief Short circuit detection callback.
  1144. * @param hdfsdm_channel DFSDM channel handle.
  1145. * @retval None
  1146. */
  1147. __weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  1148. {
  1149. /* Prevent unused argument(s) compilation warning */
  1150. UNUSED(hdfsdm_channel);
  1151. /* NOTE : This function should not be modified, when the callback is needed,
  1152. the HAL_DFSDM_ChannelScdCallback could be implemented in the user file
  1153. */
  1154. }
  1155. /**
  1156. * @brief This function allows to stop short circuit detection in interrupt mode.
  1157. * @note Interrupt will be disabled for all channels
  1158. * @param hdfsdm_channel DFSDM channel handle.
  1159. * @retval HAL status
  1160. */
  1161. HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  1162. {
  1163. HAL_StatusTypeDef status = HAL_OK;
  1164. uint32_t channel;
  1165. DFSDM_Filter_TypeDef *filter0Instance;
  1166. /* Check parameters */
  1167. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  1168. #if defined(DFSDM2_Channel0)
  1169. if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
  1170. {
  1171. filter0Instance = DFSDM1_Filter0;
  1172. }
  1173. else
  1174. {
  1175. filter0Instance = DFSDM2_Filter0;
  1176. }
  1177. #else /* DFSDM2_Channel0 */
  1178. filter0Instance = DFSDM1_Filter0;
  1179. #endif /* DFSDM2_Channel0 */
  1180. /* Check DFSDM channel state */
  1181. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  1182. {
  1183. /* Return error status */
  1184. status = HAL_ERROR;
  1185. }
  1186. else
  1187. {
  1188. /* Stop short circuit detection */
  1189. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
  1190. /* Clear short circuit detection flag */
  1191. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  1192. filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
  1193. /* Disable short circuit detection interrupt */
  1194. filter0Instance->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE);
  1195. }
  1196. /* Return function status */
  1197. return status;
  1198. }
  1199. /**
  1200. * @brief This function allows to get channel analog watchdog value.
  1201. * @param hdfsdm_channel DFSDM channel handle.
  1202. * @retval Channel analog watchdog value.
  1203. */
  1204. int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  1205. {
  1206. return (int16_t) hdfsdm_channel->Instance->CHWDATAR;
  1207. }
  1208. /**
  1209. * @brief This function allows to modify channel offset value.
  1210. * @param hdfsdm_channel DFSDM channel handle.
  1211. * @param Offset DFSDM channel offset.
  1212. * This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
  1213. * @retval HAL status.
  1214. */
  1215. HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  1216. int32_t Offset)
  1217. {
  1218. HAL_StatusTypeDef status = HAL_OK;
  1219. /* Check parameters */
  1220. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  1221. assert_param(IS_DFSDM_CHANNEL_OFFSET(Offset));
  1222. /* Check DFSDM channel state */
  1223. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  1224. {
  1225. /* Return error status */
  1226. status = HAL_ERROR;
  1227. }
  1228. else
  1229. {
  1230. /* Modify channel offset */
  1231. hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET);
  1232. hdfsdm_channel->Instance->CHCFGR2 |= ((uint32_t) Offset << DFSDM_CHCFGR2_OFFSET_Pos);
  1233. }
  1234. /* Return function status */
  1235. return status;
  1236. }
  1237. /**
  1238. * @}
  1239. */
  1240. /** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function
  1241. * @brief Channel state function
  1242. *
  1243. @verbatim
  1244. ==============================================================================
  1245. ##### Channel state function #####
  1246. ==============================================================================
  1247. [..] This section provides function allowing to:
  1248. (+) Get channel handle state.
  1249. @endverbatim
  1250. * @{
  1251. */
  1252. /**
  1253. * @brief This function allows to get the current DFSDM channel handle state.
  1254. * @param hdfsdm_channel DFSDM channel handle.
  1255. * @retval DFSDM channel state.
  1256. */
  1257. HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  1258. {
  1259. /* Return DFSDM channel handle state */
  1260. return hdfsdm_channel->State;
  1261. }
  1262. /**
  1263. * @}
  1264. */
  1265. /** @defgroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions
  1266. * @brief Filter initialization and de-initialization functions
  1267. *
  1268. @verbatim
  1269. ==============================================================================
  1270. ##### Filter initialization and de-initialization functions #####
  1271. ==============================================================================
  1272. [..] This section provides functions allowing to:
  1273. (+) Initialize the DFSDM filter.
  1274. (+) De-initialize the DFSDM filter.
  1275. @endverbatim
  1276. * @{
  1277. */
  1278. /**
  1279. * @brief Initialize the DFSDM filter according to the specified parameters
  1280. * in the DFSDM_FilterInitTypeDef structure and initialize the associated handle.
  1281. * @param hdfsdm_filter DFSDM filter handle.
  1282. * @retval HAL status.
  1283. */
  1284. HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1285. {
  1286. const DFSDM_Filter_TypeDef *filter0Instance;
  1287. /* Check DFSDM Channel handle */
  1288. if(hdfsdm_filter == NULL)
  1289. {
  1290. return HAL_ERROR;
  1291. }
  1292. /* Check parameters */
  1293. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1294. assert_param(IS_DFSDM_FILTER_REG_TRIGGER(hdfsdm_filter->Init.RegularParam.Trigger));
  1295. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.FastMode));
  1296. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.DmaMode));
  1297. assert_param(IS_DFSDM_FILTER_INJ_TRIGGER(hdfsdm_filter->Init.InjectedParam.Trigger));
  1298. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.ScanMode));
  1299. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.DmaMode));
  1300. assert_param(IS_DFSDM_FILTER_SINC_ORDER(hdfsdm_filter->Init.FilterParam.SincOrder));
  1301. assert_param(IS_DFSDM_FILTER_OVS_RATIO(hdfsdm_filter->Init.FilterParam.Oversampling));
  1302. assert_param(IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(hdfsdm_filter->Init.FilterParam.IntOversampling));
  1303. #if defined(DFSDM2_Channel0)
  1304. if (IS_DFSDM1_FILTER_INSTANCE(hdfsdm_filter->Instance))
  1305. {
  1306. filter0Instance = DFSDM1_Filter0;
  1307. }
  1308. else
  1309. {
  1310. filter0Instance = DFSDM2_Filter0;
  1311. }
  1312. #else /* DFSDM2_Channel0 */
  1313. filter0Instance = DFSDM1_Filter0;
  1314. #endif /* DFSDM2_Channel0 */
  1315. /* Check parameters compatibility */
  1316. if ((hdfsdm_filter->Instance == filter0Instance) &&
  1317. ((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) ||
  1318. (hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
  1319. {
  1320. return HAL_ERROR;
  1321. }
  1322. /* Initialize DFSDM filter variables with default values */
  1323. hdfsdm_filter->RegularContMode = DFSDM_CONTINUOUS_CONV_OFF;
  1324. hdfsdm_filter->InjectedChannelsNbr = 1;
  1325. hdfsdm_filter->InjConvRemaining = 1;
  1326. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_NONE;
  1327. #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
  1328. /* Reset callback pointers to the weak predefined callbacks */
  1329. hdfsdm_filter->AwdCallback = HAL_DFSDM_FilterAwdCallback;
  1330. hdfsdm_filter->RegConvCpltCallback = HAL_DFSDM_FilterRegConvCpltCallback;
  1331. hdfsdm_filter->RegConvHalfCpltCallback = HAL_DFSDM_FilterRegConvHalfCpltCallback;
  1332. hdfsdm_filter->InjConvCpltCallback = HAL_DFSDM_FilterInjConvCpltCallback;
  1333. hdfsdm_filter->InjConvHalfCpltCallback = HAL_DFSDM_FilterInjConvHalfCpltCallback;
  1334. hdfsdm_filter->ErrorCallback = HAL_DFSDM_FilterErrorCallback;
  1335. /* Call MSP init function */
  1336. if(hdfsdm_filter->MspInitCallback == NULL)
  1337. {
  1338. hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;
  1339. }
  1340. hdfsdm_filter->MspInitCallback(hdfsdm_filter);
  1341. #else
  1342. /* Call MSP init function */
  1343. HAL_DFSDM_FilterMspInit(hdfsdm_filter);
  1344. #endif
  1345. /* Set regular parameters */
  1346. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
  1347. if(hdfsdm_filter->Init.RegularParam.FastMode == ENABLE)
  1348. {
  1349. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_FAST;
  1350. }
  1351. else
  1352. {
  1353. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_FAST);
  1354. }
  1355. if(hdfsdm_filter->Init.RegularParam.DmaMode == ENABLE)
  1356. {
  1357. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RDMAEN;
  1358. }
  1359. else
  1360. {
  1361. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RDMAEN);
  1362. }
  1363. /* Set injected parameters */
  1364. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC | DFSDM_FLTCR1_JEXTEN | DFSDM_FLTCR1_JEXTSEL);
  1365. if(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_EXT_TRIGGER)
  1366. {
  1367. assert_param(IS_DFSDM_FILTER_EXT_TRIG(hdfsdm_filter->Init.InjectedParam.ExtTrigger));
  1368. assert_param(IS_DFSDM_FILTER_EXT_TRIG_EDGE(hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge));
  1369. hdfsdm_filter->Instance->FLTCR1 |= (hdfsdm_filter->Init.InjectedParam.ExtTrigger);
  1370. }
  1371. if(hdfsdm_filter->Init.InjectedParam.ScanMode == ENABLE)
  1372. {
  1373. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSCAN;
  1374. }
  1375. else
  1376. {
  1377. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSCAN);
  1378. }
  1379. if(hdfsdm_filter->Init.InjectedParam.DmaMode == ENABLE)
  1380. {
  1381. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JDMAEN;
  1382. }
  1383. else
  1384. {
  1385. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JDMAEN);
  1386. }
  1387. /* Set filter parameters */
  1388. hdfsdm_filter->Instance->FLTFCR &= ~(DFSDM_FLTFCR_FORD | DFSDM_FLTFCR_FOSR | DFSDM_FLTFCR_IOSR);
  1389. hdfsdm_filter->Instance->FLTFCR |= (hdfsdm_filter->Init.FilterParam.SincOrder |
  1390. ((hdfsdm_filter->Init.FilterParam.Oversampling - 1U) << DFSDM_FLTFCR_FOSR_Pos) |
  1391. (hdfsdm_filter->Init.FilterParam.IntOversampling - 1U));
  1392. /* Store regular and injected triggers and injected scan mode*/
  1393. hdfsdm_filter->RegularTrigger = hdfsdm_filter->Init.RegularParam.Trigger;
  1394. hdfsdm_filter->InjectedTrigger = hdfsdm_filter->Init.InjectedParam.Trigger;
  1395. hdfsdm_filter->ExtTriggerEdge = hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge;
  1396. hdfsdm_filter->InjectedScanMode = hdfsdm_filter->Init.InjectedParam.ScanMode;
  1397. /* Enable DFSDM filter */
  1398. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  1399. /* Set DFSDM filter to ready state */
  1400. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_READY;
  1401. return HAL_OK;
  1402. }
  1403. /**
  1404. * @brief De-initializes the DFSDM filter.
  1405. * @param hdfsdm_filter DFSDM filter handle.
  1406. * @retval HAL status.
  1407. */
  1408. HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1409. {
  1410. /* Check DFSDM filter handle */
  1411. if(hdfsdm_filter == NULL)
  1412. {
  1413. return HAL_ERROR;
  1414. }
  1415. /* Check parameters */
  1416. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1417. /* Disable the DFSDM filter */
  1418. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  1419. /* Call MSP deinit function */
  1420. #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
  1421. if(hdfsdm_filter->MspDeInitCallback == NULL)
  1422. {
  1423. hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;
  1424. }
  1425. hdfsdm_filter->MspDeInitCallback(hdfsdm_filter);
  1426. #else
  1427. HAL_DFSDM_FilterMspDeInit(hdfsdm_filter);
  1428. #endif
  1429. /* Set DFSDM filter in reset state */
  1430. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_RESET;
  1431. return HAL_OK;
  1432. }
  1433. /**
  1434. * @brief Initializes the DFSDM filter MSP.
  1435. * @param hdfsdm_filter DFSDM filter handle.
  1436. * @retval None
  1437. */
  1438. __weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1439. {
  1440. /* Prevent unused argument(s) compilation warning */
  1441. UNUSED(hdfsdm_filter);
  1442. /* NOTE : This function should not be modified, when the function is needed,
  1443. the HAL_DFSDM_FilterMspInit could be implemented in the user file.
  1444. */
  1445. }
  1446. /**
  1447. * @brief De-initializes the DFSDM filter MSP.
  1448. * @param hdfsdm_filter DFSDM filter handle.
  1449. * @retval None
  1450. */
  1451. __weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1452. {
  1453. /* Prevent unused argument(s) compilation warning */
  1454. UNUSED(hdfsdm_filter);
  1455. /* NOTE : This function should not be modified, when the function is needed,
  1456. the HAL_DFSDM_FilterMspDeInit could be implemented in the user file.
  1457. */
  1458. }
  1459. #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
  1460. /**
  1461. * @brief Register a user DFSDM filter callback
  1462. * to be used instead of the weak predefined callback.
  1463. * @param hdfsdm_filter DFSDM filter handle.
  1464. * @param CallbackID ID of the callback to be registered.
  1465. * This parameter can be one of the following values:
  1466. * @arg @ref HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID regular conversion complete callback ID.
  1467. * @arg @ref HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID half regular conversion complete callback ID.
  1468. * @arg @ref HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID injected conversion complete callback ID.
  1469. * @arg @ref HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID half injected conversion complete callback ID.
  1470. * @arg @ref HAL_DFSDM_FILTER_ERROR_CB_ID error callback ID.
  1471. * @arg @ref HAL_DFSDM_FILTER_MSPINIT_CB_ID MSP init callback ID.
  1472. * @arg @ref HAL_DFSDM_FILTER_MSPDEINIT_CB_ID MSP de-init callback ID.
  1473. * @param pCallback pointer to the callback function.
  1474. * @retval HAL status.
  1475. */
  1476. HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1477. HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID,
  1478. pDFSDM_Filter_CallbackTypeDef pCallback)
  1479. {
  1480. HAL_StatusTypeDef status = HAL_OK;
  1481. if(pCallback == NULL)
  1482. {
  1483. /* update the error code */
  1484. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
  1485. /* update return status */
  1486. status = HAL_ERROR;
  1487. }
  1488. else
  1489. {
  1490. if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
  1491. {
  1492. switch (CallbackID)
  1493. {
  1494. case HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID :
  1495. hdfsdm_filter->RegConvCpltCallback = pCallback;
  1496. break;
  1497. case HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID :
  1498. hdfsdm_filter->RegConvHalfCpltCallback = pCallback;
  1499. break;
  1500. case HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID :
  1501. hdfsdm_filter->InjConvCpltCallback = pCallback;
  1502. break;
  1503. case HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID :
  1504. hdfsdm_filter->InjConvHalfCpltCallback = pCallback;
  1505. break;
  1506. case HAL_DFSDM_FILTER_ERROR_CB_ID :
  1507. hdfsdm_filter->ErrorCallback = pCallback;
  1508. break;
  1509. case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
  1510. hdfsdm_filter->MspInitCallback = pCallback;
  1511. break;
  1512. case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
  1513. hdfsdm_filter->MspDeInitCallback = pCallback;
  1514. break;
  1515. default :
  1516. /* update the error code */
  1517. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
  1518. /* update return status */
  1519. status = HAL_ERROR;
  1520. break;
  1521. }
  1522. }
  1523. else if(HAL_DFSDM_FILTER_STATE_RESET == hdfsdm_filter->State)
  1524. {
  1525. switch (CallbackID)
  1526. {
  1527. case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
  1528. hdfsdm_filter->MspInitCallback = pCallback;
  1529. break;
  1530. case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
  1531. hdfsdm_filter->MspDeInitCallback = pCallback;
  1532. break;
  1533. default :
  1534. /* update the error code */
  1535. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
  1536. /* update return status */
  1537. status = HAL_ERROR;
  1538. break;
  1539. }
  1540. }
  1541. else
  1542. {
  1543. /* update the error code */
  1544. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
  1545. /* update return status */
  1546. status = HAL_ERROR;
  1547. }
  1548. }
  1549. return status;
  1550. }
  1551. /**
  1552. * @brief Unregister a user DFSDM filter callback.
  1553. * DFSDM filter callback is redirected to the weak predefined callback.
  1554. * @param hdfsdm_filter DFSDM filter handle.
  1555. * @param CallbackID ID of the callback to be unregistered.
  1556. * This parameter can be one of the following values:
  1557. * @arg @ref HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID regular conversion complete callback ID.
  1558. * @arg @ref HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID half regular conversion complete callback ID.
  1559. * @arg @ref HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID injected conversion complete callback ID.
  1560. * @arg @ref HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID half injected conversion complete callback ID.
  1561. * @arg @ref HAL_DFSDM_FILTER_ERROR_CB_ID error callback ID.
  1562. * @arg @ref HAL_DFSDM_FILTER_MSPINIT_CB_ID MSP init callback ID.
  1563. * @arg @ref HAL_DFSDM_FILTER_MSPDEINIT_CB_ID MSP de-init callback ID.
  1564. * @retval HAL status.
  1565. */
  1566. HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1567. HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID)
  1568. {
  1569. HAL_StatusTypeDef status = HAL_OK;
  1570. if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
  1571. {
  1572. switch (CallbackID)
  1573. {
  1574. case HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID :
  1575. hdfsdm_filter->RegConvCpltCallback = HAL_DFSDM_FilterRegConvCpltCallback;
  1576. break;
  1577. case HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID :
  1578. hdfsdm_filter->RegConvHalfCpltCallback = HAL_DFSDM_FilterRegConvHalfCpltCallback;
  1579. break;
  1580. case HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID :
  1581. hdfsdm_filter->InjConvCpltCallback = HAL_DFSDM_FilterInjConvCpltCallback;
  1582. break;
  1583. case HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID :
  1584. hdfsdm_filter->InjConvHalfCpltCallback = HAL_DFSDM_FilterInjConvHalfCpltCallback;
  1585. break;
  1586. case HAL_DFSDM_FILTER_ERROR_CB_ID :
  1587. hdfsdm_filter->ErrorCallback = HAL_DFSDM_FilterErrorCallback;
  1588. break;
  1589. case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
  1590. hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;
  1591. break;
  1592. case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
  1593. hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;
  1594. break;
  1595. default :
  1596. /* update the error code */
  1597. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
  1598. /* update return status */
  1599. status = HAL_ERROR;
  1600. break;
  1601. }
  1602. }
  1603. else if(HAL_DFSDM_FILTER_STATE_RESET == hdfsdm_filter->State)
  1604. {
  1605. switch (CallbackID)
  1606. {
  1607. case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
  1608. hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;
  1609. break;
  1610. case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
  1611. hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;
  1612. break;
  1613. default :
  1614. /* update the error code */
  1615. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
  1616. /* update return status */
  1617. status = HAL_ERROR;
  1618. break;
  1619. }
  1620. }
  1621. else
  1622. {
  1623. /* update the error code */
  1624. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
  1625. /* update return status */
  1626. status = HAL_ERROR;
  1627. }
  1628. return status;
  1629. }
  1630. /**
  1631. * @brief Register a user DFSDM filter analog watchdog callback
  1632. * to be used instead of the weak predefined callback.
  1633. * @param hdfsdm_filter DFSDM filter handle.
  1634. * @param pCallback pointer to the DFSDM filter analog watchdog callback function.
  1635. * @retval HAL status.
  1636. */
  1637. HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1638. pDFSDM_Filter_AwdCallbackTypeDef pCallback)
  1639. {
  1640. HAL_StatusTypeDef status = HAL_OK;
  1641. if(pCallback == NULL)
  1642. {
  1643. /* update the error code */
  1644. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
  1645. /* update return status */
  1646. status = HAL_ERROR;
  1647. }
  1648. else
  1649. {
  1650. if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
  1651. {
  1652. hdfsdm_filter->AwdCallback = pCallback;
  1653. }
  1654. else
  1655. {
  1656. /* update the error code */
  1657. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
  1658. /* update return status */
  1659. status = HAL_ERROR;
  1660. }
  1661. }
  1662. return status;
  1663. }
  1664. /**
  1665. * @brief Unregister a user DFSDM filter analog watchdog callback.
  1666. * DFSDM filter AWD callback is redirected to the weak predefined callback.
  1667. * @param hdfsdm_filter DFSDM filter handle.
  1668. * @retval HAL status.
  1669. */
  1670. HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1671. {
  1672. HAL_StatusTypeDef status = HAL_OK;
  1673. if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
  1674. {
  1675. hdfsdm_filter->AwdCallback = HAL_DFSDM_FilterAwdCallback;
  1676. }
  1677. else
  1678. {
  1679. /* update the error code */
  1680. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
  1681. /* update return status */
  1682. status = HAL_ERROR;
  1683. }
  1684. return status;
  1685. }
  1686. #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */
  1687. /**
  1688. * @}
  1689. */
  1690. /** @defgroup DFSDM_Exported_Functions_Group2_Filter Filter control functions
  1691. * @brief Filter control functions
  1692. *
  1693. @verbatim
  1694. ==============================================================================
  1695. ##### Filter control functions #####
  1696. ==============================================================================
  1697. [..] This section provides functions allowing to:
  1698. (+) Select channel and enable/disable continuous mode for regular conversion.
  1699. (+) Select channels for injected conversion.
  1700. @endverbatim
  1701. * @{
  1702. */
  1703. /**
  1704. * @brief This function allows to select channel and to enable/disable
  1705. * continuous mode for regular conversion.
  1706. * @param hdfsdm_filter DFSDM filter handle.
  1707. * @param Channel Channel for regular conversion.
  1708. * This parameter can be a value of @ref DFSDM_Channel_Selection.
  1709. * @param ContinuousMode Enable/disable continuous mode for regular conversion.
  1710. * This parameter can be a value of @ref DFSDM_ContinuousMode.
  1711. * @retval HAL status
  1712. */
  1713. HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1714. uint32_t Channel,
  1715. uint32_t ContinuousMode)
  1716. {
  1717. HAL_StatusTypeDef status = HAL_OK;
  1718. /* Check parameters */
  1719. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1720. assert_param(IS_DFSDM_REGULAR_CHANNEL(Channel));
  1721. assert_param(IS_DFSDM_CONTINUOUS_MODE(ContinuousMode));
  1722. /* Check DFSDM filter state */
  1723. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
  1724. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
  1725. {
  1726. /* Configure channel and continuous mode for regular conversion */
  1727. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RCH | DFSDM_FLTCR1_RCONT);
  1728. if(ContinuousMode == DFSDM_CONTINUOUS_CONV_ON)
  1729. {
  1730. hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) (((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET) |
  1731. DFSDM_FLTCR1_RCONT);
  1732. }
  1733. else
  1734. {
  1735. hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) ((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET);
  1736. }
  1737. /* Store continuous mode information */
  1738. hdfsdm_filter->RegularContMode = ContinuousMode;
  1739. }
  1740. else
  1741. {
  1742. status = HAL_ERROR;
  1743. }
  1744. /* Return function status */
  1745. return status;
  1746. }
  1747. /**
  1748. * @brief This function allows to select channels for injected conversion.
  1749. * @param hdfsdm_filter DFSDM filter handle.
  1750. * @param Channel Channels for injected conversion.
  1751. * This parameter can be a values combination of @ref DFSDM_Channel_Selection.
  1752. * @retval HAL status
  1753. */
  1754. HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1755. uint32_t Channel)
  1756. {
  1757. HAL_StatusTypeDef status = HAL_OK;
  1758. /* Check parameters */
  1759. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1760. assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
  1761. /* Check DFSDM filter state */
  1762. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
  1763. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
  1764. {
  1765. /* Configure channel for injected conversion */
  1766. hdfsdm_filter->Instance->FLTJCHGR = (uint32_t) (Channel & DFSDM_LSB_MASK);
  1767. /* Store number of injected channels */
  1768. hdfsdm_filter->InjectedChannelsNbr = DFSDM_GetInjChannelsNbr(Channel);
  1769. /* Update number of injected channels remaining */
  1770. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  1771. hdfsdm_filter->InjectedChannelsNbr : 1U;
  1772. }
  1773. else
  1774. {
  1775. status = HAL_ERROR;
  1776. }
  1777. /* Return function status */
  1778. return status;
  1779. }
  1780. /**
  1781. * @}
  1782. */
  1783. /** @defgroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions
  1784. * @brief Filter operation functions
  1785. *
  1786. @verbatim
  1787. ==============================================================================
  1788. ##### Filter operation functions #####
  1789. ==============================================================================
  1790. [..] This section provides functions allowing to:
  1791. (+) Start conversion of regular/injected channel.
  1792. (+) Poll for the end of regular/injected conversion.
  1793. (+) Stop conversion of regular/injected channel.
  1794. (+) Start conversion of regular/injected channel and enable interrupt.
  1795. (+) Call the callback functions at the end of regular/injected conversions.
  1796. (+) Stop conversion of regular/injected channel and disable interrupt.
  1797. (+) Start conversion of regular/injected channel and enable DMA transfer.
  1798. (+) Stop conversion of regular/injected channel and disable DMA transfer.
  1799. (+) Start analog watchdog and enable interrupt.
  1800. (+) Call the callback function when analog watchdog occurs.
  1801. (+) Stop analog watchdog and disable interrupt.
  1802. (+) Start extreme detector.
  1803. (+) Stop extreme detector.
  1804. (+) Get result of regular channel conversion.
  1805. (+) Get result of injected channel conversion.
  1806. (+) Get extreme detector maximum and minimum values.
  1807. (+) Get conversion time.
  1808. (+) Handle DFSDM interrupt request.
  1809. @endverbatim
  1810. * @{
  1811. */
  1812. /**
  1813. * @brief This function allows to start regular conversion in polling mode.
  1814. * @note This function should be called only when DFSDM filter instance is
  1815. * in idle state or if injected conversion is ongoing.
  1816. * @param hdfsdm_filter DFSDM filter handle.
  1817. * @retval HAL status
  1818. */
  1819. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1820. {
  1821. HAL_StatusTypeDef status = HAL_OK;
  1822. /* Check parameters */
  1823. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1824. /* Check DFSDM filter state */
  1825. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1826. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
  1827. {
  1828. /* Start regular conversion */
  1829. DFSDM_RegConvStart(hdfsdm_filter);
  1830. }
  1831. else
  1832. {
  1833. status = HAL_ERROR;
  1834. }
  1835. /* Return function status */
  1836. return status;
  1837. }
  1838. /**
  1839. * @brief This function allows to poll for the end of regular conversion.
  1840. * @note This function should be called only if regular conversion is ongoing.
  1841. * @param hdfsdm_filter DFSDM filter handle.
  1842. * @param Timeout Timeout value in milliseconds.
  1843. * @retval HAL status
  1844. */
  1845. HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1846. uint32_t Timeout)
  1847. {
  1848. uint32_t tickstart;
  1849. /* Check parameters */
  1850. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1851. /* Check DFSDM filter state */
  1852. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
  1853. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1854. {
  1855. /* Return error status */
  1856. return HAL_ERROR;
  1857. }
  1858. else
  1859. {
  1860. /* Get timeout */
  1861. tickstart = HAL_GetTick();
  1862. /* Wait end of regular conversion */
  1863. while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != DFSDM_FLTISR_REOCF)
  1864. {
  1865. /* Check the Timeout */
  1866. if(Timeout != HAL_MAX_DELAY)
  1867. {
  1868. if(((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
  1869. {
  1870. /* Return timeout status */
  1871. return HAL_TIMEOUT;
  1872. }
  1873. }
  1874. }
  1875. /* Check if overrun occurs */
  1876. if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) == DFSDM_FLTISR_ROVRF)
  1877. {
  1878. /* Update error code and call error callback */
  1879. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
  1880. #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
  1881. hdfsdm_filter->ErrorCallback(hdfsdm_filter);
  1882. #else
  1883. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  1884. #endif
  1885. /* Clear regular overrun flag */
  1886. hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
  1887. }
  1888. /* Update DFSDM filter state only if not continuous conversion and SW trigger */
  1889. if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  1890. (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
  1891. {
  1892. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
  1893. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
  1894. }
  1895. /* Return function status */
  1896. return HAL_OK;
  1897. }
  1898. }
  1899. /**
  1900. * @brief This function allows to stop regular conversion in polling mode.
  1901. * @note This function should be called only if regular conversion is ongoing.
  1902. * @param hdfsdm_filter DFSDM filter handle.
  1903. * @retval HAL status
  1904. */
  1905. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1906. {
  1907. HAL_StatusTypeDef status = HAL_OK;
  1908. /* Check parameters */
  1909. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1910. /* Check DFSDM filter state */
  1911. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
  1912. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1913. {
  1914. /* Return error status */
  1915. status = HAL_ERROR;
  1916. }
  1917. else
  1918. {
  1919. /* Stop regular conversion */
  1920. DFSDM_RegConvStop(hdfsdm_filter);
  1921. }
  1922. /* Return function status */
  1923. return status;
  1924. }
  1925. /**
  1926. * @brief This function allows to start regular conversion in interrupt mode.
  1927. * @note This function should be called only when DFSDM filter instance is
  1928. * in idle state or if injected conversion is ongoing.
  1929. * @param hdfsdm_filter DFSDM filter handle.
  1930. * @retval HAL status
  1931. */
  1932. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1933. {
  1934. HAL_StatusTypeDef status = HAL_OK;
  1935. /* Check parameters */
  1936. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1937. /* Check DFSDM filter state */
  1938. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1939. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
  1940. {
  1941. /* Enable interrupts for regular conversions */
  1942. hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
  1943. /* Start regular conversion */
  1944. DFSDM_RegConvStart(hdfsdm_filter);
  1945. }
  1946. else
  1947. {
  1948. status = HAL_ERROR;
  1949. }
  1950. /* Return function status */
  1951. return status;
  1952. }
  1953. /**
  1954. * @brief This function allows to stop regular conversion in interrupt mode.
  1955. * @note This function should be called only if regular conversion is ongoing.
  1956. * @param hdfsdm_filter DFSDM filter handle.
  1957. * @retval HAL status
  1958. */
  1959. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1960. {
  1961. HAL_StatusTypeDef status = HAL_OK;
  1962. /* Check parameters */
  1963. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1964. /* Check DFSDM filter state */
  1965. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
  1966. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1967. {
  1968. /* Return error status */
  1969. status = HAL_ERROR;
  1970. }
  1971. else
  1972. {
  1973. /* Disable interrupts for regular conversions */
  1974. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
  1975. /* Stop regular conversion */
  1976. DFSDM_RegConvStop(hdfsdm_filter);
  1977. }
  1978. /* Return function status */
  1979. return status;
  1980. }
  1981. /**
  1982. * @brief This function allows to start regular conversion in DMA mode.
  1983. * @note This function should be called only when DFSDM filter instance is
  1984. * in idle state or if injected conversion is ongoing.
  1985. * Please note that data on buffer will contain signed regular conversion
  1986. * value on 24 most significant bits and corresponding channel on 3 least
  1987. * significant bits.
  1988. * @param hdfsdm_filter DFSDM filter handle.
  1989. * @param pData The destination buffer address.
  1990. * @param Length The length of data to be transferred from DFSDM filter to memory.
  1991. * @retval HAL status
  1992. */
  1993. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1994. int32_t *pData,
  1995. uint32_t Length)
  1996. {
  1997. HAL_StatusTypeDef status = HAL_OK;
  1998. /* Check parameters */
  1999. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2000. /* Check destination address and length */
  2001. if((pData == NULL) || (Length == 0U))
  2002. {
  2003. status = HAL_ERROR;
  2004. }
  2005. /* Check that DMA is enabled for regular conversion */
  2006. else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
  2007. {
  2008. status = HAL_ERROR;
  2009. }
  2010. /* Check parameters compatibility */
  2011. else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  2012. (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  2013. (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
  2014. (Length != 1U))
  2015. {
  2016. status = HAL_ERROR;
  2017. }
  2018. else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  2019. (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  2020. (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
  2021. {
  2022. status = HAL_ERROR;
  2023. }
  2024. /* Check DFSDM filter state */
  2025. else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  2026. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
  2027. {
  2028. /* Set callbacks on DMA handler */
  2029. hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
  2030. hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
  2031. hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
  2032. DFSDM_DMARegularHalfConvCplt : NULL;
  2033. /* Start DMA in interrupt mode */
  2034. if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \
  2035. (uint32_t) pData, Length) != HAL_OK)
  2036. {
  2037. /* Set DFSDM filter in error state */
  2038. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  2039. status = HAL_ERROR;
  2040. }
  2041. else
  2042. {
  2043. /* Start regular conversion */
  2044. DFSDM_RegConvStart(hdfsdm_filter);
  2045. }
  2046. }
  2047. else
  2048. {
  2049. status = HAL_ERROR;
  2050. }
  2051. /* Return function status */
  2052. return status;
  2053. }
  2054. /**
  2055. * @brief This function allows to start regular conversion in DMA mode and to get
  2056. * only the 16 most significant bits of conversion.
  2057. * @note This function should be called only when DFSDM filter instance is
  2058. * in idle state or if injected conversion is ongoing.
  2059. * Please note that data on buffer will contain signed 16 most significant
  2060. * bits of regular conversion.
  2061. * @param hdfsdm_filter DFSDM filter handle.
  2062. * @param pData The destination buffer address.
  2063. * @param Length The length of data to be transferred from DFSDM filter to memory.
  2064. * @retval HAL status
  2065. */
  2066. HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2067. int16_t *pData,
  2068. uint32_t Length)
  2069. {
  2070. HAL_StatusTypeDef status = HAL_OK;
  2071. /* Check parameters */
  2072. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2073. /* Check destination address and length */
  2074. if((pData == NULL) || (Length == 0U))
  2075. {
  2076. status = HAL_ERROR;
  2077. }
  2078. /* Check that DMA is enabled for regular conversion */
  2079. else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
  2080. {
  2081. status = HAL_ERROR;
  2082. }
  2083. /* Check parameters compatibility */
  2084. else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  2085. (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  2086. (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
  2087. (Length != 1U))
  2088. {
  2089. status = HAL_ERROR;
  2090. }
  2091. else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  2092. (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  2093. (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
  2094. {
  2095. status = HAL_ERROR;
  2096. }
  2097. /* Check DFSDM filter state */
  2098. else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  2099. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
  2100. {
  2101. /* Set callbacks on DMA handler */
  2102. hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
  2103. hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
  2104. hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
  2105. DFSDM_DMARegularHalfConvCplt : NULL;
  2106. /* Start DMA in interrupt mode */
  2107. if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)(&hdfsdm_filter->Instance->FLTRDATAR) + 2U, \
  2108. (uint32_t) pData, Length) != HAL_OK)
  2109. {
  2110. /* Set DFSDM filter in error state */
  2111. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  2112. status = HAL_ERROR;
  2113. }
  2114. else
  2115. {
  2116. /* Start regular conversion */
  2117. DFSDM_RegConvStart(hdfsdm_filter);
  2118. }
  2119. }
  2120. else
  2121. {
  2122. status = HAL_ERROR;
  2123. }
  2124. /* Return function status */
  2125. return status;
  2126. }
  2127. /**
  2128. * @brief This function allows to stop regular conversion in DMA mode.
  2129. * @note This function should be called only if regular conversion is ongoing.
  2130. * @param hdfsdm_filter DFSDM filter handle.
  2131. * @retval HAL status
  2132. */
  2133. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2134. {
  2135. HAL_StatusTypeDef status = HAL_OK;
  2136. /* Check parameters */
  2137. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2138. /* Check DFSDM filter state */
  2139. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
  2140. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  2141. {
  2142. /* Return error status */
  2143. status = HAL_ERROR;
  2144. }
  2145. else
  2146. {
  2147. /* Stop current DMA transfer */
  2148. if(HAL_DMA_Abort(hdfsdm_filter->hdmaReg) != HAL_OK)
  2149. {
  2150. /* Set DFSDM filter in error state */
  2151. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  2152. status = HAL_ERROR;
  2153. }
  2154. else
  2155. {
  2156. /* Stop regular conversion */
  2157. DFSDM_RegConvStop(hdfsdm_filter);
  2158. }
  2159. }
  2160. /* Return function status */
  2161. return status;
  2162. }
  2163. /**
  2164. * @brief This function allows to get regular conversion value.
  2165. * @param hdfsdm_filter DFSDM filter handle.
  2166. * @param Channel Corresponding channel of regular conversion.
  2167. * @retval Regular conversion value
  2168. */
  2169. int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2170. uint32_t *Channel)
  2171. {
  2172. uint32_t reg;
  2173. int32_t value;
  2174. /* Check parameters */
  2175. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2176. assert_param(Channel != (void *)0);
  2177. /* Get value of data register for regular channel */
  2178. reg = hdfsdm_filter->Instance->FLTRDATAR;
  2179. /* Extract channel and regular conversion value */
  2180. *Channel = (reg & DFSDM_FLTRDATAR_RDATACH);
  2181. /* Regular conversion value is a signed value located on 24 MSB of register */
  2182. /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
  2183. reg &= DFSDM_FLTRDATAR_RDATA;
  2184. value = ((int32_t)reg) / 256;
  2185. /* return regular conversion value */
  2186. return value;
  2187. }
  2188. /**
  2189. * @brief This function allows to start injected conversion in polling mode.
  2190. * @note This function should be called only when DFSDM filter instance is
  2191. * in idle state or if regular conversion is ongoing.
  2192. * @param hdfsdm_filter DFSDM filter handle.
  2193. * @retval HAL status
  2194. */
  2195. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2196. {
  2197. HAL_StatusTypeDef status = HAL_OK;
  2198. /* Check parameters */
  2199. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2200. /* Check DFSDM filter state */
  2201. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  2202. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
  2203. {
  2204. /* Start injected conversion */
  2205. DFSDM_InjConvStart(hdfsdm_filter);
  2206. }
  2207. else
  2208. {
  2209. status = HAL_ERROR;
  2210. }
  2211. /* Return function status */
  2212. return status;
  2213. }
  2214. /**
  2215. * @brief This function allows to poll for the end of injected conversion.
  2216. * @note This function should be called only if injected conversion is ongoing.
  2217. * @param hdfsdm_filter DFSDM filter handle.
  2218. * @param Timeout Timeout value in milliseconds.
  2219. * @retval HAL status
  2220. */
  2221. HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2222. uint32_t Timeout)
  2223. {
  2224. uint32_t tickstart;
  2225. /* Check parameters */
  2226. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2227. /* Check DFSDM filter state */
  2228. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
  2229. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  2230. {
  2231. /* Return error status */
  2232. return HAL_ERROR;
  2233. }
  2234. else
  2235. {
  2236. /* Get timeout */
  2237. tickstart = HAL_GetTick();
  2238. /* Wait end of injected conversions */
  2239. while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != DFSDM_FLTISR_JEOCF)
  2240. {
  2241. /* Check the Timeout */
  2242. if(Timeout != HAL_MAX_DELAY)
  2243. {
  2244. if(((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
  2245. {
  2246. /* Return timeout status */
  2247. return HAL_TIMEOUT;
  2248. }
  2249. }
  2250. }
  2251. /* Check if overrun occurs */
  2252. if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) == DFSDM_FLTISR_JOVRF)
  2253. {
  2254. /* Update error code and call error callback */
  2255. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
  2256. #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
  2257. hdfsdm_filter->ErrorCallback(hdfsdm_filter);
  2258. #else
  2259. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  2260. #endif
  2261. /* Clear injected overrun flag */
  2262. hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
  2263. }
  2264. /* Update remaining injected conversions */
  2265. hdfsdm_filter->InjConvRemaining--;
  2266. if(hdfsdm_filter->InjConvRemaining == 0U)
  2267. {
  2268. /* Update DFSDM filter state only if trigger is software */
  2269. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  2270. {
  2271. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
  2272. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
  2273. }
  2274. /* end of injected sequence, reset the value */
  2275. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  2276. hdfsdm_filter->InjectedChannelsNbr : 1U;
  2277. }
  2278. /* Return function status */
  2279. return HAL_OK;
  2280. }
  2281. }
  2282. /**
  2283. * @brief This function allows to stop injected conversion in polling mode.
  2284. * @note This function should be called only if injected conversion is ongoing.
  2285. * @param hdfsdm_filter DFSDM filter handle.
  2286. * @retval HAL status
  2287. */
  2288. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2289. {
  2290. HAL_StatusTypeDef status = HAL_OK;
  2291. /* Check parameters */
  2292. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2293. /* Check DFSDM filter state */
  2294. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
  2295. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  2296. {
  2297. /* Return error status */
  2298. status = HAL_ERROR;
  2299. }
  2300. else
  2301. {
  2302. /* Stop injected conversion */
  2303. DFSDM_InjConvStop(hdfsdm_filter);
  2304. }
  2305. /* Return function status */
  2306. return status;
  2307. }
  2308. /**
  2309. * @brief This function allows to start injected conversion in interrupt mode.
  2310. * @note This function should be called only when DFSDM filter instance is
  2311. * in idle state or if regular conversion is ongoing.
  2312. * @param hdfsdm_filter DFSDM filter handle.
  2313. * @retval HAL status
  2314. */
  2315. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2316. {
  2317. HAL_StatusTypeDef status = HAL_OK;
  2318. /* Check parameters */
  2319. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2320. /* Check DFSDM filter state */
  2321. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  2322. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
  2323. {
  2324. /* Enable interrupts for injected conversions */
  2325. hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
  2326. /* Start injected conversion */
  2327. DFSDM_InjConvStart(hdfsdm_filter);
  2328. }
  2329. else
  2330. {
  2331. status = HAL_ERROR;
  2332. }
  2333. /* Return function status */
  2334. return status;
  2335. }
  2336. /**
  2337. * @brief This function allows to stop injected conversion in interrupt mode.
  2338. * @note This function should be called only if injected conversion is ongoing.
  2339. * @param hdfsdm_filter DFSDM filter handle.
  2340. * @retval HAL status
  2341. */
  2342. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2343. {
  2344. HAL_StatusTypeDef status = HAL_OK;
  2345. /* Check parameters */
  2346. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2347. /* Check DFSDM filter state */
  2348. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
  2349. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  2350. {
  2351. /* Return error status */
  2352. status = HAL_ERROR;
  2353. }
  2354. else
  2355. {
  2356. /* Disable interrupts for injected conversions */
  2357. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
  2358. /* Stop injected conversion */
  2359. DFSDM_InjConvStop(hdfsdm_filter);
  2360. }
  2361. /* Return function status */
  2362. return status;
  2363. }
  2364. /**
  2365. * @brief This function allows to start injected conversion in DMA mode.
  2366. * @note This function should be called only when DFSDM filter instance is
  2367. * in idle state or if regular conversion is ongoing.
  2368. * Please note that data on buffer will contain signed injected conversion
  2369. * value on 24 most significant bits and corresponding channel on 3 least
  2370. * significant bits.
  2371. * @param hdfsdm_filter DFSDM filter handle.
  2372. * @param pData The destination buffer address.
  2373. * @param Length The length of data to be transferred from DFSDM filter to memory.
  2374. * @retval HAL status
  2375. */
  2376. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2377. int32_t *pData,
  2378. uint32_t Length)
  2379. {
  2380. HAL_StatusTypeDef status = HAL_OK;
  2381. /* Check parameters */
  2382. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2383. /* Check destination address and length */
  2384. if((pData == NULL) || (Length == 0U))
  2385. {
  2386. status = HAL_ERROR;
  2387. }
  2388. /* Check that DMA is enabled for injected conversion */
  2389. else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
  2390. {
  2391. status = HAL_ERROR;
  2392. }
  2393. /* Check parameters compatibility */
  2394. else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  2395. (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
  2396. (Length > hdfsdm_filter->InjConvRemaining))
  2397. {
  2398. status = HAL_ERROR;
  2399. }
  2400. else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  2401. (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
  2402. {
  2403. status = HAL_ERROR;
  2404. }
  2405. /* Check DFSDM filter state */
  2406. else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  2407. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
  2408. {
  2409. /* Set callbacks on DMA handler */
  2410. hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
  2411. hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
  2412. hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
  2413. DFSDM_DMAInjectedHalfConvCplt : NULL;
  2414. /* Start DMA in interrupt mode */
  2415. if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)&hdfsdm_filter->Instance->FLTJDATAR, \
  2416. (uint32_t) pData, Length) != HAL_OK)
  2417. {
  2418. /* Set DFSDM filter in error state */
  2419. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  2420. status = HAL_ERROR;
  2421. }
  2422. else
  2423. {
  2424. /* Start injected conversion */
  2425. DFSDM_InjConvStart(hdfsdm_filter);
  2426. }
  2427. }
  2428. else
  2429. {
  2430. status = HAL_ERROR;
  2431. }
  2432. /* Return function status */
  2433. return status;
  2434. }
  2435. /**
  2436. * @brief This function allows to start injected conversion in DMA mode and to get
  2437. * only the 16 most significant bits of conversion.
  2438. * @note This function should be called only when DFSDM filter instance is
  2439. * in idle state or if regular conversion is ongoing.
  2440. * Please note that data on buffer will contain signed 16 most significant
  2441. * bits of injected conversion.
  2442. * @param hdfsdm_filter DFSDM filter handle.
  2443. * @param pData The destination buffer address.
  2444. * @param Length The length of data to be transferred from DFSDM filter to memory.
  2445. * @retval HAL status
  2446. */
  2447. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2448. int16_t *pData,
  2449. uint32_t Length)
  2450. {
  2451. HAL_StatusTypeDef status = HAL_OK;
  2452. /* Check parameters */
  2453. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2454. /* Check destination address and length */
  2455. if((pData == NULL) || (Length == 0U))
  2456. {
  2457. status = HAL_ERROR;
  2458. }
  2459. /* Check that DMA is enabled for injected conversion */
  2460. else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
  2461. {
  2462. status = HAL_ERROR;
  2463. }
  2464. /* Check parameters compatibility */
  2465. else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  2466. (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
  2467. (Length > hdfsdm_filter->InjConvRemaining))
  2468. {
  2469. status = HAL_ERROR;
  2470. }
  2471. else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  2472. (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
  2473. {
  2474. status = HAL_ERROR;
  2475. }
  2476. /* Check DFSDM filter state */
  2477. else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  2478. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
  2479. {
  2480. /* Set callbacks on DMA handler */
  2481. hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
  2482. hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
  2483. hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
  2484. DFSDM_DMAInjectedHalfConvCplt : NULL;
  2485. /* Start DMA in interrupt mode */
  2486. if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)(&hdfsdm_filter->Instance->FLTJDATAR) + 2U, \
  2487. (uint32_t) pData, Length) != HAL_OK)
  2488. {
  2489. /* Set DFSDM filter in error state */
  2490. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  2491. status = HAL_ERROR;
  2492. }
  2493. else
  2494. {
  2495. /* Start injected conversion */
  2496. DFSDM_InjConvStart(hdfsdm_filter);
  2497. }
  2498. }
  2499. else
  2500. {
  2501. status = HAL_ERROR;
  2502. }
  2503. /* Return function status */
  2504. return status;
  2505. }
  2506. /**
  2507. * @brief This function allows to stop injected conversion in DMA mode.
  2508. * @note This function should be called only if injected conversion is ongoing.
  2509. * @param hdfsdm_filter DFSDM filter handle.
  2510. * @retval HAL status
  2511. */
  2512. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2513. {
  2514. HAL_StatusTypeDef status = HAL_OK;
  2515. /* Check parameters */
  2516. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2517. /* Check DFSDM filter state */
  2518. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
  2519. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  2520. {
  2521. /* Return error status */
  2522. status = HAL_ERROR;
  2523. }
  2524. else
  2525. {
  2526. /* Stop current DMA transfer */
  2527. if(HAL_DMA_Abort(hdfsdm_filter->hdmaInj) != HAL_OK)
  2528. {
  2529. /* Set DFSDM filter in error state */
  2530. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  2531. status = HAL_ERROR;
  2532. }
  2533. else
  2534. {
  2535. /* Stop regular conversion */
  2536. DFSDM_InjConvStop(hdfsdm_filter);
  2537. }
  2538. }
  2539. /* Return function status */
  2540. return status;
  2541. }
  2542. /**
  2543. * @brief This function allows to get injected conversion value.
  2544. * @param hdfsdm_filter DFSDM filter handle.
  2545. * @param Channel Corresponding channel of injected conversion.
  2546. * @retval Injected conversion value
  2547. */
  2548. int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2549. uint32_t *Channel)
  2550. {
  2551. uint32_t reg;
  2552. int32_t value;
  2553. /* Check parameters */
  2554. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2555. assert_param(Channel != (void *)0);
  2556. /* Get value of data register for injected channel */
  2557. reg = hdfsdm_filter->Instance->FLTJDATAR;
  2558. /* Extract channel and injected conversion value */
  2559. *Channel = (reg & DFSDM_FLTJDATAR_JDATACH);
  2560. /* Injected conversion value is a signed value located on 24 MSB of register */
  2561. /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
  2562. reg &= DFSDM_FLTJDATAR_JDATA;
  2563. value = ((int32_t)reg) / 256;
  2564. /* return regular conversion value */
  2565. return value;
  2566. }
  2567. /**
  2568. * @brief This function allows to start filter analog watchdog in interrupt mode.
  2569. * @param hdfsdm_filter DFSDM filter handle.
  2570. * @param awdParam DFSDM filter analog watchdog parameters.
  2571. * @retval HAL status
  2572. */
  2573. HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2574. DFSDM_Filter_AwdParamTypeDef *awdParam)
  2575. {
  2576. HAL_StatusTypeDef status = HAL_OK;
  2577. /* Check parameters */
  2578. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2579. assert_param(IS_DFSDM_FILTER_AWD_DATA_SOURCE(awdParam->DataSource));
  2580. assert_param(IS_DFSDM_INJECTED_CHANNEL(awdParam->Channel));
  2581. assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->HighThreshold));
  2582. assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->LowThreshold));
  2583. assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->HighBreakSignal));
  2584. assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->LowBreakSignal));
  2585. /* Check DFSDM filter state */
  2586. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
  2587. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
  2588. {
  2589. /* Return error status */
  2590. status = HAL_ERROR;
  2591. }
  2592. else
  2593. {
  2594. /* Set analog watchdog data source */
  2595. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
  2596. hdfsdm_filter->Instance->FLTCR1 |= awdParam->DataSource;
  2597. /* Set thresholds and break signals */
  2598. hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
  2599. hdfsdm_filter->Instance->FLTAWHTR |= (((uint32_t) awdParam->HighThreshold << DFSDM_FLTAWHTR_AWHT_Pos) | \
  2600. awdParam->HighBreakSignal);
  2601. hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
  2602. hdfsdm_filter->Instance->FLTAWLTR |= (((uint32_t) awdParam->LowThreshold << DFSDM_FLTAWLTR_AWLT_Pos) | \
  2603. awdParam->LowBreakSignal);
  2604. /* Set channels and interrupt for analog watchdog */
  2605. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH);
  2606. hdfsdm_filter->Instance->FLTCR2 |= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_AWDCH_Pos) | \
  2607. DFSDM_FLTCR2_AWDIE);
  2608. }
  2609. /* Return function status */
  2610. return status;
  2611. }
  2612. /**
  2613. * @brief This function allows to stop filter analog watchdog in interrupt mode.
  2614. * @param hdfsdm_filter DFSDM filter handle.
  2615. * @retval HAL status
  2616. */
  2617. HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2618. {
  2619. HAL_StatusTypeDef status = HAL_OK;
  2620. /* Check parameters */
  2621. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2622. /* Check DFSDM filter state */
  2623. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
  2624. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
  2625. {
  2626. /* Return error status */
  2627. status = HAL_ERROR;
  2628. }
  2629. else
  2630. {
  2631. /* Reset channels for analog watchdog and deactivate interrupt */
  2632. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH | DFSDM_FLTCR2_AWDIE);
  2633. /* Clear all analog watchdog flags */
  2634. hdfsdm_filter->Instance->FLTAWCFR = (DFSDM_FLTAWCFR_CLRAWHTF | DFSDM_FLTAWCFR_CLRAWLTF);
  2635. /* Reset thresholds and break signals */
  2636. hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
  2637. hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
  2638. /* Reset analog watchdog data source */
  2639. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
  2640. }
  2641. /* Return function status */
  2642. return status;
  2643. }
  2644. /**
  2645. * @brief This function allows to start extreme detector feature.
  2646. * @param hdfsdm_filter DFSDM filter handle.
  2647. * @param Channel Channels where extreme detector is enabled.
  2648. * This parameter can be a values combination of @ref DFSDM_Channel_Selection.
  2649. * @retval HAL status
  2650. */
  2651. HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2652. uint32_t Channel)
  2653. {
  2654. HAL_StatusTypeDef status = HAL_OK;
  2655. /* Check parameters */
  2656. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2657. assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
  2658. /* Check DFSDM filter state */
  2659. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
  2660. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
  2661. {
  2662. /* Return error status */
  2663. status = HAL_ERROR;
  2664. }
  2665. else
  2666. {
  2667. /* Set channels for extreme detector */
  2668. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
  2669. hdfsdm_filter->Instance->FLTCR2 |= ((Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_EXCH_Pos);
  2670. }
  2671. /* Return function status */
  2672. return status;
  2673. }
  2674. /**
  2675. * @brief This function allows to stop extreme detector feature.
  2676. * @param hdfsdm_filter DFSDM filter handle.
  2677. * @retval HAL status
  2678. */
  2679. HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2680. {
  2681. HAL_StatusTypeDef status = HAL_OK;
  2682. __IO uint32_t reg1;
  2683. __IO uint32_t reg2;
  2684. /* Check parameters */
  2685. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2686. /* Check DFSDM filter state */
  2687. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
  2688. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
  2689. {
  2690. /* Return error status */
  2691. status = HAL_ERROR;
  2692. }
  2693. else
  2694. {
  2695. /* Reset channels for extreme detector */
  2696. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
  2697. /* Clear extreme detector values */
  2698. reg1 = hdfsdm_filter->Instance->FLTEXMAX;
  2699. reg2 = hdfsdm_filter->Instance->FLTEXMIN;
  2700. UNUSED(reg1); /* To avoid GCC warning */
  2701. UNUSED(reg2); /* To avoid GCC warning */
  2702. }
  2703. /* Return function status */
  2704. return status;
  2705. }
  2706. /**
  2707. * @brief This function allows to get extreme detector maximum value.
  2708. * @param hdfsdm_filter DFSDM filter handle.
  2709. * @param Channel Corresponding channel.
  2710. * @retval Extreme detector maximum value
  2711. * This value is between Min_Data = -8388608 and Max_Data = 8388607.
  2712. */
  2713. int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2714. uint32_t *Channel)
  2715. {
  2716. uint32_t reg;
  2717. int32_t value;
  2718. /* Check parameters */
  2719. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2720. assert_param(Channel != (void *)0);
  2721. /* Get value of extreme detector maximum register */
  2722. reg = hdfsdm_filter->Instance->FLTEXMAX;
  2723. /* Extract channel and extreme detector maximum value */
  2724. *Channel = (reg & DFSDM_FLTEXMAX_EXMAXCH);
  2725. /* Extreme detector maximum value is a signed value located on 24 MSB of register */
  2726. /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
  2727. reg &= DFSDM_FLTEXMAX_EXMAX;
  2728. value = ((int32_t)reg) / 256;
  2729. /* return extreme detector maximum value */
  2730. return value;
  2731. }
  2732. /**
  2733. * @brief This function allows to get extreme detector minimum value.
  2734. * @param hdfsdm_filter DFSDM filter handle.
  2735. * @param Channel Corresponding channel.
  2736. * @retval Extreme detector minimum value
  2737. * This value is between Min_Data = -8388608 and Max_Data = 8388607.
  2738. */
  2739. int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2740. uint32_t *Channel)
  2741. {
  2742. uint32_t reg;
  2743. int32_t value;
  2744. /* Check parameters */
  2745. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2746. assert_param(Channel != (void *)0);
  2747. /* Get value of extreme detector minimum register */
  2748. reg = hdfsdm_filter->Instance->FLTEXMIN;
  2749. /* Extract channel and extreme detector minimum value */
  2750. *Channel = (reg & DFSDM_FLTEXMIN_EXMINCH);
  2751. /* Extreme detector minimum value is a signed value located on 24 MSB of register */
  2752. /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
  2753. reg &= DFSDM_FLTEXMIN_EXMIN;
  2754. value = ((int32_t)reg) / 256;
  2755. /* return extreme detector minimum value */
  2756. return value;
  2757. }
  2758. /**
  2759. * @brief This function allows to get conversion time value.
  2760. * @param hdfsdm_filter DFSDM filter handle.
  2761. * @retval Conversion time value
  2762. * @note To get time in second, this value has to be divided by DFSDM clock frequency.
  2763. */
  2764. uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2765. {
  2766. uint32_t reg;
  2767. uint32_t value;
  2768. /* Check parameters */
  2769. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2770. /* Get value of conversion timer register */
  2771. reg = hdfsdm_filter->Instance->FLTCNVTIMR;
  2772. /* Extract conversion time value */
  2773. value = ((reg & DFSDM_FLTCNVTIMR_CNVCNT) >> DFSDM_FLTCNVTIMR_CNVCNT_Pos);
  2774. /* return extreme detector minimum value */
  2775. return value;
  2776. }
  2777. /**
  2778. * @brief This function handles the DFSDM interrupts.
  2779. * @param hdfsdm_filter DFSDM filter handle.
  2780. * @retval None
  2781. */
  2782. void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2783. {
  2784. DFSDM_Channel_HandleTypeDef **channelHandleTable;
  2785. const DFSDM_Filter_TypeDef *filter0Instance;
  2786. uint32_t channelNumber;
  2787. /* Get FTLISR and FLTCR2 register values */
  2788. const uint32_t temp_fltisr = hdfsdm_filter->Instance->FLTISR;
  2789. const uint32_t temp_fltcr2 = hdfsdm_filter->Instance->FLTCR2;
  2790. #if defined(DFSDM2_Channel0)
  2791. if (IS_DFSDM1_FILTER_INSTANCE(hdfsdm_filter->Instance))
  2792. {
  2793. channelHandleTable = a_dfsdm1ChannelHandle;
  2794. filter0Instance = DFSDM1_Filter0;
  2795. channelNumber = DFSDM1_CHANNEL_NUMBER;
  2796. }
  2797. else
  2798. {
  2799. channelHandleTable = a_dfsdm2ChannelHandle;
  2800. filter0Instance = DFSDM2_Filter0;
  2801. channelNumber = DFSDM2_CHANNEL_NUMBER;
  2802. }
  2803. #else /* DFSDM2_Channel0 */
  2804. channelHandleTable = a_dfsdm1ChannelHandle;
  2805. filter0Instance = DFSDM1_Filter0;
  2806. channelNumber = DFSDM1_CHANNEL_NUMBER;
  2807. #endif /* DFSDM2_Channel0 */
  2808. /* Check if overrun occurs during regular conversion */
  2809. if(((temp_fltisr & DFSDM_FLTISR_ROVRF) != 0U) && \
  2810. ((temp_fltcr2 & DFSDM_FLTCR2_ROVRIE) != 0U))
  2811. {
  2812. /* Clear regular overrun flag */
  2813. hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
  2814. /* Update error code */
  2815. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
  2816. /* Call error callback */
  2817. #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
  2818. hdfsdm_filter->ErrorCallback(hdfsdm_filter);
  2819. #else
  2820. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  2821. #endif
  2822. }
  2823. /* Check if overrun occurs during injected conversion */
  2824. else if(((temp_fltisr & DFSDM_FLTISR_JOVRF) != 0U) && \
  2825. ((temp_fltcr2 & DFSDM_FLTCR2_JOVRIE) != 0U))
  2826. {
  2827. /* Clear injected overrun flag */
  2828. hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
  2829. /* Update error code */
  2830. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
  2831. /* Call error callback */
  2832. #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
  2833. hdfsdm_filter->ErrorCallback(hdfsdm_filter);
  2834. #else
  2835. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  2836. #endif
  2837. }
  2838. /* Check if end of regular conversion */
  2839. else if(((temp_fltisr & DFSDM_FLTISR_REOCF) != 0U) && \
  2840. ((temp_fltcr2 & DFSDM_FLTCR2_REOCIE) != 0U))
  2841. {
  2842. /* Call regular conversion complete callback */
  2843. #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
  2844. hdfsdm_filter->RegConvCpltCallback(hdfsdm_filter);
  2845. #else
  2846. HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
  2847. #endif
  2848. /* End of conversion if mode is not continuous and software trigger */
  2849. if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  2850. (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
  2851. {
  2852. /* Disable interrupts for regular conversions */
  2853. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE);
  2854. /* Update DFSDM filter state */
  2855. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
  2856. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
  2857. }
  2858. }
  2859. /* Check if end of injected conversion */
  2860. else if(((temp_fltisr & DFSDM_FLTISR_JEOCF) != 0U) && \
  2861. ((temp_fltcr2 & DFSDM_FLTCR2_JEOCIE) != 0U))
  2862. {
  2863. /* Call injected conversion complete callback */
  2864. #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
  2865. hdfsdm_filter->InjConvCpltCallback(hdfsdm_filter);
  2866. #else
  2867. HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
  2868. #endif
  2869. /* Update remaining injected conversions */
  2870. hdfsdm_filter->InjConvRemaining--;
  2871. if(hdfsdm_filter->InjConvRemaining == 0U)
  2872. {
  2873. /* End of conversion if trigger is software */
  2874. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  2875. {
  2876. /* Disable interrupts for injected conversions */
  2877. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE);
  2878. /* Update DFSDM filter state */
  2879. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
  2880. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
  2881. }
  2882. /* end of injected sequence, reset the value */
  2883. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  2884. hdfsdm_filter->InjectedChannelsNbr : 1U;
  2885. }
  2886. }
  2887. /* Check if analog watchdog occurs */
  2888. else if(((temp_fltisr & DFSDM_FLTISR_AWDF) != 0U) && \
  2889. ((temp_fltcr2 & DFSDM_FLTCR2_AWDIE) != 0U))
  2890. {
  2891. uint32_t reg;
  2892. uint32_t threshold;
  2893. uint32_t channel = 0;
  2894. /* Get channel and threshold */
  2895. reg = hdfsdm_filter->Instance->FLTAWSR;
  2896. threshold = ((reg & DFSDM_FLTAWSR_AWLTF) != 0U) ? DFSDM_AWD_LOW_THRESHOLD : DFSDM_AWD_HIGH_THRESHOLD;
  2897. if(threshold == DFSDM_AWD_HIGH_THRESHOLD)
  2898. {
  2899. reg = reg >> DFSDM_FLTAWSR_AWHTF_Pos;
  2900. }
  2901. while (((reg & 1U) == 0U) && (channel < (channelNumber - 1U)))
  2902. {
  2903. channel++;
  2904. reg = reg >> 1;
  2905. }
  2906. /* Clear analog watchdog flag */
  2907. hdfsdm_filter->Instance->FLTAWCFR = (threshold == DFSDM_AWD_HIGH_THRESHOLD) ? \
  2908. (1UL << (DFSDM_FLTAWSR_AWHTF_Pos + channel)) : \
  2909. (1UL << channel);
  2910. /* Call analog watchdog callback */
  2911. #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
  2912. hdfsdm_filter->AwdCallback(hdfsdm_filter, channel, threshold);
  2913. #else
  2914. HAL_DFSDM_FilterAwdCallback(hdfsdm_filter, channel, threshold);
  2915. #endif
  2916. }
  2917. /* Check if clock absence occurs */
  2918. else if((hdfsdm_filter->Instance == filter0Instance) && \
  2919. ((temp_fltisr & DFSDM_FLTISR_CKABF) != 0U) && \
  2920. ((temp_fltcr2 & DFSDM_FLTCR2_CKABIE) != 0U))
  2921. {
  2922. uint32_t reg;
  2923. uint32_t channel = 0;
  2924. reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_Pos);
  2925. while (channel < channelNumber)
  2926. {
  2927. /* Check if flag is set and corresponding channel is enabled */
  2928. if (((reg & 1U) != 0U) && (channelHandleTable[channel] != NULL))
  2929. {
  2930. /* Check clock absence has been enabled for this channel */
  2931. if ((channelHandleTable[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0U)
  2932. {
  2933. /* Clear clock absence flag */
  2934. hdfsdm_filter->Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
  2935. /* Call clock absence callback */
  2936. #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
  2937. channelHandleTable[channel]->CkabCallback(channelHandleTable[channel]);
  2938. #else
  2939. HAL_DFSDM_ChannelCkabCallback(channelHandleTable[channel]);
  2940. #endif
  2941. }
  2942. }
  2943. channel++;
  2944. reg = reg >> 1;
  2945. }
  2946. }
  2947. /* Check if short circuit detection occurs */
  2948. else if((hdfsdm_filter->Instance == filter0Instance) && \
  2949. ((temp_fltisr & DFSDM_FLTISR_SCDF) != 0U) && \
  2950. ((temp_fltcr2 & DFSDM_FLTCR2_SCDIE) != 0U))
  2951. {
  2952. uint32_t reg;
  2953. uint32_t channel = 0;
  2954. /* Get channel */
  2955. reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_Pos);
  2956. while (((reg & 1U) == 0U) && (channel < (channelNumber - 1U)))
  2957. {
  2958. channel++;
  2959. reg = reg >> 1;
  2960. }
  2961. /* Clear short circuit detection flag */
  2962. hdfsdm_filter->Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
  2963. /* Call short circuit detection callback */
  2964. #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
  2965. channelHandleTable[channel]->ScdCallback(channelHandleTable[channel]);
  2966. #else
  2967. HAL_DFSDM_ChannelScdCallback(channelHandleTable[channel]);
  2968. #endif
  2969. }
  2970. }
  2971. /**
  2972. * @brief Regular conversion complete callback.
  2973. * @note In interrupt mode, user has to read conversion value in this function
  2974. * using HAL_DFSDM_FilterGetRegularValue.
  2975. * @param hdfsdm_filter DFSDM filter handle.
  2976. * @retval None
  2977. */
  2978. __weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2979. {
  2980. /* Prevent unused argument(s) compilation warning */
  2981. UNUSED(hdfsdm_filter);
  2982. /* NOTE : This function should not be modified, when the callback is needed,
  2983. the HAL_DFSDM_FilterRegConvCpltCallback could be implemented in the user file.
  2984. */
  2985. }
  2986. /**
  2987. * @brief Half regular conversion complete callback.
  2988. * @param hdfsdm_filter DFSDM filter handle.
  2989. * @retval None
  2990. */
  2991. __weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2992. {
  2993. /* Prevent unused argument(s) compilation warning */
  2994. UNUSED(hdfsdm_filter);
  2995. /* NOTE : This function should not be modified, when the callback is needed,
  2996. the HAL_DFSDM_FilterRegConvHalfCpltCallback could be implemented in the user file.
  2997. */
  2998. }
  2999. /**
  3000. * @brief Injected conversion complete callback.
  3001. * @note In interrupt mode, user has to read conversion value in this function
  3002. * using HAL_DFSDM_FilterGetInjectedValue.
  3003. * @param hdfsdm_filter DFSDM filter handle.
  3004. * @retval None
  3005. */
  3006. __weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  3007. {
  3008. /* Prevent unused argument(s) compilation warning */
  3009. UNUSED(hdfsdm_filter);
  3010. /* NOTE : This function should not be modified, when the callback is needed,
  3011. the HAL_DFSDM_FilterInjConvCpltCallback could be implemented in the user file.
  3012. */
  3013. }
  3014. /**
  3015. * @brief Half injected conversion complete callback.
  3016. * @param hdfsdm_filter DFSDM filter handle.
  3017. * @retval None
  3018. */
  3019. __weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  3020. {
  3021. /* Prevent unused argument(s) compilation warning */
  3022. UNUSED(hdfsdm_filter);
  3023. /* NOTE : This function should not be modified, when the callback is needed,
  3024. the HAL_DFSDM_FilterInjConvHalfCpltCallback could be implemented in the user file.
  3025. */
  3026. }
  3027. /**
  3028. * @brief Filter analog watchdog callback.
  3029. * @param hdfsdm_filter DFSDM filter handle.
  3030. * @param Channel Corresponding channel.
  3031. * @param Threshold Low or high threshold has been reached.
  3032. * @retval None
  3033. */
  3034. __weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  3035. uint32_t Channel, uint32_t Threshold)
  3036. {
  3037. /* Prevent unused argument(s) compilation warning */
  3038. UNUSED(hdfsdm_filter);
  3039. UNUSED(Channel);
  3040. UNUSED(Threshold);
  3041. /* NOTE : This function should not be modified, when the callback is needed,
  3042. the HAL_DFSDM_FilterAwdCallback could be implemented in the user file.
  3043. */
  3044. }
  3045. /**
  3046. * @brief Error callback.
  3047. * @param hdfsdm_filter DFSDM filter handle.
  3048. * @retval None
  3049. */
  3050. __weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  3051. {
  3052. /* Prevent unused argument(s) compilation warning */
  3053. UNUSED(hdfsdm_filter);
  3054. /* NOTE : This function should not be modified, when the callback is needed,
  3055. the HAL_DFSDM_FilterErrorCallback could be implemented in the user file.
  3056. */
  3057. }
  3058. /**
  3059. * @}
  3060. */
  3061. /** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions
  3062. * @brief Filter state functions
  3063. *
  3064. @verbatim
  3065. ==============================================================================
  3066. ##### Filter state functions #####
  3067. ==============================================================================
  3068. [..] This section provides functions allowing to:
  3069. (+) Get the DFSDM filter state.
  3070. (+) Get the DFSDM filter error.
  3071. @endverbatim
  3072. * @{
  3073. */
  3074. /**
  3075. * @brief This function allows to get the current DFSDM filter handle state.
  3076. * @param hdfsdm_filter DFSDM filter handle.
  3077. * @retval DFSDM filter state.
  3078. */
  3079. HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  3080. {
  3081. /* Return DFSDM filter handle state */
  3082. return hdfsdm_filter->State;
  3083. }
  3084. /**
  3085. * @brief This function allows to get the current DFSDM filter error.
  3086. * @param hdfsdm_filter DFSDM filter handle.
  3087. * @retval DFSDM filter error code.
  3088. */
  3089. uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  3090. {
  3091. return hdfsdm_filter->ErrorCode;
  3092. }
  3093. /**
  3094. * @}
  3095. */
  3096. /**
  3097. * @}
  3098. */
  3099. /* End of exported functions -------------------------------------------------*/
  3100. /* Private functions ---------------------------------------------------------*/
  3101. /** @addtogroup DFSDM_Private_Functions DFSDM Private Functions
  3102. * @{
  3103. */
  3104. /**
  3105. * @brief DMA half transfer complete callback for regular conversion.
  3106. * @param hdma DMA handle.
  3107. * @retval None
  3108. */
  3109. static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma)
  3110. {
  3111. /* Get DFSDM filter handle */
  3112. DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  3113. /* Call regular half conversion complete callback */
  3114. #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
  3115. hdfsdm_filter->RegConvHalfCpltCallback(hdfsdm_filter);
  3116. #else
  3117. HAL_DFSDM_FilterRegConvHalfCpltCallback(hdfsdm_filter);
  3118. #endif
  3119. }
  3120. /**
  3121. * @brief DMA transfer complete callback for regular conversion.
  3122. * @param hdma DMA handle.
  3123. * @retval None
  3124. */
  3125. static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma)
  3126. {
  3127. /* Get DFSDM filter handle */
  3128. DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  3129. /* Call regular conversion complete callback */
  3130. #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
  3131. hdfsdm_filter->RegConvCpltCallback(hdfsdm_filter);
  3132. #else
  3133. HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
  3134. #endif
  3135. }
  3136. /**
  3137. * @brief DMA half transfer complete callback for injected conversion.
  3138. * @param hdma DMA handle.
  3139. * @retval None
  3140. */
  3141. static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma)
  3142. {
  3143. /* Get DFSDM filter handle */
  3144. DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  3145. /* Call injected half conversion complete callback */
  3146. #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
  3147. hdfsdm_filter->InjConvHalfCpltCallback(hdfsdm_filter);
  3148. #else
  3149. HAL_DFSDM_FilterInjConvHalfCpltCallback(hdfsdm_filter);
  3150. #endif
  3151. }
  3152. /**
  3153. * @brief DMA transfer complete callback for injected conversion.
  3154. * @param hdma DMA handle.
  3155. * @retval None
  3156. */
  3157. static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma)
  3158. {
  3159. /* Get DFSDM filter handle */
  3160. DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  3161. /* Call injected conversion complete callback */
  3162. #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
  3163. hdfsdm_filter->InjConvCpltCallback(hdfsdm_filter);
  3164. #else
  3165. HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
  3166. #endif
  3167. }
  3168. /**
  3169. * @brief DMA error callback.
  3170. * @param hdma DMA handle.
  3171. * @retval None
  3172. */
  3173. static void DFSDM_DMAError(DMA_HandleTypeDef *hdma)
  3174. {
  3175. /* Get DFSDM filter handle */
  3176. DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  3177. /* Update error code */
  3178. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_DMA;
  3179. /* Call error callback */
  3180. #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
  3181. hdfsdm_filter->ErrorCallback(hdfsdm_filter);
  3182. #else
  3183. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  3184. #endif
  3185. }
  3186. /**
  3187. * @brief This function allows to get the number of injected channels.
  3188. * @param Channels bitfield of injected channels.
  3189. * @retval Number of injected channels.
  3190. */
  3191. static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels)
  3192. {
  3193. uint32_t nbChannels = 0;
  3194. uint32_t tmp;
  3195. /* Get the number of channels from bitfield */
  3196. tmp = (uint32_t)(Channels & DFSDM_LSB_MASK);
  3197. while(tmp != 0U)
  3198. {
  3199. if((tmp & 1U) != 0U)
  3200. {
  3201. nbChannels++;
  3202. }
  3203. tmp = (uint32_t)(tmp >> 1);
  3204. }
  3205. return nbChannels;
  3206. }
  3207. /**
  3208. * @brief This function allows to get the channel number from channel instance.
  3209. * @param Instance DFSDM channel instance.
  3210. * @retval Channel number.
  3211. */
  3212. static uint32_t DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef* Instance)
  3213. {
  3214. uint32_t channel;
  3215. /* Get channel from instance */
  3216. if(Instance == DFSDM1_Channel0)
  3217. {
  3218. channel = 0;
  3219. }
  3220. #if defined(DFSDM2_Channel0)
  3221. else if (Instance == DFSDM2_Channel0)
  3222. {
  3223. channel = 0;
  3224. }
  3225. else if (Instance == DFSDM2_Channel1)
  3226. {
  3227. channel = 1;
  3228. }
  3229. #endif /* DFSDM2_Channel0 */
  3230. else if(Instance == DFSDM1_Channel1)
  3231. {
  3232. channel = 1;
  3233. }
  3234. else if(Instance == DFSDM1_Channel2)
  3235. {
  3236. channel = 2;
  3237. }
  3238. else if(Instance == DFSDM1_Channel3)
  3239. {
  3240. channel = 3;
  3241. }
  3242. else if(Instance == DFSDM1_Channel4)
  3243. {
  3244. channel = 4;
  3245. }
  3246. else if(Instance == DFSDM1_Channel5)
  3247. {
  3248. channel = 5;
  3249. }
  3250. else if(Instance == DFSDM1_Channel6)
  3251. {
  3252. channel = 6;
  3253. }
  3254. else /* DFSDM1_Channel7 */
  3255. {
  3256. channel = 7;
  3257. }
  3258. return channel;
  3259. }
  3260. /**
  3261. * @brief This function allows to really start regular conversion.
  3262. * @param hdfsdm_filter DFSDM filter handle.
  3263. * @retval None
  3264. */
  3265. static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  3266. {
  3267. /* Check regular trigger */
  3268. if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)
  3269. {
  3270. /* Software start of regular conversion */
  3271. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
  3272. }
  3273. else /* synchronous trigger */
  3274. {
  3275. /* Disable DFSDM filter */
  3276. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  3277. /* Set RSYNC bit in DFSDM_FLTCR1 register */
  3278. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSYNC;
  3279. /* Enable DFSDM filter */
  3280. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  3281. /* If injected conversion was in progress, restart it */
  3282. if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)
  3283. {
  3284. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  3285. {
  3286. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
  3287. }
  3288. /* Update remaining injected conversions */
  3289. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  3290. hdfsdm_filter->InjectedChannelsNbr : 1U;
  3291. }
  3292. }
  3293. /* Update DFSDM filter state */
  3294. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
  3295. HAL_DFSDM_FILTER_STATE_REG : HAL_DFSDM_FILTER_STATE_REG_INJ;
  3296. }
  3297. /**
  3298. * @brief This function allows to really stop regular conversion.
  3299. * @param hdfsdm_filter DFSDM filter handle.
  3300. * @retval None
  3301. */
  3302. static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  3303. {
  3304. /* Disable DFSDM filter */
  3305. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  3306. /* If regular trigger was synchronous, reset RSYNC bit in DFSDM_FLTCR1 register */
  3307. if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SYNC_TRIGGER)
  3308. {
  3309. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
  3310. }
  3311. /* Enable DFSDM filter */
  3312. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  3313. /* If injected conversion was in progress, restart it */
  3314. if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ)
  3315. {
  3316. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  3317. {
  3318. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
  3319. }
  3320. /* Update remaining injected conversions */
  3321. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  3322. hdfsdm_filter->InjectedChannelsNbr : 1U;
  3323. }
  3324. /* Update DFSDM filter state */
  3325. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
  3326. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
  3327. }
  3328. /**
  3329. * @brief This function allows to really start injected conversion.
  3330. * @param hdfsdm_filter DFSDM filter handle.
  3331. * @retval None
  3332. */
  3333. static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  3334. {
  3335. /* Check injected trigger */
  3336. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  3337. {
  3338. /* Software start of injected conversion */
  3339. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
  3340. }
  3341. else /* external or synchronous trigger */
  3342. {
  3343. /* Disable DFSDM filter */
  3344. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  3345. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
  3346. {
  3347. /* Set JSYNC bit in DFSDM_FLTCR1 register */
  3348. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSYNC;
  3349. }
  3350. else /* external trigger */
  3351. {
  3352. /* Set JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
  3353. hdfsdm_filter->Instance->FLTCR1 |= hdfsdm_filter->ExtTriggerEdge;
  3354. }
  3355. /* Enable DFSDM filter */
  3356. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  3357. /* If regular conversion was in progress, restart it */
  3358. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) && \
  3359. (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
  3360. {
  3361. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
  3362. }
  3363. }
  3364. /* Update DFSDM filter state */
  3365. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
  3366. HAL_DFSDM_FILTER_STATE_INJ : HAL_DFSDM_FILTER_STATE_REG_INJ;
  3367. }
  3368. /**
  3369. * @brief This function allows to really stop injected conversion.
  3370. * @param hdfsdm_filter DFSDM filter handle.
  3371. * @retval None
  3372. */
  3373. static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  3374. {
  3375. /* Disable DFSDM filter */
  3376. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  3377. /* If injected trigger was synchronous, reset JSYNC bit in DFSDM_FLTCR1 register */
  3378. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
  3379. {
  3380. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC);
  3381. }
  3382. else if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_EXT_TRIGGER)
  3383. {
  3384. /* Reset JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
  3385. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JEXTEN);
  3386. }
  3387. else
  3388. {
  3389. /* Nothing to do */
  3390. }
  3391. /* Enable DFSDM filter */
  3392. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  3393. /* If regular conversion was in progress, restart it */
  3394. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) && \
  3395. (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
  3396. {
  3397. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
  3398. }
  3399. /* Update remaining injected conversions */
  3400. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  3401. hdfsdm_filter->InjectedChannelsNbr : 1U;
  3402. /* Update DFSDM filter state */
  3403. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
  3404. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
  3405. }
  3406. /**
  3407. * @}
  3408. */
  3409. /* End of private functions --------------------------------------------------*/
  3410. /**
  3411. * @}
  3412. */
  3413. #endif /* HAL_DFSDM_MODULE_ENABLED */
  3414. /**
  3415. * @}
  3416. */
  3417. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/