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  1. /**
  2. ******************************************************************************
  3. * @file stm32f7xx_hal_nand.h
  4. * @author MCD Application Team
  5. * @version V1.2.2
  6. * @date 14-April-2017
  7. * @brief Header file of NAND HAL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32F7xx_HAL_NAND_H
  39. #define __STM32F7xx_HAL_NAND_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. /* Includes ------------------------------------------------------------------*/
  44. #include "stm32f7xx_ll_fmc.h"
  45. /** @addtogroup STM32F7xx_HAL_Driver
  46. * @{
  47. */
  48. /** @addtogroup NAND
  49. * @{
  50. */
  51. /* Exported typedef ----------------------------------------------------------*/
  52. /* Exported types ------------------------------------------------------------*/
  53. /** @defgroup NAND_Exported_Types NAND Exported Types
  54. * @{
  55. */
  56. /**
  57. * @brief HAL NAND State structures definition
  58. */
  59. typedef enum
  60. {
  61. HAL_NAND_STATE_RESET = 0x00U, /*!< NAND not yet initialized or disabled */
  62. HAL_NAND_STATE_READY = 0x01U, /*!< NAND initialized and ready for use */
  63. HAL_NAND_STATE_BUSY = 0x02U, /*!< NAND internal process is ongoing */
  64. HAL_NAND_STATE_ERROR = 0x03U /*!< NAND error state */
  65. }HAL_NAND_StateTypeDef;
  66. /**
  67. * @brief NAND Memory electronic signature Structure definition
  68. */
  69. typedef struct
  70. {
  71. /*<! NAND memory electronic signature maker and device IDs */
  72. uint8_t Maker_Id;
  73. uint8_t Device_Id;
  74. uint8_t Third_Id;
  75. uint8_t Fourth_Id;
  76. }NAND_IDTypeDef;
  77. /**
  78. * @brief NAND Memory address Structure definition
  79. */
  80. typedef struct
  81. {
  82. uint16_t Page; /*!< NAND memory Page address */
  83. uint16_t Plane; /*!< NAND memory Zone address */
  84. uint16_t Block; /*!< NAND memory Block address */
  85. }NAND_AddressTypeDef;
  86. /**
  87. * @brief NAND Memory info Structure definition
  88. */
  89. typedef struct
  90. {
  91. uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in bytes
  92. for 8 bits adressing or words for 16 bits addressing */
  93. uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in bytes
  94. for 8 bits adressing or words for 16 bits addressing */
  95. uint32_t BlockSize; /*!< NAND memory block size measured in number of pages */
  96. uint32_t BlockNbr; /*!< NAND memory number of total blocks */
  97. uint32_t PlaneNbr; /*!< NAND memory number of planes */
  98. uint32_t PlaneSize; /*!< NAND memory zone size measured in number of blocks */
  99. FunctionalState ExtraCommandEnable; /*!< NAND extra command needed for Page reading mode. This
  100. parameter is mandatory for some NAND parts after the read
  101. command (NAND_CMD_AREA_TRUE1) and before DATA reading sequence.
  102. Example: Toshiba THTH58BYG3S0HBAI6.
  103. This parameter could be ENABLE or DISABLE
  104. Please check the Read Mode sequnece in the NAND device datasheet */
  105. }NAND_DeviceConfigTypeDef;
  106. /**
  107. * @brief NAND handle Structure definition
  108. */
  109. typedef struct
  110. {
  111. FMC_NAND_TypeDef *Instance; /*!< Register base address */
  112. FMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */
  113. HAL_LockTypeDef Lock; /*!< NAND locking object */
  114. __IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */
  115. NAND_DeviceConfigTypeDef Config; /*!< NAND phusical characteristic information structure */
  116. }NAND_HandleTypeDef;
  117. /**
  118. * @}
  119. */
  120. /* Exported constants --------------------------------------------------------*/
  121. /* Exported macro ------------------------------------------------------------*/
  122. /** @defgroup NAND_Exported_Macros NAND Exported Macros
  123. * @{
  124. */
  125. /** @brief Reset NAND handle state
  126. * @param __HANDLE__: specifies the NAND handle.
  127. * @retval None
  128. */
  129. #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET)
  130. /**
  131. * @}
  132. */
  133. /* Exported functions --------------------------------------------------------*/
  134. /** @addtogroup NAND_Exported_Functions NAND Exported Functions
  135. * @{
  136. */
  137. /** @addtogroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions
  138. * @{
  139. */
  140. /* Initialization/de-initialization functions ********************************/
  141. HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing);
  142. HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand);
  143. HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, NAND_DeviceConfigTypeDef *pDeviceConfig);
  144. HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID);
  145. void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand);
  146. void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand);
  147. void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand);
  148. void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand);
  149. /**
  150. * @}
  151. */
  152. /** @addtogroup NAND_Exported_Functions_Group2 Input and Output functions
  153. * @{
  154. */
  155. /* IO operation functions ****************************************************/
  156. HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand);
  157. HAL_StatusTypeDef HAL_NAND_Read_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead);
  158. HAL_StatusTypeDef HAL_NAND_Write_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite);
  159. HAL_StatusTypeDef HAL_NAND_Read_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead);
  160. HAL_StatusTypeDef HAL_NAND_Write_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite);
  161. HAL_StatusTypeDef HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToRead);
  162. HAL_StatusTypeDef HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToWrite);
  163. HAL_StatusTypeDef HAL_NAND_Read_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaToRead);
  164. HAL_StatusTypeDef HAL_NAND_Write_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaTowrite);
  165. HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
  166. uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
  167. /**
  168. * @}
  169. */
  170. /** @addtogroup NAND_Exported_Functions_Group3 Peripheral Control functions
  171. * @{
  172. */
  173. /* NAND Control functions ****************************************************/
  174. HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand);
  175. HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand);
  176. HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout);
  177. /**
  178. * @}
  179. */
  180. /** @addtogroup NAND_Exported_Functions_Group4 Peripheral State functions
  181. * @{
  182. */
  183. /* NAND State functions *******************************************************/
  184. HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
  185. uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
  186. /**
  187. * @}
  188. */
  189. /**
  190. * @}
  191. */
  192. /* Private types -------------------------------------------------------------*/
  193. /* Private variables ---------------------------------------------------------*/
  194. /* Private constants ---------------------------------------------------------*/
  195. /** @defgroup NAND_Private_Constants NAND Private Constants
  196. * @{
  197. */
  198. #define NAND_DEVICE ((uint32_t)0x80000000U)
  199. #define NAND_WRITE_TIMEOUT ((uint32_t)0x01000000U)
  200. #define CMD_AREA ((uint32_t)(1<<16)) /* A16 = CLE high */
  201. #define ADDR_AREA ((uint32_t)(1<<17)) /* A17 = ALE high */
  202. #define NAND_CMD_AREA_A ((uint8_t)0x00U)
  203. #define NAND_CMD_AREA_B ((uint8_t)0x01U)
  204. #define NAND_CMD_AREA_C ((uint8_t)0x50U)
  205. #define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30U)
  206. #define NAND_CMD_WRITE0 ((uint8_t)0x80U)
  207. #define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10U)
  208. #define NAND_CMD_ERASE0 ((uint8_t)0x60U)
  209. #define NAND_CMD_ERASE1 ((uint8_t)0xD0U)
  210. #define NAND_CMD_READID ((uint8_t)0x90U)
  211. #define NAND_CMD_STATUS ((uint8_t)0x70U)
  212. #define NAND_CMD_LOCK_STATUS ((uint8_t)0x7AU)
  213. #define NAND_CMD_RESET ((uint8_t)0xFFU)
  214. /* NAND memory status */
  215. #define NAND_VALID_ADDRESS ((uint32_t)0x00000100U)
  216. #define NAND_INVALID_ADDRESS ((uint32_t)0x00000200U)
  217. #define NAND_TIMEOUT_ERROR ((uint32_t)0x00000400U)
  218. #define NAND_BUSY ((uint32_t)0x00000000U)
  219. #define NAND_ERROR ((uint32_t)0x00000001U)
  220. #define NAND_READY ((uint32_t)0x00000040U)
  221. /**
  222. * @}
  223. */
  224. /* Private macros ------------------------------------------------------------*/
  225. /** @defgroup NAND_Private_Macros NAND Private Macros
  226. * @{
  227. */
  228. /**
  229. * @brief NAND memory address computation.
  230. * @param __ADDRESS__: NAND memory address.
  231. * @param __HANDLE__ : NAND handle.
  232. * @retval NAND Raw address value
  233. */
  234. #define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) ((__ADDRESS__)->Page + \
  235. (((__ADDRESS__)->Block + (((__ADDRESS__)->Plane) * ((__HANDLE__)->Config.PlaneSize)))* ((__HANDLE__)->Config.BlockSize)))
  236. #define COLUMN_ADDRESS( __HANDLE__) ((__HANDLE__)->Config.PageSize)
  237. /**
  238. * @brief NAND memory address cycling.
  239. * @param __ADDRESS__: NAND memory address.
  240. * @retval NAND address cycling value.
  241. */
  242. #define ADDR_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */
  243. #define ADDR_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd addressing cycle */
  244. #define ADDR_3RD_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16) /* 3rd addressing cycle */
  245. #define ADDR_4TH_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24) /* 4th addressing cycle */
  246. /**
  247. * @brief NAND memory Columns cycling.
  248. * @param __ADDRESS__: NAND memory address.
  249. * @retval NAND Column address cycling value.
  250. */
  251. #define COLUMN_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st Column addressing cycle */
  252. #define COLUMN_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd Column addressing cycle */
  253. /**
  254. * @}
  255. */
  256. /**
  257. * @}
  258. */
  259. /**
  260. * @}
  261. */
  262. /**
  263. * @}
  264. */
  265. #ifdef __cplusplus
  266. }
  267. #endif
  268. #endif /* __STM32F7xx_HAL_NAND_H */
  269. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/