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  1. ;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
  2. ;* File Name : startup_stm32f030x8.s
  3. ;* Author : MCD Application Team
  4. ;* Description : STM32F030x8 devices vector table for EWARM toolchain.
  5. ;* This module performs:
  6. ;* - Set the initial SP
  7. ;* - Set the initial PC == __iar_program_start,
  8. ;* - Set the vector table entries with the exceptions ISR
  9. ;* address,
  10. ;* - Branches to main in the C library (which eventually
  11. ;* calls main()).
  12. ;* After Reset the Cortex-M0 processor is in Thread mode,
  13. ;* priority is Privileged, and the Stack is set to Main.
  14. ;*******************************************************************************
  15. ;*
  16. ;* Redistribution and use in source and binary forms, with or without modification,
  17. ;* are permitted provided that the following conditions are met:
  18. ;* 1. Redistributions of source code must retain the above copyright notice,
  19. ;* this list of conditions and the following disclaimer.
  20. ;* 2. Redistributions in binary form must reproduce the above copyright notice,
  21. ;* this list of conditions and the following disclaimer in the documentation
  22. ;* and/or other materials provided with the distribution.
  23. ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
  24. ;* may be used to endorse or promote products derived from this software
  25. ;* without specific prior written permission.
  26. ;*
  27. ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  28. ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  29. ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  30. ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  31. ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  33. ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  34. ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  35. ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  36. ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  37. ;*
  38. ;*******************************************************************************
  39. ;
  40. ;
  41. ; The modules in this file are included in the libraries, and may be replaced
  42. ; by any user-defined modules that define the PUBLIC symbol _program_start or
  43. ; a user defined start symbol.
  44. ; To override the cstartup defined in the library, simply add your modified
  45. ; version to the workbench project.
  46. ;
  47. ; The vector table is normally located at address 0.
  48. ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
  49. ; The name "__vector_table" has special meaning for C-SPY:
  50. ; it is where the SP start value is found, and the NVIC vector
  51. ; table register (VTOR) is initialized to this address if != 0.
  52. ;
  53. ; Cortex-M version
  54. ;
  55. MODULE ?cstartup
  56. ;; Forward declaration of sections.
  57. SECTION CSTACK:DATA:NOROOT(3)
  58. SECTION .intvec:CODE:NOROOT(2)
  59. EXTERN __iar_program_start
  60. EXTERN SystemInit
  61. PUBLIC __vector_table
  62. DATA
  63. __vector_table
  64. DCD sfe(CSTACK)
  65. DCD Reset_Handler ; Reset Handler
  66. DCD NMI_Handler ; NMI Handler
  67. DCD HardFault_Handler ; Hard Fault Handler
  68. DCD 0 ; Reserved
  69. DCD 0 ; Reserved
  70. DCD 0 ; Reserved
  71. DCD 0 ; Reserved
  72. DCD 0 ; Reserved
  73. DCD 0 ; Reserved
  74. DCD 0 ; Reserved
  75. DCD SVC_Handler ; SVCall Handler
  76. DCD 0 ; Reserved
  77. DCD 0 ; Reserved
  78. DCD PendSV_Handler ; PendSV Handler
  79. DCD SysTick_Handler ; SysTick Handler
  80. ; External Interrupts
  81. DCD WWDG_IRQHandler ; Window Watchdog
  82. DCD 0 ; Reserved
  83. DCD RTC_IRQHandler ; RTC through EXTI Line
  84. DCD FLASH_IRQHandler ; FLASH
  85. DCD RCC_IRQHandler ; RCC
  86. DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
  87. DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
  88. DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
  89. DCD 0 ; Reserved
  90. DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
  91. DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
  92. DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5
  93. DCD ADC1_IRQHandler ; ADC1
  94. DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
  95. DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
  96. DCD 0 ; Reserved
  97. DCD TIM3_IRQHandler ; TIM3
  98. DCD TIM6_IRQHandler ; TIM6
  99. DCD 0 ; Reserved
  100. DCD TIM14_IRQHandler ; TIM14
  101. DCD TIM15_IRQHandler ; TIM15
  102. DCD TIM16_IRQHandler ; TIM16
  103. DCD TIM17_IRQHandler ; TIM17
  104. DCD I2C1_IRQHandler ; I2C1
  105. DCD I2C2_IRQHandler ; I2C2
  106. DCD SPI1_IRQHandler ; SPI1
  107. DCD SPI2_IRQHandler ; SPI2
  108. DCD USART1_IRQHandler ; USART1
  109. DCD USART2_IRQHandler ; USART2
  110. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  111. ;;
  112. ;; Default interrupt handlers.
  113. ;;
  114. THUMB
  115. PUBWEAK Reset_Handler
  116. SECTION .text:CODE:NOROOT:REORDER(2)
  117. Reset_Handler
  118. LDR R0, =SystemInit
  119. BLX R0
  120. LDR R0, =__iar_program_start
  121. BX R0
  122. PUBWEAK NMI_Handler
  123. SECTION .text:CODE:NOROOT:REORDER(1)
  124. NMI_Handler
  125. B NMI_Handler
  126. PUBWEAK HardFault_Handler
  127. SECTION .text:CODE:NOROOT:REORDER(1)
  128. HardFault_Handler
  129. B HardFault_Handler
  130. PUBWEAK SVC_Handler
  131. SECTION .text:CODE:NOROOT:REORDER(1)
  132. SVC_Handler
  133. B SVC_Handler
  134. PUBWEAK PendSV_Handler
  135. SECTION .text:CODE:NOROOT:REORDER(1)
  136. PendSV_Handler
  137. B PendSV_Handler
  138. PUBWEAK SysTick_Handler
  139. SECTION .text:CODE:NOROOT:REORDER(1)
  140. SysTick_Handler
  141. B SysTick_Handler
  142. PUBWEAK WWDG_IRQHandler
  143. SECTION .text:CODE:NOROOT:REORDER(1)
  144. WWDG_IRQHandler
  145. B WWDG_IRQHandler
  146. PUBWEAK RTC_IRQHandler
  147. SECTION .text:CODE:NOROOT:REORDER(1)
  148. RTC_IRQHandler
  149. B RTC_IRQHandler
  150. PUBWEAK FLASH_IRQHandler
  151. SECTION .text:CODE:NOROOT:REORDER(1)
  152. FLASH_IRQHandler
  153. B FLASH_IRQHandler
  154. PUBWEAK RCC_IRQHandler
  155. SECTION .text:CODE:NOROOT:REORDER(1)
  156. RCC_IRQHandler
  157. B RCC_IRQHandler
  158. PUBWEAK EXTI0_1_IRQHandler
  159. SECTION .text:CODE:NOROOT:REORDER(1)
  160. EXTI0_1_IRQHandler
  161. B EXTI0_1_IRQHandler
  162. PUBWEAK EXTI2_3_IRQHandler
  163. SECTION .text:CODE:NOROOT:REORDER(1)
  164. EXTI2_3_IRQHandler
  165. B EXTI2_3_IRQHandler
  166. PUBWEAK EXTI4_15_IRQHandler
  167. SECTION .text:CODE:NOROOT:REORDER(1)
  168. EXTI4_15_IRQHandler
  169. B EXTI4_15_IRQHandler
  170. PUBWEAK DMA1_Channel1_IRQHandler
  171. SECTION .text:CODE:NOROOT:REORDER(1)
  172. DMA1_Channel1_IRQHandler
  173. B DMA1_Channel1_IRQHandler
  174. PUBWEAK DMA1_Channel2_3_IRQHandler
  175. SECTION .text:CODE:NOROOT:REORDER(1)
  176. DMA1_Channel2_3_IRQHandler
  177. B DMA1_Channel2_3_IRQHandler
  178. PUBWEAK DMA1_Channel4_5_IRQHandler
  179. SECTION .text:CODE:NOROOT:REORDER(1)
  180. DMA1_Channel4_5_IRQHandler
  181. B DMA1_Channel4_5_IRQHandler
  182. PUBWEAK ADC1_IRQHandler
  183. SECTION .text:CODE:NOROOT:REORDER(1)
  184. ADC1_IRQHandler
  185. B ADC1_IRQHandler
  186. PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler
  187. SECTION .text:CODE:NOROOT:REORDER(1)
  188. TIM1_BRK_UP_TRG_COM_IRQHandler
  189. B TIM1_BRK_UP_TRG_COM_IRQHandler
  190. PUBWEAK TIM1_CC_IRQHandler
  191. SECTION .text:CODE:NOROOT:REORDER(1)
  192. TIM1_CC_IRQHandler
  193. B TIM1_CC_IRQHandler
  194. PUBWEAK TIM3_IRQHandler
  195. SECTION .text:CODE:NOROOT:REORDER(1)
  196. TIM3_IRQHandler
  197. B TIM3_IRQHandler
  198. PUBWEAK TIM6_IRQHandler
  199. SECTION .text:CODE:NOROOT:REORDER(1)
  200. TIM6_IRQHandler
  201. B TIM6_IRQHandler
  202. PUBWEAK TIM14_IRQHandler
  203. SECTION .text:CODE:NOROOT:REORDER(1)
  204. TIM14_IRQHandler
  205. B TIM14_IRQHandler
  206. PUBWEAK TIM15_IRQHandler
  207. SECTION .text:CODE:NOROOT:REORDER(1)
  208. TIM15_IRQHandler
  209. B TIM15_IRQHandler
  210. PUBWEAK TIM16_IRQHandler
  211. SECTION .text:CODE:NOROOT:REORDER(1)
  212. TIM16_IRQHandler
  213. B TIM16_IRQHandler
  214. PUBWEAK TIM17_IRQHandler
  215. SECTION .text:CODE:NOROOT:REORDER(1)
  216. TIM17_IRQHandler
  217. B TIM17_IRQHandler
  218. PUBWEAK I2C1_IRQHandler
  219. SECTION .text:CODE:NOROOT:REORDER(1)
  220. I2C1_IRQHandler
  221. B I2C1_IRQHandler
  222. PUBWEAK I2C2_IRQHandler
  223. SECTION .text:CODE:NOROOT:REORDER(1)
  224. I2C2_IRQHandler
  225. B I2C2_IRQHandler
  226. PUBWEAK SPI1_IRQHandler
  227. SECTION .text:CODE:NOROOT:REORDER(1)
  228. SPI1_IRQHandler
  229. B SPI1_IRQHandler
  230. PUBWEAK SPI2_IRQHandler
  231. SECTION .text:CODE:NOROOT:REORDER(1)
  232. SPI2_IRQHandler
  233. B SPI2_IRQHandler
  234. PUBWEAK USART1_IRQHandler
  235. SECTION .text:CODE:NOROOT:REORDER(1)
  236. USART1_IRQHandler
  237. B USART1_IRQHandler
  238. PUBWEAK USART2_IRQHandler
  239. SECTION .text:CODE:NOROOT:REORDER(1)
  240. USART2_IRQHandler
  241. B USART2_IRQHandler
  242. END
  243. ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****