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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_i2c.c
  4. * @author MCD Application Team
  5. * @version V1.5.1
  6. * @date 01-July-2016
  7. * @brief I2C HAL module driver.
  8. * This file provides firmware functions to manage the following
  9. * functionalities of the Inter Integrated Circuit (I2C) peripheral:
  10. * + Initialization and de-initialization functions
  11. * + IO operation functions
  12. * + Peripheral Control functions
  13. * + Peripheral State functions
  14. *
  15. @verbatim
  16. ==============================================================================
  17. ##### How to use this driver #####
  18. ==============================================================================
  19. [..]
  20. The I2C HAL driver can be used as follows:
  21. (#) Declare a I2C_HandleTypeDef handle structure, for example:
  22. I2C_HandleTypeDef hi2c;
  23. (#)Initialize the I2C low level resources by implement the HAL_I2C_MspInit() API:
  24. (##) Enable the I2Cx interface clock
  25. (##) I2C pins configuration
  26. (+++) Enable the clock for the I2C GPIOs
  27. (+++) Configure I2C pins as alternate function open-drain
  28. (##) NVIC configuration if you need to use interrupt process
  29. (+++) Configure the I2Cx interrupt priority
  30. (+++) Enable the NVIC I2C IRQ Channel
  31. (##) DMA Configuration if you need to use DMA process
  32. (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream
  33. (+++) Enable the DMAx interface clock using
  34. (+++) Configure the DMA handle parameters
  35. (+++) Configure the DMA Tx or Rx Stream
  36. (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
  37. (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
  38. the DMA Tx or Rx Stream
  39. (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
  40. Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
  41. (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
  42. (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API.
  43. (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
  44. (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
  45. *** Polling mode IO operation ***
  46. =================================
  47. [..]
  48. (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
  49. (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
  50. (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
  51. (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
  52. *** Polling mode IO MEM operation ***
  53. =====================================
  54. [..]
  55. (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
  56. (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
  57. *** Interrupt mode IO operation ***
  58. ===================================
  59. [..]
  60. (+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT()
  61. (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
  62. add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
  63. (+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT()
  64. (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
  65. add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
  66. (+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT()
  67. (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
  68. add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
  69. (+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT()
  70. (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
  71. add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
  72. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  73. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  74. *** Interrupt mode IO sequential operation ***
  75. ==============================================
  76. [..]
  77. (+@) These interfaces allow to manage a sequential transfer with a repeated start condition
  78. when a direction change during transfer
  79. (+) A specific option manage the different steps of a sequential transfer
  80. (+) Differents steps option I2C_XferOptions_definition are listed below :
  81. (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
  82. (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a start condition with data to transfer without a final stop condition
  83. (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a restart condition with new data to transfer if the direction change or
  84. manage only the new data to transfer if no direction change and without a final stop condition in both cases
  85. (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a restart condition with new data to transfer if the direction change or
  86. manage only the new data to transfer if no direction change and with a final stop condition in both cases
  87. (+) Sequential transmit in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Transmit_IT()
  88. (++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
  89. add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
  90. (+) Sequential receive in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Receive_IT()
  91. (++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
  92. add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
  93. (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
  94. (++) The associated previous transfer callback is called at the end of abort process
  95. (++) mean HAL_I2C_MasterTxCpltCallback() in case of previous state was master transmit
  96. (++) mean HAL_I2c_MasterRxCpltCallback() in case of previous state was master receive
  97. (+) Enable/disable the Address listen mode in slave I2C mode
  98. using HAL_I2C_EnableListen_IT() HAL_I2C_DisableListen_IT()
  99. (++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and user can
  100. add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
  101. (++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and user can
  102. add his own code by customization of function pointer HAL_I2C_ListenCpltCallback()
  103. (+) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Transmit_IT()
  104. (++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
  105. add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
  106. (+) Sequential receive in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Receive_IT()
  107. (++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
  108. add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
  109. *** Interrupt mode IO MEM operation ***
  110. =======================================
  111. [..]
  112. (+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using
  113. HAL_I2C_Mem_Write_IT()
  114. (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
  115. add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
  116. (+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using
  117. HAL_I2C_Mem_Read_IT()
  118. (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
  119. add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
  120. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  121. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  122. *** DMA mode IO operation ***
  123. ==============================
  124. [..]
  125. (+) Transmit in master mode an amount of data in non blocking mode (DMA) using
  126. HAL_I2C_Master_Transmit_DMA()
  127. (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
  128. add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
  129. (+) Receive in master mode an amount of data in non blocking mode (DMA) using
  130. HAL_I2C_Master_Receive_DMA()
  131. (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
  132. add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
  133. (+) Transmit in slave mode an amount of data in non blocking mode (DMA) using
  134. HAL_I2C_Slave_Transmit_DMA()
  135. (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
  136. add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
  137. (+) Receive in slave mode an amount of data in non blocking mode (DMA) using
  138. HAL_I2C_Slave_Receive_DMA()
  139. (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
  140. add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
  141. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  142. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  143. *** DMA mode IO MEM operation ***
  144. =================================
  145. [..]
  146. (+) Write an amount of data in no-blocking mode with DMA to a specific memory address using
  147. HAL_I2C_Mem_Write_DMA()
  148. (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
  149. add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
  150. (+) Read an amount of data in no-blocking mode with DMA from a specific memory address using
  151. HAL_I2C_Mem_Read_DMA()
  152. (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
  153. add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
  154. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  155. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  156. *** I2C HAL driver macros list ***
  157. ==================================
  158. [..]
  159. Below the list of most used macros in I2C HAL driver.
  160. (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
  161. (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
  162. (+) __HAL_I2C_GET_FLAG: Checks whether the specified I2C flag is set or not
  163. (+) __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag
  164. (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
  165. (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
  166. [..]
  167. (@) You can refer to the I2C HAL driver header file for more useful macros
  168. @endverbatim
  169. ******************************************************************************
  170. * @attention
  171. *
  172. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  173. *
  174. * Redistribution and use in source and binary forms, with or without modification,
  175. * are permitted provided that the following conditions are met:
  176. * 1. Redistributions of source code must retain the above copyright notice,
  177. * this list of conditions and the following disclaimer.
  178. * 2. Redistributions in binary form must reproduce the above copyright notice,
  179. * this list of conditions and the following disclaimer in the documentation
  180. * and/or other materials provided with the distribution.
  181. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  182. * may be used to endorse or promote products derived from this software
  183. * without specific prior written permission.
  184. *
  185. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  186. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  187. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  188. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  189. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  190. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  191. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  192. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  193. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  194. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  195. *
  196. ******************************************************************************
  197. */
  198. /* Includes ------------------------------------------------------------------*/
  199. #include "stm32f4xx_hal.h"
  200. /** @addtogroup STM32F4xx_HAL_Driver
  201. * @{
  202. */
  203. /** @defgroup I2C I2C
  204. * @brief I2C HAL module driver
  205. * @{
  206. */
  207. #ifdef HAL_I2C_MODULE_ENABLED
  208. /* Private typedef -----------------------------------------------------------*/
  209. /* Private define ------------------------------------------------------------*/
  210. /** @addtogroup I2C_Private_Constants
  211. * @{
  212. */
  213. #define I2C_TIMEOUT_FLAG ((uint32_t)35U) /*!< Timeout 35 ms */
  214. #define I2C_TIMEOUT_ADDR_SLAVE ((uint32_t)10000U) /*!< Timeout 10 s */
  215. #define I2C_TIMEOUT_BUSY_FLAG ((uint32_t)25U) /*!< Timeout 25 ms */
  216. #define I2C_NO_OPTION_FRAME ((uint32_t)0xFFFF0000U) /*!< XferOptions default value */
  217. /* Private define for @ref PreviousState usage */
  218. #define I2C_STATE_MSK ((uint32_t)((HAL_I2C_STATE_BUSY_TX | HAL_I2C_STATE_BUSY_RX) & (~(uint32_t)HAL_I2C_STATE_READY))) /*!< Mask State define, keep only RX and TX bits */
  219. #define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /*!< Default Value */
  220. #define I2C_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy TX, combinaison of State LSB and Mode enum */
  221. #define I2C_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy RX, combinaison of State LSB and Mode enum */
  222. #define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy TX, combinaison of State LSB and Mode enum */
  223. #define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy RX, combinaison of State LSB and Mode enum */
  224. /**
  225. * @}
  226. */
  227. /* Private macro -------------------------------------------------------------*/
  228. /* Private variables ---------------------------------------------------------*/
  229. /* Private function prototypes -----------------------------------------------*/
  230. /** @addtogroup I2C_Private_Functions
  231. * @{
  232. */
  233. /* Private functions to handle DMA transfer */
  234. static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma);
  235. static void I2C_DMAError(DMA_HandleTypeDef *hdma);
  236. static void I2C_DMAAbort(DMA_HandleTypeDef *hdma);
  237. static void I2C_ITError(I2C_HandleTypeDef *hi2c);
  238. static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
  239. static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
  240. static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
  241. static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
  242. static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart);
  243. static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart);
  244. static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  245. static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  246. static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  247. static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  248. static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c);
  249. /* Private functions for I2C transfer IRQ handler */
  250. static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
  251. static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
  252. static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
  253. static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
  254. static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c);
  255. static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c);
  256. static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c);
  257. static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
  258. static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
  259. static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
  260. static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
  261. static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c);
  262. static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
  263. static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
  264. /**
  265. * @}
  266. */
  267. /* Exported functions --------------------------------------------------------*/
  268. /** @defgroup I2C_Exported_Functions I2C Exported Functions
  269. * @{
  270. */
  271. /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
  272. * @brief Initialization and Configuration functions
  273. *
  274. @verbatim
  275. ===============================================================================
  276. ##### Initialization and de-initialization functions #####
  277. ===============================================================================
  278. [..] This subsection provides a set of functions allowing to initialize and
  279. de-initialize the I2Cx peripheral:
  280. (+) User must Implement HAL_I2C_MspInit() function in which he configures
  281. all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
  282. (+) Call the function HAL_I2C_Init() to configure the selected device with
  283. the selected configuration:
  284. (++) Communication Speed
  285. (++) Duty cycle
  286. (++) Addressing mode
  287. (++) Own Address 1
  288. (++) Dual Addressing mode
  289. (++) Own Address 2
  290. (++) General call mode
  291. (++) Nostretch mode
  292. (+) Call the function HAL_I2C_DeInit() to restore the default configuration
  293. of the selected I2Cx peripheral.
  294. @endverbatim
  295. * @{
  296. */
  297. /**
  298. * @brief Initializes the I2C according to the specified parameters
  299. * in the I2C_InitTypeDef and create the associated handle.
  300. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  301. * the configuration information for I2C module
  302. * @retval HAL status
  303. */
  304. HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
  305. {
  306. uint32_t freqrange = 0U;
  307. uint32_t pclk1 = 0U;
  308. /* Check the I2C handle allocation */
  309. if(hi2c == NULL)
  310. {
  311. return HAL_ERROR;
  312. }
  313. /* Check the parameters */
  314. assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
  315. assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
  316. assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
  317. assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
  318. assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
  319. assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
  320. assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
  321. assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
  322. assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
  323. if(hi2c->State == HAL_I2C_STATE_RESET)
  324. {
  325. /* Allocate lock resource and initialize it */
  326. hi2c->Lock = HAL_UNLOCKED;
  327. /* Init the low level hardware : GPIO, CLOCK, NVIC */
  328. HAL_I2C_MspInit(hi2c);
  329. }
  330. hi2c->State = HAL_I2C_STATE_BUSY;
  331. /* Disable the selected I2C peripheral */
  332. __HAL_I2C_DISABLE(hi2c);
  333. /* Get PCLK1 frequency */
  334. pclk1 = HAL_RCC_GetPCLK1Freq();
  335. /* Calculate frequency range */
  336. freqrange = I2C_FREQRANGE(pclk1);
  337. /*---------------------------- I2Cx CR2 Configuration ----------------------*/
  338. /* Configure I2Cx: Frequency range */
  339. hi2c->Instance->CR2 = freqrange;
  340. /*---------------------------- I2Cx TRISE Configuration --------------------*/
  341. /* Configure I2Cx: Rise Time */
  342. hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
  343. /*---------------------------- I2Cx CCR Configuration ----------------------*/
  344. /* Configure I2Cx: Speed */
  345. hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
  346. /*---------------------------- I2Cx CR1 Configuration ----------------------*/
  347. /* Configure I2Cx: Generalcall and NoStretch mode */
  348. hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
  349. /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
  350. /* Configure I2Cx: Own Address1 and addressing mode */
  351. hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1);
  352. /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
  353. /* Configure I2Cx: Dual mode and Own Address2 */
  354. hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2);
  355. /* Enable the selected I2C peripheral */
  356. __HAL_I2C_ENABLE(hi2c);
  357. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  358. hi2c->State = HAL_I2C_STATE_READY;
  359. hi2c->PreviousState = I2C_STATE_NONE;
  360. hi2c->Mode = HAL_I2C_MODE_NONE;
  361. return HAL_OK;
  362. }
  363. /**
  364. * @brief DeInitializes the I2C peripheral.
  365. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  366. * the configuration information for I2C module
  367. * @retval HAL status
  368. */
  369. HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
  370. {
  371. /* Check the I2C handle allocation */
  372. if(hi2c == NULL)
  373. {
  374. return HAL_ERROR;
  375. }
  376. /* Check the parameters */
  377. assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
  378. hi2c->State = HAL_I2C_STATE_BUSY;
  379. /* Disable the I2C Peripheral Clock */
  380. __HAL_I2C_DISABLE(hi2c);
  381. /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  382. HAL_I2C_MspDeInit(hi2c);
  383. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  384. hi2c->State = HAL_I2C_STATE_RESET;
  385. hi2c->PreviousState = I2C_STATE_NONE;
  386. hi2c->Mode = HAL_I2C_MODE_NONE;
  387. /* Release Lock */
  388. __HAL_UNLOCK(hi2c);
  389. return HAL_OK;
  390. }
  391. /**
  392. * @brief I2C MSP Init.
  393. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  394. * the configuration information for I2C module
  395. * @retval None
  396. */
  397. __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
  398. {
  399. /* Prevent unused argument(s) compilation warning */
  400. UNUSED(hi2c);
  401. /* NOTE : This function Should not be modified, when the callback is needed,
  402. the HAL_I2C_MspInit could be implemented in the user file
  403. */
  404. }
  405. /**
  406. * @brief I2C MSP DeInit
  407. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  408. * the configuration information for I2C module
  409. * @retval None
  410. */
  411. __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
  412. {
  413. /* Prevent unused argument(s) compilation warning */
  414. UNUSED(hi2c);
  415. /* NOTE : This function Should not be modified, when the callback is needed,
  416. the HAL_I2C_MspDeInit could be implemented in the user file
  417. */
  418. }
  419. /**
  420. * @}
  421. */
  422. /** @defgroup I2C_Exported_Functions_Group2 IO operation functions
  423. * @brief Data transfers functions
  424. *
  425. @verbatim
  426. ===============================================================================
  427. ##### IO operation functions #####
  428. ===============================================================================
  429. [..]
  430. This subsection provides a set of functions allowing to manage the I2C data
  431. transfers.
  432. (#) There are two modes of transfer:
  433. (++) Blocking mode : The communication is performed in the polling mode.
  434. The status of all data processing is returned by the same function
  435. after finishing transfer.
  436. (++) No-Blocking mode : The communication is performed using Interrupts
  437. or DMA. These functions return the status of the transfer startup.
  438. The end of the data processing will be indicated through the
  439. dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
  440. using DMA mode.
  441. (#) Blocking mode functions are :
  442. (++) HAL_I2C_Master_Transmit()
  443. (++) HAL_I2C_Master_Receive()
  444. (++) HAL_I2C_Slave_Transmit()
  445. (++) HAL_I2C_Slave_Receive()
  446. (++) HAL_I2C_Mem_Write()
  447. (++) HAL_I2C_Mem_Read()
  448. (++) HAL_I2C_IsDeviceReady()
  449. (#) No-Blocking mode functions with Interrupt are :
  450. (++) HAL_I2C_Master_Transmit_IT()
  451. (++) HAL_I2C_Master_Receive_IT()
  452. (++) HAL_I2C_Slave_Transmit_IT()
  453. (++) HAL_I2C_Slave_Receive_IT()
  454. (++) HAL_I2C_Master_Sequential_Transmit_IT()
  455. (++) HAL_I2C_Master_Sequential_Receive_IT()
  456. (++) HAL_I2C_Slave_Sequential_Transmit_IT()
  457. (++) HAL_I2C_Slave_Sequential_Receive_IT()
  458. (++) HAL_I2C_Mem_Write_IT()
  459. (++) HAL_I2C_Mem_Read_IT()
  460. (#) No-Blocking mode functions with DMA are :
  461. (++) HAL_I2C_Master_Transmit_DMA()
  462. (++) HAL_I2C_Master_Receive_DMA()
  463. (++) HAL_I2C_Slave_Transmit_DMA()
  464. (++) HAL_I2C_Slave_Receive_DMA()
  465. (++) HAL_I2C_Mem_Write_DMA()
  466. (++) HAL_I2C_Mem_Read_DMA()
  467. (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
  468. (++) HAL_I2C_MemTxCpltCallback()
  469. (++) HAL_I2C_MemRxCpltCallback()
  470. (++) HAL_I2C_MasterTxCpltCallback()
  471. (++) HAL_I2C_MasterRxCpltCallback()
  472. (++) HAL_I2C_SlaveTxCpltCallback()
  473. (++) HAL_I2C_SlaveRxCpltCallback()
  474. (++) HAL_I2C_ErrorCallback()
  475. (++) HAL_I2C_AbortCpltCallback()
  476. @endverbatim
  477. * @{
  478. */
  479. /**
  480. * @brief Transmits in master mode an amount of data in blocking mode.
  481. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  482. * the configuration information for I2C module
  483. * @param DevAddress Target device address: The device 7 bits address value
  484. * in datasheet must be shift at right before call interface
  485. * @param pData Pointer to data buffer
  486. * @param Size Amount of data to be sent
  487. * @param Timeout Timeout duration
  488. * @retval HAL status
  489. */
  490. HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  491. {
  492. uint32_t tickstart = 0x00U;
  493. /* Init tickstart for timeout management*/
  494. tickstart = HAL_GetTick();
  495. if(hi2c->State == HAL_I2C_STATE_READY)
  496. {
  497. /* Wait until BUSY flag is reset */
  498. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  499. {
  500. return HAL_BUSY;
  501. }
  502. /* Process Locked */
  503. __HAL_LOCK(hi2c);
  504. /* Disable Pos */
  505. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  506. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  507. hi2c->Mode = HAL_I2C_MODE_MASTER;
  508. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  509. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  510. /* Send Slave Address */
  511. if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
  512. {
  513. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  514. {
  515. /* Process Unlocked */
  516. __HAL_UNLOCK(hi2c);
  517. return HAL_ERROR;
  518. }
  519. else
  520. {
  521. /* Process Unlocked */
  522. __HAL_UNLOCK(hi2c);
  523. return HAL_TIMEOUT;
  524. }
  525. }
  526. /* Clear ADDR flag */
  527. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  528. while(Size > 0U)
  529. {
  530. /* Wait until TXE flag is set */
  531. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  532. {
  533. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  534. {
  535. /* Generate Stop */
  536. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  537. return HAL_ERROR;
  538. }
  539. else
  540. {
  541. return HAL_TIMEOUT;
  542. }
  543. }
  544. /* Write data to DR */
  545. hi2c->Instance->DR = (*pData++);
  546. Size--;
  547. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
  548. {
  549. /* Write data to DR */
  550. hi2c->Instance->DR = (*pData++);
  551. Size--;
  552. }
  553. /* Wait until BTF flag is set */
  554. if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  555. {
  556. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  557. {
  558. /* Generate Stop */
  559. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  560. return HAL_ERROR;
  561. }
  562. else
  563. {
  564. return HAL_TIMEOUT;
  565. }
  566. }
  567. }
  568. /* Generate Stop */
  569. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  570. hi2c->State = HAL_I2C_STATE_READY;
  571. hi2c->Mode = HAL_I2C_MODE_NONE;
  572. /* Process Unlocked */
  573. __HAL_UNLOCK(hi2c);
  574. return HAL_OK;
  575. }
  576. else
  577. {
  578. return HAL_BUSY;
  579. }
  580. }
  581. /**
  582. * @brief Receives in master mode an amount of data in blocking mode.
  583. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  584. * the configuration information for I2C module
  585. * @param DevAddress Target device address: The device 7 bits address value
  586. * in datasheet must be shift at right before call interface
  587. * @param pData Pointer to data buffer
  588. * @param Size Amount of data to be sent
  589. * @param Timeout Timeout duration
  590. * @retval HAL status
  591. */
  592. HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  593. {
  594. uint32_t tickstart = 0x00U;
  595. /* Init tickstart for timeout management*/
  596. tickstart = HAL_GetTick();
  597. if(hi2c->State == HAL_I2C_STATE_READY)
  598. {
  599. /* Wait until BUSY flag is reset */
  600. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  601. {
  602. return HAL_BUSY;
  603. }
  604. /* Process Locked */
  605. __HAL_LOCK(hi2c);
  606. /* Disable Pos */
  607. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  608. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  609. hi2c->Mode = HAL_I2C_MODE_MASTER;
  610. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  611. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  612. /* Send Slave Address */
  613. if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
  614. {
  615. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  616. {
  617. /* Process Unlocked */
  618. __HAL_UNLOCK(hi2c);
  619. return HAL_ERROR;
  620. }
  621. else
  622. {
  623. /* Process Unlocked */
  624. __HAL_UNLOCK(hi2c);
  625. return HAL_TIMEOUT;
  626. }
  627. }
  628. if(Size == 0U)
  629. {
  630. /* Clear ADDR flag */
  631. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  632. /* Generate Stop */
  633. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  634. }
  635. else if(Size == 1U)
  636. {
  637. /* Disable Acknowledge */
  638. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  639. /* Clear ADDR flag */
  640. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  641. /* Generate Stop */
  642. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  643. }
  644. else if(Size == 2U)
  645. {
  646. /* Disable Acknowledge */
  647. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  648. /* Enable Pos */
  649. hi2c->Instance->CR1 |= I2C_CR1_POS;
  650. /* Clear ADDR flag */
  651. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  652. }
  653. else
  654. {
  655. /* Enable Acknowledge */
  656. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  657. /* Clear ADDR flag */
  658. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  659. }
  660. while(Size > 0U)
  661. {
  662. if(Size <= 3U)
  663. {
  664. /* One byte */
  665. if(Size == 1U)
  666. {
  667. /* Wait until RXNE flag is set */
  668. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  669. {
  670. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  671. {
  672. return HAL_TIMEOUT;
  673. }
  674. else
  675. {
  676. return HAL_ERROR;
  677. }
  678. }
  679. /* Read data from DR */
  680. (*pData++) = hi2c->Instance->DR;
  681. Size--;
  682. }
  683. /* Two bytes */
  684. else if(Size == 2U)
  685. {
  686. /* Wait until BTF flag is set */
  687. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  688. {
  689. return HAL_TIMEOUT;
  690. }
  691. /* Generate Stop */
  692. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  693. /* Read data from DR */
  694. (*pData++) = hi2c->Instance->DR;
  695. Size--;
  696. /* Read data from DR */
  697. (*pData++) = hi2c->Instance->DR;
  698. Size--;
  699. }
  700. /* 3 Last bytes */
  701. else
  702. {
  703. /* Wait until BTF flag is set */
  704. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  705. {
  706. return HAL_TIMEOUT;
  707. }
  708. /* Disable Acknowledge */
  709. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  710. /* Read data from DR */
  711. (*pData++) = hi2c->Instance->DR;
  712. Size--;
  713. /* Wait until BTF flag is set */
  714. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  715. {
  716. return HAL_TIMEOUT;
  717. }
  718. /* Generate Stop */
  719. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  720. /* Read data from DR */
  721. (*pData++) = hi2c->Instance->DR;
  722. Size--;
  723. /* Read data from DR */
  724. (*pData++) = hi2c->Instance->DR;
  725. Size--;
  726. }
  727. }
  728. else
  729. {
  730. /* Wait until RXNE flag is set */
  731. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  732. {
  733. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  734. {
  735. return HAL_TIMEOUT;
  736. }
  737. else
  738. {
  739. return HAL_ERROR;
  740. }
  741. }
  742. /* Read data from DR */
  743. (*pData++) = hi2c->Instance->DR;
  744. Size--;
  745. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  746. {
  747. /* Read data from DR */
  748. (*pData++) = hi2c->Instance->DR;
  749. Size--;
  750. }
  751. }
  752. }
  753. hi2c->State = HAL_I2C_STATE_READY;
  754. hi2c->Mode = HAL_I2C_MODE_NONE;
  755. /* Process Unlocked */
  756. __HAL_UNLOCK(hi2c);
  757. return HAL_OK;
  758. }
  759. else
  760. {
  761. return HAL_BUSY;
  762. }
  763. }
  764. /**
  765. * @brief Transmits in slave mode an amount of data in blocking mode.
  766. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  767. * the configuration information for I2C module
  768. * @param pData Pointer to data buffer
  769. * @param Size Amount of data to be sent
  770. * @param Timeout Timeout duration
  771. * @retval HAL status
  772. */
  773. HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  774. {
  775. uint32_t tickstart = 0x00U;
  776. /* Init tickstart for timeout management*/
  777. tickstart = HAL_GetTick();
  778. if(hi2c->State == HAL_I2C_STATE_READY)
  779. {
  780. if((pData == NULL) || (Size == 0U))
  781. {
  782. return HAL_ERROR;
  783. }
  784. /* Wait until BUSY flag is reset */
  785. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  786. {
  787. return HAL_BUSY;
  788. }
  789. /* Process Locked */
  790. __HAL_LOCK(hi2c);
  791. /* Disable Pos */
  792. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  793. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  794. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  795. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  796. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  797. /* Enable Address Acknowledge */
  798. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  799. /* Wait until ADDR flag is set */
  800. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  801. {
  802. return HAL_TIMEOUT;
  803. }
  804. /* Clear ADDR flag */
  805. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  806. /* If 10bit addressing mode is selected */
  807. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
  808. {
  809. /* Wait until ADDR flag is set */
  810. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  811. {
  812. return HAL_TIMEOUT;
  813. }
  814. /* Clear ADDR flag */
  815. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  816. }
  817. while(Size > 0U)
  818. {
  819. /* Wait until TXE flag is set */
  820. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  821. {
  822. /* Disable Address Acknowledge */
  823. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  824. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  825. {
  826. return HAL_ERROR;
  827. }
  828. else
  829. {
  830. return HAL_TIMEOUT;
  831. }
  832. }
  833. /* Write data to DR */
  834. hi2c->Instance->DR = (*pData++);
  835. Size--;
  836. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
  837. {
  838. /* Write data to DR */
  839. hi2c->Instance->DR = (*pData++);
  840. Size--;
  841. }
  842. }
  843. /* Wait until AF flag is set */
  844. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK)
  845. {
  846. return HAL_TIMEOUT;
  847. }
  848. /* Clear AF flag */
  849. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  850. /* Disable Address Acknowledge */
  851. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  852. hi2c->State = HAL_I2C_STATE_READY;
  853. hi2c->Mode = HAL_I2C_MODE_NONE;
  854. /* Process Unlocked */
  855. __HAL_UNLOCK(hi2c);
  856. return HAL_OK;
  857. }
  858. else
  859. {
  860. return HAL_BUSY;
  861. }
  862. }
  863. /**
  864. * @brief Receive in slave mode an amount of data in blocking mode
  865. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  866. * the configuration information for I2C module
  867. * @param pData Pointer to data buffer
  868. * @param Size Amount of data to be sent
  869. * @param Timeout Timeout duration
  870. * @retval HAL status
  871. */
  872. HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  873. {
  874. uint32_t tickstart = 0x00U;
  875. /* Init tickstart for timeout management*/
  876. tickstart = HAL_GetTick();
  877. if(hi2c->State == HAL_I2C_STATE_READY)
  878. {
  879. if((pData == NULL) || (Size == 0U))
  880. {
  881. return HAL_ERROR;
  882. }
  883. /* Wait until BUSY flag is reset */
  884. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  885. {
  886. return HAL_BUSY;
  887. }
  888. /* Process Locked */
  889. __HAL_LOCK(hi2c);
  890. /* Disable Pos */
  891. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  892. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  893. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  894. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  895. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  896. /* Enable Address Acknowledge */
  897. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  898. /* Wait until ADDR flag is set */
  899. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  900. {
  901. return HAL_TIMEOUT;
  902. }
  903. /* Clear ADDR flag */
  904. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  905. while(Size > 0U)
  906. {
  907. /* Wait until RXNE flag is set */
  908. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  909. {
  910. /* Disable Address Acknowledge */
  911. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  912. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  913. {
  914. return HAL_TIMEOUT;
  915. }
  916. else
  917. {
  918. return HAL_ERROR;
  919. }
  920. }
  921. /* Read data from DR */
  922. (*pData++) = hi2c->Instance->DR;
  923. Size--;
  924. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
  925. {
  926. /* Read data from DR */
  927. (*pData++) = hi2c->Instance->DR;
  928. Size--;
  929. }
  930. }
  931. /* Wait until STOP flag is set */
  932. if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  933. {
  934. /* Disable Address Acknowledge */
  935. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  936. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  937. {
  938. return HAL_ERROR;
  939. }
  940. else
  941. {
  942. return HAL_TIMEOUT;
  943. }
  944. }
  945. /* Clear STOP flag */
  946. __HAL_I2C_CLEAR_STOPFLAG(hi2c);
  947. /* Disable Address Acknowledge */
  948. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  949. hi2c->State = HAL_I2C_STATE_READY;
  950. hi2c->Mode = HAL_I2C_MODE_NONE;
  951. /* Process Unlocked */
  952. __HAL_UNLOCK(hi2c);
  953. return HAL_OK;
  954. }
  955. else
  956. {
  957. return HAL_BUSY;
  958. }
  959. }
  960. /**
  961. * @brief Transmit in master mode an amount of data in no-blocking mode with Interrupt
  962. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  963. * the configuration information for I2C module
  964. * @param DevAddress Target device address: The device 7 bits address value
  965. * in datasheet must be shift at right before call interface
  966. * @param pData Pointer to data buffer
  967. * @param Size Amount of data to be sent
  968. * @retval HAL status
  969. */
  970. HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  971. {
  972. __IO uint32_t count = 0U;
  973. if(hi2c->State == HAL_I2C_STATE_READY)
  974. {
  975. /* Wait until BUSY flag is reset */
  976. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  977. do
  978. {
  979. if(count-- == 0U)
  980. {
  981. hi2c->PreviousState = I2C_STATE_NONE;
  982. hi2c->State= HAL_I2C_STATE_READY;
  983. /* Process Unlocked */
  984. __HAL_UNLOCK(hi2c);
  985. return HAL_TIMEOUT;
  986. }
  987. }
  988. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  989. /* Process Locked */
  990. __HAL_LOCK(hi2c);
  991. /* Disable Pos */
  992. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  993. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  994. hi2c->Mode = HAL_I2C_MODE_MASTER;
  995. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  996. hi2c->pBuffPtr = pData;
  997. hi2c->XferSize = Size;
  998. hi2c->XferCount = Size;
  999. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1000. hi2c->Devaddress = DevAddress;
  1001. /* Generate Start */
  1002. hi2c->Instance->CR1 |= I2C_CR1_START;
  1003. /* Process Unlocked */
  1004. __HAL_UNLOCK(hi2c);
  1005. /* Note : The I2C interrupts must be enabled after unlocking current process
  1006. to avoid the risk of I2C interrupt handle execution before current
  1007. process unlock */
  1008. /* Enable EVT, BUF and ERR interrupt */
  1009. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1010. return HAL_OK;
  1011. }
  1012. else
  1013. {
  1014. return HAL_BUSY;
  1015. }
  1016. }
  1017. /**
  1018. * @brief Receive in master mode an amount of data in no-blocking mode with Interrupt
  1019. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1020. * the configuration information for I2C module
  1021. * @param DevAddress Target device address: The device 7 bits address value
  1022. * in datasheet must be shift at right before call interface
  1023. * @param pData Pointer to data buffer
  1024. * @param Size Amount of data to be sent
  1025. * @retval HAL status
  1026. */
  1027. HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1028. {
  1029. __IO uint32_t count = 0U;
  1030. if(hi2c->State == HAL_I2C_STATE_READY)
  1031. {
  1032. /* Wait until BUSY flag is reset */
  1033. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1034. do
  1035. {
  1036. if(count-- == 0U)
  1037. {
  1038. hi2c->PreviousState = I2C_STATE_NONE;
  1039. hi2c->State= HAL_I2C_STATE_READY;
  1040. /* Process Unlocked */
  1041. __HAL_UNLOCK(hi2c);
  1042. return HAL_TIMEOUT;
  1043. }
  1044. }
  1045. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1046. /* Process Locked */
  1047. __HAL_LOCK(hi2c);
  1048. /* Disable Pos */
  1049. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1050. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1051. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1052. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1053. hi2c->pBuffPtr = pData;
  1054. hi2c->XferSize = Size;
  1055. hi2c->XferCount = Size;
  1056. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1057. hi2c->Devaddress = DevAddress;
  1058. /* Enable Acknowledge */
  1059. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1060. /* Generate Start */
  1061. hi2c->Instance->CR1 |= I2C_CR1_START;
  1062. /* Process Unlocked */
  1063. __HAL_UNLOCK(hi2c);
  1064. /* Note : The I2C interrupts must be enabled after unlocking current process
  1065. to avoid the risk of I2C interrupt handle execution before current
  1066. process unlock */
  1067. /* Enable EVT, BUF and ERR interrupt */
  1068. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1069. return HAL_OK;
  1070. }
  1071. else
  1072. {
  1073. return HAL_BUSY;
  1074. }
  1075. }
  1076. /**
  1077. * @brief Sequential transmit in master mode an amount of data in no-blocking mode with Interrupt
  1078. * @note This interface allow to manage repeated start condition when a direction change during transfer
  1079. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1080. * the configuration information for I2C module
  1081. * @param DevAddress Target device address: The device 7 bits address value
  1082. * in datasheet must be shift at right before call interface
  1083. * @param pData Pointer to data buffer
  1084. * @param Size Amount of data to be sent
  1085. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  1086. * @retval HAL status
  1087. */
  1088. HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  1089. {
  1090. uint32_t Prev_State = 0x00U;
  1091. __IO uint32_t count = 0U;
  1092. /* Check the parameters */
  1093. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  1094. if(hi2c->State == HAL_I2C_STATE_READY)
  1095. {
  1096. /* Check Busy Flag only if FIRST call of Master interface */
  1097. if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  1098. {
  1099. /* Wait until BUSY flag is reset */
  1100. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1101. do
  1102. {
  1103. if(count-- == 0U)
  1104. {
  1105. hi2c->PreviousState = I2C_STATE_NONE;
  1106. hi2c->State= HAL_I2C_STATE_READY;
  1107. /* Process Unlocked */
  1108. __HAL_UNLOCK(hi2c);
  1109. return HAL_TIMEOUT;
  1110. }
  1111. }
  1112. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1113. }
  1114. /* Process Locked */
  1115. __HAL_LOCK(hi2c);
  1116. /* Disable Pos */
  1117. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1118. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1119. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1120. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1121. hi2c->pBuffPtr = pData;
  1122. hi2c->XferSize = Size;
  1123. hi2c->XferCount = Size;
  1124. hi2c->XferOptions = XferOptions;
  1125. hi2c->Devaddress = DevAddress;
  1126. Prev_State = hi2c->PreviousState;
  1127. /* Generate Start */
  1128. if((Prev_State == I2C_STATE_MASTER_BUSY_RX) || (Prev_State == I2C_STATE_NONE))
  1129. {
  1130. /* Generate Start condition if first transfer */
  1131. if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  1132. {
  1133. /* Generate Start */
  1134. hi2c->Instance->CR1 |= I2C_CR1_START;
  1135. }
  1136. else if(Prev_State == I2C_STATE_MASTER_BUSY_RX)
  1137. {
  1138. /* Generate ReStart */
  1139. hi2c->Instance->CR1 |= I2C_CR1_START;
  1140. }
  1141. }
  1142. /* Process Unlocked */
  1143. __HAL_UNLOCK(hi2c);
  1144. /* Note : The I2C interrupts must be enabled after unlocking current process
  1145. to avoid the risk of I2C interrupt handle execution before current
  1146. process unlock */
  1147. /* Enable EVT, BUF and ERR interrupt */
  1148. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1149. return HAL_OK;
  1150. }
  1151. else
  1152. {
  1153. return HAL_BUSY;
  1154. }
  1155. }
  1156. /**
  1157. * @brief Sequential receive in master mode an amount of data in no-blocking mode with Interrupt
  1158. * @note This interface allow to manage repeated start condition when a direction change during transfer
  1159. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1160. * the configuration information for I2C module
  1161. * @param DevAddress Target device address: The device 7 bits address value
  1162. * in datasheet must be shift at right before call interface
  1163. * @param pData Pointer to data buffer
  1164. * @param Size Amount of data to be sent
  1165. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  1166. * @retval HAL status
  1167. */
  1168. HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  1169. {
  1170. uint32_t Prev_State = 0x00U;
  1171. __IO uint32_t count = 0U;
  1172. /* Check the parameters */
  1173. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  1174. if(hi2c->State == HAL_I2C_STATE_READY)
  1175. {
  1176. /* Check Busy Flag only if FIRST call of Master interface */
  1177. if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  1178. {
  1179. /* Wait until BUSY flag is reset */
  1180. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1181. do
  1182. {
  1183. if(count-- == 0U)
  1184. {
  1185. hi2c->PreviousState = I2C_STATE_NONE;
  1186. hi2c->State= HAL_I2C_STATE_READY;
  1187. /* Process Unlocked */
  1188. __HAL_UNLOCK(hi2c);
  1189. return HAL_TIMEOUT;
  1190. }
  1191. }
  1192. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1193. }
  1194. /* Process Locked */
  1195. __HAL_LOCK(hi2c);
  1196. /* Disable Pos */
  1197. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1198. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1199. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1200. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1201. hi2c->pBuffPtr = pData;
  1202. hi2c->XferSize = Size;
  1203. hi2c->XferCount = Size;
  1204. hi2c->XferOptions = XferOptions;
  1205. hi2c->Devaddress = DevAddress;
  1206. Prev_State = hi2c->PreviousState;
  1207. if((Prev_State == I2C_STATE_MASTER_BUSY_TX) || (Prev_State == I2C_STATE_NONE))
  1208. {
  1209. /* Generate Start condition if first transfer */
  1210. if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_NO_OPTION_FRAME))
  1211. {
  1212. /* Enable Acknowledge */
  1213. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1214. /* Generate Start */
  1215. hi2c->Instance->CR1 |= I2C_CR1_START;
  1216. }
  1217. else if(Prev_State == I2C_STATE_MASTER_BUSY_TX)
  1218. {
  1219. /* Enable Acknowledge */
  1220. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1221. /* Generate ReStart */
  1222. hi2c->Instance->CR1 |= I2C_CR1_START;
  1223. }
  1224. }
  1225. /* Process Unlocked */
  1226. __HAL_UNLOCK(hi2c);
  1227. /* Note : The I2C interrupts must be enabled after unlocking current process
  1228. to avoid the risk of I2C interrupt handle execution before current
  1229. process unlock */
  1230. /* Enable EVT, BUF and ERR interrupt */
  1231. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1232. return HAL_OK;
  1233. }
  1234. else
  1235. {
  1236. return HAL_BUSY;
  1237. }
  1238. }
  1239. /**
  1240. * @brief Transmit in slave mode an amount of data in no-blocking mode with Interrupt
  1241. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1242. * the configuration information for I2C module
  1243. * @param pData Pointer to data buffer
  1244. * @param Size Amount of data to be sent
  1245. * @retval HAL status
  1246. */
  1247. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1248. {
  1249. __IO uint32_t count = 0U;
  1250. if(hi2c->State == HAL_I2C_STATE_READY)
  1251. {
  1252. if((pData == NULL) || (Size == 0U))
  1253. {
  1254. return HAL_ERROR;
  1255. }
  1256. /* Wait until BUSY flag is reset */
  1257. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1258. do
  1259. {
  1260. if(count-- == 0U)
  1261. {
  1262. hi2c->PreviousState = I2C_STATE_NONE;
  1263. hi2c->State= HAL_I2C_STATE_READY;
  1264. /* Process Unlocked */
  1265. __HAL_UNLOCK(hi2c);
  1266. return HAL_TIMEOUT;
  1267. }
  1268. }
  1269. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1270. /* Process Locked */
  1271. __HAL_LOCK(hi2c);
  1272. /* Disable Pos */
  1273. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1274. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1275. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1276. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1277. hi2c->pBuffPtr = pData;
  1278. hi2c->XferSize = Size;
  1279. hi2c->XferCount = Size;
  1280. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1281. /* Enable Address Acknowledge */
  1282. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1283. /* Process Unlocked */
  1284. __HAL_UNLOCK(hi2c);
  1285. /* Note : The I2C interrupts must be enabled after unlocking current process
  1286. to avoid the risk of I2C interrupt handle execution before current
  1287. process unlock */
  1288. /* Enable EVT, BUF and ERR interrupt */
  1289. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1290. return HAL_OK;
  1291. }
  1292. else
  1293. {
  1294. return HAL_BUSY;
  1295. }
  1296. }
  1297. /**
  1298. * @brief Receive in slave mode an amount of data in no-blocking mode with Interrupt
  1299. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1300. * the configuration information for I2C module
  1301. * @param pData Pointer to data buffer
  1302. * @param Size Amount of data to be sent
  1303. * @retval HAL status
  1304. */
  1305. HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1306. {
  1307. __IO uint32_t count = 0U;
  1308. if(hi2c->State == HAL_I2C_STATE_READY)
  1309. {
  1310. if((pData == NULL) || (Size == 0U))
  1311. {
  1312. return HAL_ERROR;
  1313. }
  1314. /* Wait until BUSY flag is reset */
  1315. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1316. do
  1317. {
  1318. if(count-- == 0U)
  1319. {
  1320. hi2c->PreviousState = I2C_STATE_NONE;
  1321. hi2c->State= HAL_I2C_STATE_READY;
  1322. /* Process Unlocked */
  1323. __HAL_UNLOCK(hi2c);
  1324. return HAL_TIMEOUT;
  1325. }
  1326. }
  1327. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1328. /* Process Locked */
  1329. __HAL_LOCK(hi2c);
  1330. /* Disable Pos */
  1331. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1332. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1333. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1334. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1335. hi2c->pBuffPtr = pData;
  1336. hi2c->XferSize = Size;
  1337. hi2c->XferCount = Size;
  1338. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1339. /* Enable Address Acknowledge */
  1340. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1341. /* Process Unlocked */
  1342. __HAL_UNLOCK(hi2c);
  1343. /* Note : The I2C interrupts must be enabled after unlocking current process
  1344. to avoid the risk of I2C interrupt handle execution before current
  1345. process unlock */
  1346. /* Enable EVT, BUF and ERR interrupt */
  1347. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1348. return HAL_OK;
  1349. }
  1350. else
  1351. {
  1352. return HAL_BUSY;
  1353. }
  1354. }
  1355. /**
  1356. * @brief Sequential transmit in slave mode an amount of data in no-blocking mode with Interrupt
  1357. * @note This interface allow to manage repeated start condition when a direction change during transfer
  1358. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1359. * the configuration information for I2C module
  1360. * @param pData Pointer to data buffer
  1361. * @param Size Amount of data to be sent
  1362. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  1363. * @retval HAL status
  1364. */
  1365. HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  1366. {
  1367. /* Check the parameters */
  1368. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  1369. if(hi2c->State == HAL_I2C_STATE_LISTEN)
  1370. {
  1371. if((pData == NULL) || (Size == 0U))
  1372. {
  1373. return HAL_ERROR;
  1374. }
  1375. /* Process Locked */
  1376. __HAL_LOCK(hi2c);
  1377. /* Disable Pos */
  1378. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1379. hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN;
  1380. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1381. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1382. hi2c->pBuffPtr = pData;
  1383. hi2c->XferSize = Size;
  1384. hi2c->XferCount = Size;
  1385. hi2c->XferOptions = XferOptions;
  1386. /* Clear ADDR flag */
  1387. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1388. /* Process Unlocked */
  1389. __HAL_UNLOCK(hi2c);
  1390. /* Note : The I2C interrupts must be enabled after unlocking current process
  1391. to avoid the risk of I2C interrupt handle execution before current
  1392. process unlock */
  1393. /* Enable EVT, BUF and ERR interrupt */
  1394. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1395. return HAL_OK;
  1396. }
  1397. else
  1398. {
  1399. return HAL_BUSY;
  1400. }
  1401. }
  1402. /**
  1403. * @brief Sequential receive in slave mode an amount of data in no-blocking mode with Interrupt
  1404. * @note This interface allow to manage repeated start condition when a direction change during transfer
  1405. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1406. * the configuration information for I2C module
  1407. * @param pData Pointer to data buffer
  1408. * @param Size Amount of data to be sent
  1409. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  1410. * @retval HAL status
  1411. */
  1412. HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  1413. {
  1414. /* Check the parameters */
  1415. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  1416. if(hi2c->State == HAL_I2C_STATE_LISTEN)
  1417. {
  1418. if((pData == NULL) || (Size == 0U))
  1419. {
  1420. return HAL_ERROR;
  1421. }
  1422. /* Process Locked */
  1423. __HAL_LOCK(hi2c);
  1424. /* Disable Pos */
  1425. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1426. hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN;
  1427. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1428. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1429. hi2c->pBuffPtr = pData;
  1430. hi2c->XferSize = Size;
  1431. hi2c->XferCount = Size;
  1432. hi2c->XferOptions = XferOptions;
  1433. /* Clear ADDR flag */
  1434. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1435. /* Process Unlocked */
  1436. __HAL_UNLOCK(hi2c);
  1437. /* Note : The I2C interrupts must be enabled after unlocking current process
  1438. to avoid the risk of I2C interrupt handle execution before current
  1439. process unlock */
  1440. /* Enable EVT, BUF and ERR interrupt */
  1441. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1442. return HAL_OK;
  1443. }
  1444. else
  1445. {
  1446. return HAL_BUSY;
  1447. }
  1448. }
  1449. /**
  1450. * @brief Enable the Address listen mode with Interrupt.
  1451. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1452. * the configuration information for the specified I2C.
  1453. * @retval HAL status
  1454. */
  1455. HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
  1456. {
  1457. if(hi2c->State == HAL_I2C_STATE_READY)
  1458. {
  1459. hi2c->State = HAL_I2C_STATE_LISTEN;
  1460. /* Enable Address Acknowledge */
  1461. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1462. /* Enable EVT and ERR interrupt */
  1463. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1464. return HAL_OK;
  1465. }
  1466. else
  1467. {
  1468. return HAL_BUSY;
  1469. }
  1470. }
  1471. /**
  1472. * @brief Disable the Address listen mode with Interrupt.
  1473. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1474. * the configuration information for the specified I2C.
  1475. * @retval HAL status
  1476. */
  1477. HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
  1478. {
  1479. /* Declaration of tmp to prevent undefined behavior of volatile usage */
  1480. uint32_t tmp;
  1481. /* Disable Address listen mode only if a transfer is not ongoing */
  1482. if(hi2c->State == HAL_I2C_STATE_LISTEN)
  1483. {
  1484. tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
  1485. hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
  1486. hi2c->State = HAL_I2C_STATE_READY;
  1487. hi2c->Mode = HAL_I2C_MODE_NONE;
  1488. /* Disable Address Acknowledge */
  1489. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  1490. /* Disable EVT and ERR interrupt */
  1491. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1492. return HAL_OK;
  1493. }
  1494. else
  1495. {
  1496. return HAL_BUSY;
  1497. }
  1498. }
  1499. /**
  1500. * @brief Transmit in master mode an amount of data in no-blocking mode with DMA
  1501. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1502. * the configuration information for I2C module
  1503. * @param DevAddress Target device address: The device 7 bits address value
  1504. * in datasheet must be shift at right before call interface
  1505. * @param pData Pointer to data buffer
  1506. * @param Size Amount of data to be sent
  1507. * @retval HAL status
  1508. */
  1509. HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1510. {
  1511. uint32_t tickstart = 0x00U;
  1512. __IO uint32_t count = 0U;
  1513. /* Init tickstart for timeout management*/
  1514. tickstart = HAL_GetTick();
  1515. if(hi2c->State == HAL_I2C_STATE_READY)
  1516. {
  1517. /* Wait until BUSY flag is reset */
  1518. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1519. do
  1520. {
  1521. if(count-- == 0U)
  1522. {
  1523. hi2c->PreviousState = I2C_STATE_NONE;
  1524. hi2c->State= HAL_I2C_STATE_READY;
  1525. /* Process Unlocked */
  1526. __HAL_UNLOCK(hi2c);
  1527. return HAL_TIMEOUT;
  1528. }
  1529. }
  1530. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1531. /* Process Locked */
  1532. __HAL_LOCK(hi2c);
  1533. /* Disable Pos */
  1534. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1535. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1536. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1537. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1538. hi2c->pBuffPtr = pData;
  1539. hi2c->XferSize = Size;
  1540. hi2c->XferCount = Size;
  1541. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1542. if(hi2c->XferSize > 0U)
  1543. {
  1544. /* Set the I2C DMA transfer complete callback */
  1545. hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  1546. /* Set the DMA error callback */
  1547. hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  1548. /* Set the unused DMA callbacks to NULL */
  1549. hi2c->hdmatx->XferHalfCpltCallback = NULL;
  1550. hi2c->hdmatx->XferM1CpltCallback = NULL;
  1551. hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
  1552. hi2c->hdmatx->XferAbortCallback = NULL;
  1553. /* Enable the DMA Stream */
  1554. HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
  1555. /* Send Slave Address */
  1556. if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  1557. {
  1558. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1559. {
  1560. /* Process Unlocked */
  1561. __HAL_UNLOCK(hi2c);
  1562. return HAL_ERROR;
  1563. }
  1564. else
  1565. {
  1566. /* Process Unlocked */
  1567. __HAL_UNLOCK(hi2c);
  1568. return HAL_TIMEOUT;
  1569. }
  1570. }
  1571. /* Clear ADDR flag */
  1572. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1573. /* Enable ERR interrupt */
  1574. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
  1575. /* Enable DMA Request */
  1576. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  1577. }
  1578. else
  1579. {
  1580. /* Send Slave Address */
  1581. if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  1582. {
  1583. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1584. {
  1585. /* Process Unlocked */
  1586. __HAL_UNLOCK(hi2c);
  1587. return HAL_ERROR;
  1588. }
  1589. else
  1590. {
  1591. /* Process Unlocked */
  1592. __HAL_UNLOCK(hi2c);
  1593. return HAL_TIMEOUT;
  1594. }
  1595. }
  1596. /* Clear ADDR flag */
  1597. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1598. /* Generate Stop */
  1599. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  1600. hi2c->State = HAL_I2C_STATE_READY;
  1601. }
  1602. /* Process Unlocked */
  1603. __HAL_UNLOCK(hi2c);
  1604. return HAL_OK;
  1605. }
  1606. else
  1607. {
  1608. return HAL_BUSY;
  1609. }
  1610. }
  1611. /**
  1612. * @brief Receive in master mode an amount of data in no-blocking mode with DMA
  1613. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1614. * the configuration information for I2C module
  1615. * @param DevAddress Target device address: The device 7 bits address value
  1616. * in datasheet must be shift at right before call interface
  1617. * @param pData Pointer to data buffer
  1618. * @param Size Amount of data to be sent
  1619. * @retval HAL status
  1620. */
  1621. HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1622. {
  1623. uint32_t tickstart = 0x00U;
  1624. __IO uint32_t count = 0U;
  1625. /* Init tickstart for timeout management*/
  1626. tickstart = HAL_GetTick();
  1627. if(hi2c->State == HAL_I2C_STATE_READY)
  1628. {
  1629. /* Wait until BUSY flag is reset */
  1630. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1631. do
  1632. {
  1633. if(count-- == 0U)
  1634. {
  1635. hi2c->PreviousState = I2C_STATE_NONE;
  1636. hi2c->State= HAL_I2C_STATE_READY;
  1637. /* Process Unlocked */
  1638. __HAL_UNLOCK(hi2c);
  1639. return HAL_TIMEOUT;
  1640. }
  1641. }
  1642. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1643. /* Process Locked */
  1644. __HAL_LOCK(hi2c);
  1645. /* Disable Pos */
  1646. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1647. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1648. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1649. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1650. hi2c->pBuffPtr = pData;
  1651. hi2c->XferSize = Size;
  1652. hi2c->XferCount = Size;
  1653. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1654. if(hi2c->XferSize > 0U)
  1655. {
  1656. /* Set the I2C DMA transfer complete callback */
  1657. hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  1658. /* Set the DMA error callback */
  1659. hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  1660. /* Set the unused DMA callbacks to NULL */
  1661. hi2c->hdmarx->XferHalfCpltCallback = NULL;
  1662. hi2c->hdmarx->XferM1CpltCallback = NULL;
  1663. hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
  1664. hi2c->hdmarx->XferAbortCallback = NULL;
  1665. /* Enable the DMA Stream */
  1666. HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
  1667. /* Send Slave Address */
  1668. if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  1669. {
  1670. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1671. {
  1672. /* Process Unlocked */
  1673. __HAL_UNLOCK(hi2c);
  1674. return HAL_ERROR;
  1675. }
  1676. else
  1677. {
  1678. /* Process Unlocked */
  1679. __HAL_UNLOCK(hi2c);
  1680. return HAL_TIMEOUT;
  1681. }
  1682. }
  1683. if(Size == 1U)
  1684. {
  1685. /* Disable Acknowledge */
  1686. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  1687. }
  1688. else
  1689. {
  1690. /* Enable Last DMA bit */
  1691. hi2c->Instance->CR2 |= I2C_CR2_LAST;
  1692. }
  1693. /* Clear ADDR flag */
  1694. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1695. /* Process Unlocked */
  1696. __HAL_UNLOCK(hi2c);
  1697. /* Note : The I2C interrupts must be enabled after unlocking current process
  1698. to avoid the risk of I2C interrupt handle execution before current
  1699. process unlock */
  1700. /* Enable ERR interrupt */
  1701. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
  1702. /* Enable DMA Request */
  1703. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  1704. }
  1705. else
  1706. {
  1707. /* Send Slave Address */
  1708. if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  1709. {
  1710. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1711. {
  1712. /* Process Unlocked */
  1713. __HAL_UNLOCK(hi2c);
  1714. return HAL_ERROR;
  1715. }
  1716. else
  1717. {
  1718. /* Process Unlocked */
  1719. __HAL_UNLOCK(hi2c);
  1720. return HAL_TIMEOUT;
  1721. }
  1722. }
  1723. /* Clear ADDR flag */
  1724. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1725. /* Generate Stop */
  1726. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  1727. hi2c->State = HAL_I2C_STATE_READY;
  1728. /* Process Unlocked */
  1729. __HAL_UNLOCK(hi2c);
  1730. }
  1731. return HAL_OK;
  1732. }
  1733. else
  1734. {
  1735. return HAL_BUSY;
  1736. }
  1737. }
  1738. /**
  1739. * @brief Abort a master I2C process communication with Interrupt.
  1740. * @note This abort can be called only if state is ready
  1741. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1742. * the configuration information for the specified I2C.
  1743. * @param DevAddress Target device address: The device 7 bits address value
  1744. * in datasheet must be shift at right before call interface
  1745. * @retval HAL status
  1746. */
  1747. HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
  1748. {
  1749. /* Abort Master transfer during Receive or Transmit process */
  1750. if(hi2c->Mode == HAL_I2C_MODE_MASTER)
  1751. {
  1752. /* Process Locked */
  1753. __HAL_LOCK(hi2c);
  1754. hi2c->PreviousState = I2C_STATE_NONE;
  1755. hi2c->State = HAL_I2C_STATE_ABORT;
  1756. /* Disable Acknowledge */
  1757. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  1758. /* Generate Stop */
  1759. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  1760. hi2c->XferCount = 0U;
  1761. /* Disable EVT, BUF and ERR interrupt */
  1762. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1763. /* Process Unlocked */
  1764. __HAL_UNLOCK(hi2c);
  1765. if(hi2c->State == HAL_I2C_STATE_ABORT)
  1766. {
  1767. hi2c->State = HAL_I2C_STATE_READY;
  1768. /* Call the Abort Complete callback */
  1769. HAL_I2C_AbortCpltCallback(hi2c);
  1770. }
  1771. return HAL_OK;
  1772. }
  1773. else
  1774. {
  1775. /* Wrong usage of abort function */
  1776. /* This function should be used only in case of abort monitored by master device */
  1777. return HAL_ERROR;
  1778. }
  1779. }
  1780. /**
  1781. * @brief Transmit in slave mode an amount of data in no-blocking mode with DMA
  1782. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1783. * the configuration information for I2C module
  1784. * @param pData Pointer to data buffer
  1785. * @param Size Amount of data to be sent
  1786. * @retval HAL status
  1787. */
  1788. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1789. {
  1790. __IO uint32_t count = 0U;
  1791. if(hi2c->State == HAL_I2C_STATE_READY)
  1792. {
  1793. if((pData == NULL) || (Size == 0U))
  1794. {
  1795. return HAL_ERROR;
  1796. }
  1797. /* Wait until BUSY flag is reset */
  1798. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1799. do
  1800. {
  1801. if(count-- == 0U)
  1802. {
  1803. hi2c->PreviousState = I2C_STATE_NONE;
  1804. hi2c->State= HAL_I2C_STATE_READY;
  1805. /* Process Unlocked */
  1806. __HAL_UNLOCK(hi2c);
  1807. return HAL_TIMEOUT;
  1808. }
  1809. }
  1810. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1811. /* Process Locked */
  1812. __HAL_LOCK(hi2c);
  1813. /* Disable Pos */
  1814. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1815. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1816. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1817. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1818. hi2c->pBuffPtr = pData;
  1819. hi2c->XferSize = Size;
  1820. hi2c->XferCount = Size;
  1821. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1822. /* Set the I2C DMA transfer complete callback */
  1823. hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  1824. /* Set the DMA error callback */
  1825. hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  1826. /* Set the unused DMA callbacks to NULL */
  1827. hi2c->hdmatx->XferHalfCpltCallback = NULL;
  1828. hi2c->hdmatx->XferM1CpltCallback = NULL;
  1829. hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
  1830. hi2c->hdmatx->XferAbortCallback = NULL;
  1831. /* Enable the DMA Stream */
  1832. HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
  1833. /* Enable ERR interrupt */
  1834. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
  1835. /* Enable DMA Request */
  1836. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  1837. /* Enable Address Acknowledge */
  1838. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1839. /* Wait until ADDR flag is set */
  1840. count = I2C_TIMEOUT_ADDR_SLAVE * (SystemCoreClock /25U /1000U);
  1841. do
  1842. {
  1843. if(count-- == 0U)
  1844. {
  1845. hi2c->PreviousState = I2C_STATE_NONE;
  1846. hi2c->State= HAL_I2C_STATE_READY;
  1847. /* Process Unlocked */
  1848. __HAL_UNLOCK(hi2c);
  1849. return HAL_TIMEOUT;
  1850. }
  1851. }
  1852. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == RESET);
  1853. /* If 7bit addressing mode is selected */
  1854. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  1855. {
  1856. /* Clear ADDR flag */
  1857. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1858. }
  1859. else
  1860. {
  1861. /* Clear ADDR flag */
  1862. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1863. /* Wait until ADDR flag is set */
  1864. count = I2C_TIMEOUT_ADDR_SLAVE * (SystemCoreClock /25U /1000U);
  1865. do
  1866. {
  1867. if(count-- == 0U)
  1868. {
  1869. hi2c->PreviousState = I2C_STATE_NONE;
  1870. hi2c->State= HAL_I2C_STATE_READY;
  1871. /* Process Unlocked */
  1872. __HAL_UNLOCK(hi2c);
  1873. return HAL_TIMEOUT;
  1874. }
  1875. }
  1876. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == RESET);
  1877. /* Clear ADDR flag */
  1878. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1879. }
  1880. /* Process Unlocked */
  1881. __HAL_UNLOCK(hi2c);
  1882. /* Note : The I2C interrupts must be enabled after unlocking current process
  1883. to avoid the risk of I2C interrupt handle execution before current
  1884. process unlock */
  1885. /* Enable ERR interrupt */
  1886. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
  1887. return HAL_OK;
  1888. }
  1889. else
  1890. {
  1891. return HAL_BUSY;
  1892. }
  1893. }
  1894. /**
  1895. * @brief Receive in slave mode an amount of data in no-blocking mode with DMA
  1896. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1897. * the configuration information for I2C module
  1898. * @param pData Pointer to data buffer
  1899. * @param Size Amount of data to be sent
  1900. * @retval HAL status
  1901. */
  1902. HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1903. {
  1904. __IO uint32_t count = 0U;
  1905. if(hi2c->State == HAL_I2C_STATE_READY)
  1906. {
  1907. if((pData == NULL) || (Size == 0U))
  1908. {
  1909. return HAL_ERROR;
  1910. }
  1911. /* Wait until BUSY flag is reset */
  1912. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1913. do
  1914. {
  1915. if(count-- == 0U)
  1916. {
  1917. hi2c->PreviousState = I2C_STATE_NONE;
  1918. hi2c->State= HAL_I2C_STATE_READY;
  1919. /* Process Unlocked */
  1920. __HAL_UNLOCK(hi2c);
  1921. return HAL_TIMEOUT;
  1922. }
  1923. }
  1924. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1925. /* Process Locked */
  1926. __HAL_LOCK(hi2c);
  1927. /* Disable Pos */
  1928. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1929. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1930. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1931. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1932. hi2c->pBuffPtr = pData;
  1933. hi2c->XferSize = Size;
  1934. hi2c->XferCount = Size;
  1935. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1936. /* Set the I2C DMA transfer complete callback */
  1937. hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  1938. /* Set the DMA error callback */
  1939. hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  1940. /* Set the unused DMA callbacks to NULL */
  1941. hi2c->hdmarx->XferHalfCpltCallback = NULL;
  1942. hi2c->hdmarx->XferM1CpltCallback = NULL;
  1943. hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
  1944. hi2c->hdmarx->XferAbortCallback = NULL;
  1945. /* Enable the DMA Stream */
  1946. HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
  1947. /* Enable ERR interrupt */
  1948. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
  1949. /* Enable DMA Request */
  1950. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  1951. /* Enable Address Acknowledge */
  1952. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1953. /* Wait until ADDR flag is set */
  1954. count = I2C_TIMEOUT_ADDR_SLAVE * (SystemCoreClock /25U /1000U);
  1955. do
  1956. {
  1957. if(count-- == 0U)
  1958. {
  1959. hi2c->PreviousState = I2C_STATE_NONE;
  1960. hi2c->State= HAL_I2C_STATE_READY;
  1961. /* Process Unlocked */
  1962. __HAL_UNLOCK(hi2c);
  1963. return HAL_TIMEOUT;
  1964. }
  1965. }
  1966. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == RESET);
  1967. /* Clear ADDR flag */
  1968. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1969. /* Process Unlocked */
  1970. __HAL_UNLOCK(hi2c);
  1971. /* Note : The I2C interrupts must be enabled after unlocking current process
  1972. to avoid the risk of I2C interrupt handle execution before current
  1973. process unlock */
  1974. /* Enable ERR interrupt */
  1975. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
  1976. return HAL_OK;
  1977. }
  1978. else
  1979. {
  1980. return HAL_BUSY;
  1981. }
  1982. }
  1983. /**
  1984. * @brief Write an amount of data in blocking mode to a specific memory address
  1985. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1986. * the configuration information for I2C module
  1987. * @param DevAddress Target device address
  1988. * @param MemAddress Internal memory address
  1989. * @param MemAddSize Size of internal memory address
  1990. * @param pData Pointer to data buffer
  1991. * @param Size Amount of data to be sent
  1992. * @param Timeout Timeout duration
  1993. * @retval HAL status
  1994. */
  1995. HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  1996. {
  1997. uint32_t tickstart = 0x00U;
  1998. /* Init tickstart for timeout management*/
  1999. tickstart = HAL_GetTick();
  2000. /* Check the parameters */
  2001. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2002. if(hi2c->State == HAL_I2C_STATE_READY)
  2003. {
  2004. /* Wait until BUSY flag is reset */
  2005. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2006. {
  2007. return HAL_BUSY;
  2008. }
  2009. /* Process Locked */
  2010. __HAL_LOCK(hi2c);
  2011. /* Disable Pos */
  2012. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2013. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  2014. hi2c->Mode = HAL_I2C_MODE_MEM;
  2015. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2016. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2017. /* Send Slave Address and Memory Address */
  2018. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  2019. {
  2020. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2021. {
  2022. /* Process Unlocked */
  2023. __HAL_UNLOCK(hi2c);
  2024. return HAL_ERROR;
  2025. }
  2026. else
  2027. {
  2028. /* Process Unlocked */
  2029. __HAL_UNLOCK(hi2c);
  2030. return HAL_TIMEOUT;
  2031. }
  2032. }
  2033. while(Size > 0U)
  2034. {
  2035. /* Wait until TXE flag is set */
  2036. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2037. {
  2038. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2039. {
  2040. /* Generate Stop */
  2041. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2042. return HAL_ERROR;
  2043. }
  2044. else
  2045. {
  2046. return HAL_TIMEOUT;
  2047. }
  2048. }
  2049. /* Write data to DR */
  2050. hi2c->Instance->DR = (*pData++);
  2051. Size--;
  2052. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
  2053. {
  2054. /* Write data to DR */
  2055. hi2c->Instance->DR = (*pData++);
  2056. Size--;
  2057. }
  2058. }
  2059. /* Wait until BTF flag is set */
  2060. if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2061. {
  2062. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2063. {
  2064. /* Generate Stop */
  2065. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2066. return HAL_ERROR;
  2067. }
  2068. else
  2069. {
  2070. return HAL_TIMEOUT;
  2071. }
  2072. }
  2073. /* Generate Stop */
  2074. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2075. hi2c->State = HAL_I2C_STATE_READY;
  2076. hi2c->Mode = HAL_I2C_MODE_NONE;
  2077. /* Process Unlocked */
  2078. __HAL_UNLOCK(hi2c);
  2079. return HAL_OK;
  2080. }
  2081. else
  2082. {
  2083. return HAL_BUSY;
  2084. }
  2085. }
  2086. /**
  2087. * @brief Read an amount of data in blocking mode from a specific memory address
  2088. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2089. * the configuration information for I2C module
  2090. * @param DevAddress Target device address
  2091. * @param MemAddress Internal memory address
  2092. * @param MemAddSize Size of internal memory address
  2093. * @param pData Pointer to data buffer
  2094. * @param Size Amount of data to be sent
  2095. * @param Timeout Timeout duration
  2096. * @retval HAL status
  2097. */
  2098. HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  2099. {
  2100. uint32_t tickstart = 0x00U;
  2101. /* Init tickstart for timeout management*/
  2102. tickstart = HAL_GetTick();
  2103. /* Check the parameters */
  2104. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2105. if(hi2c->State == HAL_I2C_STATE_READY)
  2106. {
  2107. /* Wait until BUSY flag is reset */
  2108. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2109. {
  2110. return HAL_BUSY;
  2111. }
  2112. /* Process Locked */
  2113. __HAL_LOCK(hi2c);
  2114. /* Disable Pos */
  2115. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2116. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  2117. hi2c->Mode = HAL_I2C_MODE_MEM;
  2118. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2119. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2120. /* Send Slave Address and Memory Address */
  2121. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  2122. {
  2123. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2124. {
  2125. /* Process Unlocked */
  2126. __HAL_UNLOCK(hi2c);
  2127. return HAL_ERROR;
  2128. }
  2129. else
  2130. {
  2131. /* Process Unlocked */
  2132. __HAL_UNLOCK(hi2c);
  2133. return HAL_TIMEOUT;
  2134. }
  2135. }
  2136. if(Size == 0U)
  2137. {
  2138. /* Clear ADDR flag */
  2139. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2140. /* Generate Stop */
  2141. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2142. }
  2143. else if(Size == 1U)
  2144. {
  2145. /* Disable Acknowledge */
  2146. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2147. /* Clear ADDR flag */
  2148. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2149. /* Generate Stop */
  2150. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2151. }
  2152. else if(Size == 2U)
  2153. {
  2154. /* Disable Acknowledge */
  2155. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2156. /* Enable Pos */
  2157. hi2c->Instance->CR1 |= I2C_CR1_POS;
  2158. /* Clear ADDR flag */
  2159. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2160. }
  2161. else
  2162. {
  2163. /* Clear ADDR flag */
  2164. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2165. }
  2166. while(Size > 0U)
  2167. {
  2168. if(Size <= 3U)
  2169. {
  2170. /* One byte */
  2171. if(Size== 1U)
  2172. {
  2173. /* Wait until RXNE flag is set */
  2174. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2175. {
  2176. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  2177. {
  2178. return HAL_TIMEOUT;
  2179. }
  2180. else
  2181. {
  2182. return HAL_ERROR;
  2183. }
  2184. }
  2185. /* Read data from DR */
  2186. (*pData++) = hi2c->Instance->DR;
  2187. Size--;
  2188. }
  2189. /* Two bytes */
  2190. else if(Size == 2U)
  2191. {
  2192. /* Wait until BTF flag is set */
  2193. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2194. {
  2195. return HAL_TIMEOUT;
  2196. }
  2197. /* Generate Stop */
  2198. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2199. /* Read data from DR */
  2200. (*pData++) = hi2c->Instance->DR;
  2201. Size--;
  2202. /* Read data from DR */
  2203. (*pData++) = hi2c->Instance->DR;
  2204. Size--;
  2205. }
  2206. /* 3 Last bytes */
  2207. else
  2208. {
  2209. /* Wait until BTF flag is set */
  2210. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2211. {
  2212. return HAL_TIMEOUT;
  2213. }
  2214. /* Disable Acknowledge */
  2215. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2216. /* Read data from DR */
  2217. (*pData++) = hi2c->Instance->DR;
  2218. Size--;
  2219. /* Wait until BTF flag is set */
  2220. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2221. {
  2222. return HAL_TIMEOUT;
  2223. }
  2224. /* Generate Stop */
  2225. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2226. /* Read data from DR */
  2227. (*pData++) = hi2c->Instance->DR;
  2228. Size--;
  2229. /* Read data from DR */
  2230. (*pData++) = hi2c->Instance->DR;
  2231. Size--;
  2232. }
  2233. }
  2234. else
  2235. {
  2236. /* Wait until RXNE flag is set */
  2237. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2238. {
  2239. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  2240. {
  2241. return HAL_TIMEOUT;
  2242. }
  2243. else
  2244. {
  2245. return HAL_ERROR;
  2246. }
  2247. }
  2248. /* Read data from DR */
  2249. (*pData++) = hi2c->Instance->DR;
  2250. Size--;
  2251. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  2252. {
  2253. /* Read data from DR */
  2254. (*pData++) = hi2c->Instance->DR;
  2255. Size--;
  2256. }
  2257. }
  2258. }
  2259. hi2c->State = HAL_I2C_STATE_READY;
  2260. hi2c->Mode = HAL_I2C_MODE_NONE;
  2261. /* Process Unlocked */
  2262. __HAL_UNLOCK(hi2c);
  2263. return HAL_OK;
  2264. }
  2265. else
  2266. {
  2267. return HAL_BUSY;
  2268. }
  2269. }
  2270. /**
  2271. * @brief Write an amount of data in no-blocking mode with Interrupt to a specific memory address
  2272. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2273. * the configuration information for I2C module
  2274. * @param DevAddress Target device address
  2275. * @param MemAddress Internal memory address
  2276. * @param MemAddSize Size of internal memory address
  2277. * @param pData Pointer to data buffer
  2278. * @param Size Amount of data to be sent
  2279. * @retval HAL status
  2280. */
  2281. HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2282. {
  2283. __IO uint32_t count = 0U;
  2284. /* Check the parameters */
  2285. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2286. if(hi2c->State == HAL_I2C_STATE_READY)
  2287. {
  2288. /* Wait until BUSY flag is reset */
  2289. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  2290. do
  2291. {
  2292. if(count-- == 0U)
  2293. {
  2294. hi2c->PreviousState = I2C_STATE_NONE;
  2295. hi2c->State= HAL_I2C_STATE_READY;
  2296. /* Process Unlocked */
  2297. __HAL_UNLOCK(hi2c);
  2298. return HAL_TIMEOUT;
  2299. }
  2300. }
  2301. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2302. /* Process Locked */
  2303. __HAL_LOCK(hi2c);
  2304. /* Disable Pos */
  2305. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2306. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  2307. hi2c->Mode = HAL_I2C_MODE_MEM;
  2308. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2309. hi2c->pBuffPtr = pData;
  2310. hi2c->XferSize = Size;
  2311. hi2c->XferCount = Size;
  2312. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2313. hi2c->Devaddress = DevAddress;
  2314. hi2c->Memaddress = MemAddress;
  2315. hi2c->MemaddSize = MemAddSize;
  2316. hi2c->EventCount = 0U;
  2317. /* Generate Start */
  2318. hi2c->Instance->CR1 |= I2C_CR1_START;
  2319. /* Process Unlocked */
  2320. __HAL_UNLOCK(hi2c);
  2321. /* Note : The I2C interrupts must be enabled after unlocking current process
  2322. to avoid the risk of I2C interrupt handle execution before current
  2323. process unlock */
  2324. /* Enable EVT, BUF and ERR interrupt */
  2325. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2326. return HAL_OK;
  2327. }
  2328. else
  2329. {
  2330. return HAL_BUSY;
  2331. }
  2332. }
  2333. /**
  2334. * @brief Read an amount of data in no-blocking mode with Interrupt from a specific memory address
  2335. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2336. * the configuration information for I2C module
  2337. * @param DevAddress Target device address
  2338. * @param MemAddress Internal memory address
  2339. * @param MemAddSize Size of internal memory address
  2340. * @param pData Pointer to data buffer
  2341. * @param Size Amount of data to be sent
  2342. * @retval HAL status
  2343. */
  2344. HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2345. {
  2346. __IO uint32_t count = 0U;
  2347. /* Check the parameters */
  2348. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2349. if(hi2c->State == HAL_I2C_STATE_READY)
  2350. {
  2351. /* Wait until BUSY flag is reset */
  2352. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  2353. do
  2354. {
  2355. if(count-- == 0U)
  2356. {
  2357. hi2c->PreviousState = I2C_STATE_NONE;
  2358. hi2c->State= HAL_I2C_STATE_READY;
  2359. /* Process Unlocked */
  2360. __HAL_UNLOCK(hi2c);
  2361. return HAL_TIMEOUT;
  2362. }
  2363. }
  2364. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2365. /* Process Locked */
  2366. __HAL_LOCK(hi2c);
  2367. /* Disable Pos */
  2368. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2369. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  2370. hi2c->Mode = HAL_I2C_MODE_MEM;
  2371. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2372. hi2c->pBuffPtr = pData;
  2373. hi2c->XferSize = Size;
  2374. hi2c->XferCount = Size;
  2375. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2376. hi2c->Devaddress = DevAddress;
  2377. hi2c->Memaddress = MemAddress;
  2378. hi2c->MemaddSize = MemAddSize;
  2379. hi2c->EventCount = 0U;
  2380. /* Enable Acknowledge */
  2381. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  2382. /* Generate Start */
  2383. hi2c->Instance->CR1 |= I2C_CR1_START;
  2384. /* Process Unlocked */
  2385. __HAL_UNLOCK(hi2c);
  2386. if(hi2c->XferSize > 0U)
  2387. {
  2388. /* Note : The I2C interrupts must be enabled after unlocking current process
  2389. to avoid the risk of I2C interrupt handle execution before current
  2390. process unlock */
  2391. /* Enable EVT, BUF and ERR interrupt */
  2392. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2393. }
  2394. return HAL_OK;
  2395. }
  2396. else
  2397. {
  2398. return HAL_BUSY;
  2399. }
  2400. }
  2401. /**
  2402. * @brief Write an amount of data in no-blocking mode with DMA to a specific memory address
  2403. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2404. * the configuration information for I2C module
  2405. * @param DevAddress Target device address
  2406. * @param MemAddress Internal memory address
  2407. * @param MemAddSize Size of internal memory address
  2408. * @param pData Pointer to data buffer
  2409. * @param Size Amount of data to be sent
  2410. * @retval HAL status
  2411. */
  2412. HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2413. {
  2414. uint32_t tickstart = 0x00U;
  2415. /* Init tickstart for timeout management*/
  2416. tickstart = HAL_GetTick();
  2417. __IO uint32_t count = 0U;
  2418. /* Check the parameters */
  2419. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2420. if(hi2c->State == HAL_I2C_STATE_READY)
  2421. {
  2422. /* Wait until BUSY flag is reset */
  2423. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  2424. do
  2425. {
  2426. if(count-- == 0U)
  2427. {
  2428. hi2c->PreviousState = I2C_STATE_NONE;
  2429. hi2c->State= HAL_I2C_STATE_READY;
  2430. /* Process Unlocked */
  2431. __HAL_UNLOCK(hi2c);
  2432. return HAL_TIMEOUT;
  2433. }
  2434. }
  2435. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2436. /* Process Locked */
  2437. __HAL_LOCK(hi2c);
  2438. /* Disable Pos */
  2439. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2440. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  2441. hi2c->Mode = HAL_I2C_MODE_MEM;
  2442. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2443. hi2c->pBuffPtr = pData;
  2444. hi2c->XferSize = Size;
  2445. hi2c->XferCount = Size;
  2446. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2447. if(hi2c->XferSize > 0U)
  2448. {
  2449. /* Set the I2C DMA transfer complete callback */
  2450. hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  2451. /* Set the DMA error callback */
  2452. hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  2453. /* Set the unused DMA callbacks to NULL */
  2454. hi2c->hdmatx->XferHalfCpltCallback = NULL;
  2455. hi2c->hdmatx->XferM1CpltCallback = NULL;
  2456. hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
  2457. hi2c->hdmatx->XferAbortCallback = NULL;
  2458. /* Enable the DMA Stream */
  2459. HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
  2460. /* Send Slave Address and Memory Address */
  2461. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  2462. {
  2463. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2464. {
  2465. /* Process Unlocked */
  2466. __HAL_UNLOCK(hi2c);
  2467. return HAL_ERROR;
  2468. }
  2469. else
  2470. {
  2471. /* Process Unlocked */
  2472. __HAL_UNLOCK(hi2c);
  2473. return HAL_TIMEOUT;
  2474. }
  2475. }
  2476. /* Enable ERR interrupt */
  2477. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
  2478. /* Enable DMA Request */
  2479. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  2480. }
  2481. else
  2482. {
  2483. /* Send Slave Address and Memory Address */
  2484. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  2485. {
  2486. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2487. {
  2488. /* Process Unlocked */
  2489. __HAL_UNLOCK(hi2c);
  2490. return HAL_ERROR;
  2491. }
  2492. else
  2493. {
  2494. /* Process Unlocked */
  2495. __HAL_UNLOCK(hi2c);
  2496. return HAL_TIMEOUT;
  2497. }
  2498. }
  2499. /* Generate Stop */
  2500. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2501. hi2c->State = HAL_I2C_STATE_READY;
  2502. }
  2503. /* Process Unlocked */
  2504. __HAL_UNLOCK(hi2c);
  2505. return HAL_OK;
  2506. }
  2507. else
  2508. {
  2509. return HAL_BUSY;
  2510. }
  2511. }
  2512. /**
  2513. * @brief Reads an amount of data in no-blocking mode with DMA from a specific memory address.
  2514. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2515. * the configuration information for I2C module
  2516. * @param DevAddress Target device address
  2517. * @param MemAddress Internal memory address
  2518. * @param MemAddSize Size of internal memory address
  2519. * @param pData Pointer to data buffer
  2520. * @param Size Amount of data to be read
  2521. * @retval HAL status
  2522. */
  2523. HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2524. {
  2525. uint32_t tickstart = 0x00U;
  2526. /* Init tickstart for timeout management*/
  2527. tickstart = HAL_GetTick();
  2528. __IO uint32_t count = 0U;
  2529. /* Check the parameters */
  2530. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2531. if(hi2c->State == HAL_I2C_STATE_READY)
  2532. {
  2533. /* Wait until BUSY flag is reset */
  2534. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  2535. do
  2536. {
  2537. if(count-- == 0U)
  2538. {
  2539. hi2c->PreviousState = I2C_STATE_NONE;
  2540. hi2c->State= HAL_I2C_STATE_READY;
  2541. /* Process Unlocked */
  2542. __HAL_UNLOCK(hi2c);
  2543. return HAL_TIMEOUT;
  2544. }
  2545. }
  2546. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2547. /* Process Locked */
  2548. __HAL_LOCK(hi2c);
  2549. /* Disable Pos */
  2550. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2551. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  2552. hi2c->Mode = HAL_I2C_MODE_MEM;
  2553. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2554. hi2c->pBuffPtr = pData;
  2555. hi2c->XferSize = Size;
  2556. hi2c->XferCount = Size;
  2557. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2558. if(hi2c->XferSize > 0U)
  2559. {
  2560. /* Set the I2C DMA transfer complete callback */
  2561. hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  2562. /* Set the DMA error callback */
  2563. hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  2564. /* Set the unused DMA callbacks to NULL */
  2565. hi2c->hdmarx->XferHalfCpltCallback = NULL;
  2566. hi2c->hdmarx->XferM1CpltCallback = NULL;
  2567. hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
  2568. hi2c->hdmarx->XferAbortCallback = NULL;
  2569. /* Enable the DMA Stream */
  2570. HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
  2571. /* Send Slave Address and Memory Address */
  2572. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  2573. {
  2574. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2575. {
  2576. /* Process Unlocked */
  2577. __HAL_UNLOCK(hi2c);
  2578. return HAL_ERROR;
  2579. }
  2580. else
  2581. {
  2582. /* Process Unlocked */
  2583. __HAL_UNLOCK(hi2c);
  2584. return HAL_TIMEOUT;
  2585. }
  2586. }
  2587. if(Size == 1U)
  2588. {
  2589. /* Disable Acknowledge */
  2590. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2591. }
  2592. else
  2593. {
  2594. /* Enable Last DMA bit */
  2595. hi2c->Instance->CR2 |= I2C_CR2_LAST;
  2596. }
  2597. /* Clear ADDR flag */
  2598. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2599. /* Process Unlocked */
  2600. __HAL_UNLOCK(hi2c);
  2601. /* Note : The I2C interrupts must be enabled after unlocking current process
  2602. to avoid the risk of I2C interrupt handle execution before current
  2603. process unlock */
  2604. /* Enable ERR interrupt */
  2605. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
  2606. /* Enable DMA Request */
  2607. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  2608. }
  2609. else
  2610. {
  2611. /* Send Slave Address and Memory Address */
  2612. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  2613. {
  2614. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2615. {
  2616. /* Process Unlocked */
  2617. __HAL_UNLOCK(hi2c);
  2618. return HAL_ERROR;
  2619. }
  2620. else
  2621. {
  2622. /* Process Unlocked */
  2623. __HAL_UNLOCK(hi2c);
  2624. return HAL_TIMEOUT;
  2625. }
  2626. }
  2627. /* Clear ADDR flag */
  2628. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2629. /* Generate Stop */
  2630. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2631. hi2c->State = HAL_I2C_STATE_READY;
  2632. /* Process Unlocked */
  2633. __HAL_UNLOCK(hi2c);
  2634. }
  2635. return HAL_OK;
  2636. }
  2637. else
  2638. {
  2639. return HAL_BUSY;
  2640. }
  2641. }
  2642. /**
  2643. * @brief Checks if target device is ready for communication.
  2644. * @note This function is used with Memory devices
  2645. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2646. * the configuration information for I2C module
  2647. * @param DevAddress Target device address
  2648. * @param Trials Number of trials
  2649. * @param Timeout Timeout duration
  2650. * @retval HAL status
  2651. */
  2652. HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
  2653. {
  2654. uint32_t tickstart = 0U, tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, I2C_Trials = 1U;
  2655. /* Get tick */
  2656. tickstart = HAL_GetTick();
  2657. if(hi2c->State == HAL_I2C_STATE_READY)
  2658. {
  2659. /* Wait until BUSY flag is reset */
  2660. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2661. {
  2662. return HAL_BUSY;
  2663. }
  2664. /* Process Locked */
  2665. __HAL_LOCK(hi2c);
  2666. /* Disable Pos */
  2667. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2668. hi2c->State = HAL_I2C_STATE_BUSY;
  2669. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2670. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2671. do
  2672. {
  2673. /* Generate Start */
  2674. hi2c->Instance->CR1 |= I2C_CR1_START;
  2675. /* Wait until SB flag is set */
  2676. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, tickstart) != HAL_OK)
  2677. {
  2678. return HAL_TIMEOUT;
  2679. }
  2680. /* Send slave address */
  2681. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  2682. /* Wait until ADDR or AF flag are set */
  2683. /* Get tick */
  2684. tickstart = HAL_GetTick();
  2685. tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
  2686. tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
  2687. tmp3 = hi2c->State;
  2688. while((tmp1 == RESET) && (tmp2 == RESET) && (tmp3 != HAL_I2C_STATE_TIMEOUT))
  2689. {
  2690. if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
  2691. {
  2692. hi2c->State = HAL_I2C_STATE_TIMEOUT;
  2693. }
  2694. tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
  2695. tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
  2696. tmp3 = hi2c->State;
  2697. }
  2698. hi2c->State = HAL_I2C_STATE_READY;
  2699. /* Check if the ADDR flag has been set */
  2700. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
  2701. {
  2702. /* Generate Stop */
  2703. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2704. /* Clear ADDR Flag */
  2705. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2706. /* Wait until BUSY flag is reset */
  2707. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2708. {
  2709. return HAL_TIMEOUT;
  2710. }
  2711. hi2c->State = HAL_I2C_STATE_READY;
  2712. /* Process Unlocked */
  2713. __HAL_UNLOCK(hi2c);
  2714. return HAL_OK;
  2715. }
  2716. else
  2717. {
  2718. /* Generate Stop */
  2719. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2720. /* Clear AF Flag */
  2721. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  2722. /* Wait until BUSY flag is reset */
  2723. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2724. {
  2725. return HAL_TIMEOUT;
  2726. }
  2727. }
  2728. }while(I2C_Trials++ < Trials);
  2729. hi2c->State = HAL_I2C_STATE_READY;
  2730. /* Process Unlocked */
  2731. __HAL_UNLOCK(hi2c);
  2732. return HAL_ERROR;
  2733. }
  2734. else
  2735. {
  2736. return HAL_BUSY;
  2737. }
  2738. }
  2739. /**
  2740. * @brief This function handles I2C event interrupt request.
  2741. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2742. * the configuration information for I2C module
  2743. * @retval HAL status
  2744. */
  2745. void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
  2746. {
  2747. uint32_t sr2itflags = READ_REG(hi2c->Instance->SR2);
  2748. uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
  2749. uint32_t itsources = READ_REG(hi2c->Instance->CR2);
  2750. uint32_t CurrentMode = hi2c->Mode;
  2751. /* Master or Memory mode selected */
  2752. if((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM))
  2753. {
  2754. /* SB Set ----------------------------------------------------------------*/
  2755. if(((sr1itflags & I2C_FLAG_SB) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2756. {
  2757. I2C_Master_SB(hi2c);
  2758. }
  2759. /* ADD10 Set -------------------------------------------------------------*/
  2760. else if(((sr1itflags & I2C_FLAG_ADD10) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2761. {
  2762. I2C_Master_ADD10(hi2c);
  2763. }
  2764. /* ADDR Set --------------------------------------------------------------*/
  2765. else if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2766. {
  2767. I2C_Master_ADDR(hi2c);
  2768. }
  2769. /* I2C in mode Transmitter -----------------------------------------------*/
  2770. if((sr2itflags & I2C_FLAG_TRA) != RESET)
  2771. {
  2772. /* TXE set and BTF reset -----------------------------------------------*/
  2773. if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  2774. {
  2775. I2C_MasterTransmit_TXE(hi2c);
  2776. }
  2777. /* BTF set -------------------------------------------------------------*/
  2778. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2779. {
  2780. I2C_MasterTransmit_BTF(hi2c);
  2781. }
  2782. }
  2783. /* I2C in mode Receiver --------------------------------------------------*/
  2784. else
  2785. {
  2786. /* RXNE set and BTF reset -----------------------------------------------*/
  2787. if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  2788. {
  2789. I2C_MasterReceive_RXNE(hi2c);
  2790. }
  2791. /* BTF set -------------------------------------------------------------*/
  2792. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2793. {
  2794. I2C_MasterReceive_BTF(hi2c);
  2795. }
  2796. }
  2797. }
  2798. /* Slave mode selected */
  2799. else
  2800. {
  2801. /* ADDR set --------------------------------------------------------------*/
  2802. if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2803. {
  2804. I2C_Slave_ADDR(hi2c);
  2805. }
  2806. /* STOPF set --------------------------------------------------------------*/
  2807. else if(((sr1itflags & I2C_FLAG_STOPF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2808. {
  2809. I2C_Slave_STOPF(hi2c);
  2810. }
  2811. /* I2C in mode Transmitter -----------------------------------------------*/
  2812. else if((sr2itflags & I2C_FLAG_TRA) != RESET)
  2813. {
  2814. /* TXE set and BTF reset -----------------------------------------------*/
  2815. if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  2816. {
  2817. I2C_SlaveTransmit_TXE(hi2c);
  2818. }
  2819. /* BTF set -------------------------------------------------------------*/
  2820. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2821. {
  2822. I2C_SlaveTransmit_BTF(hi2c);
  2823. }
  2824. }
  2825. /* I2C in mode Receiver --------------------------------------------------*/
  2826. else
  2827. {
  2828. /* RXNE set and BTF reset ----------------------------------------------*/
  2829. if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  2830. {
  2831. I2C_SlaveReceive_RXNE(hi2c);
  2832. }
  2833. /* BTF set -------------------------------------------------------------*/
  2834. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2835. {
  2836. I2C_SlaveReceive_BTF(hi2c);
  2837. }
  2838. }
  2839. }
  2840. }
  2841. /**
  2842. * @brief This function handles I2C error interrupt request.
  2843. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2844. * the configuration information for I2C module
  2845. * @retval HAL status
  2846. */
  2847. void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
  2848. {
  2849. uint32_t tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, tmp4 = 0U;
  2850. uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
  2851. uint32_t itsources = READ_REG(hi2c->Instance->CR2);
  2852. /* I2C Bus error interrupt occurred ----------------------------------------*/
  2853. if(((sr1itflags & I2C_FLAG_BERR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
  2854. {
  2855. hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
  2856. /* Clear BERR flag */
  2857. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
  2858. }
  2859. /* I2C Arbitration Loss error interrupt occurred ---------------------------*/
  2860. if(((sr1itflags & I2C_FLAG_ARLO) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
  2861. {
  2862. hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
  2863. /* Clear ARLO flag */
  2864. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
  2865. }
  2866. /* I2C Acknowledge failure error interrupt occurred ------------------------*/
  2867. if(((sr1itflags & I2C_FLAG_AF) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
  2868. {
  2869. tmp1 = hi2c->Mode;
  2870. tmp2 = hi2c->XferCount;
  2871. tmp3 = hi2c->State;
  2872. tmp4 = hi2c->PreviousState;
  2873. if((tmp1 == HAL_I2C_MODE_SLAVE) && (tmp2 == 0U) && \
  2874. ((tmp3 == HAL_I2C_STATE_BUSY_TX) || (tmp3 == HAL_I2C_STATE_BUSY_TX_LISTEN) || \
  2875. ((tmp3 == HAL_I2C_STATE_LISTEN) && (tmp4 == I2C_STATE_SLAVE_BUSY_TX))))
  2876. {
  2877. I2C_Slave_AF(hi2c);
  2878. }
  2879. else
  2880. {
  2881. hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
  2882. /* Generate Stop */
  2883. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  2884. /* Clear AF flag */
  2885. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  2886. }
  2887. }
  2888. /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
  2889. if(((sr1itflags & I2C_FLAG_OVR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
  2890. {
  2891. hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
  2892. /* Clear OVR flag */
  2893. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
  2894. }
  2895. /* Call the Error Callback in case of Error detected -----------------------*/
  2896. if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  2897. {
  2898. I2C_ITError(hi2c);
  2899. }
  2900. }
  2901. /**
  2902. * @brief Master Tx Transfer completed callbacks.
  2903. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2904. * the configuration information for I2C module
  2905. * @retval None
  2906. */
  2907. __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
  2908. {
  2909. /* Prevent unused argument(s) compilation warning */
  2910. UNUSED(hi2c);
  2911. /* NOTE : This function should not be modified, when the callback is needed,
  2912. the HAL_I2C_MasterTxCpltCallback can be implemented in the user file
  2913. */
  2914. }
  2915. /**
  2916. * @brief Master Rx Transfer completed callbacks.
  2917. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2918. * the configuration information for I2C module
  2919. * @retval None
  2920. */
  2921. __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
  2922. {
  2923. /* Prevent unused argument(s) compilation warning */
  2924. UNUSED(hi2c);
  2925. /* NOTE : This function should not be modified, when the callback is needed,
  2926. the HAL_I2C_MasterRxCpltCallback can be implemented in the user file
  2927. */
  2928. }
  2929. /** @brief Slave Tx Transfer completed callbacks.
  2930. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2931. * the configuration information for I2C module
  2932. * @retval None
  2933. */
  2934. __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
  2935. {
  2936. /* Prevent unused argument(s) compilation warning */
  2937. UNUSED(hi2c);
  2938. /* NOTE : This function should not be modified, when the callback is needed,
  2939. the HAL_I2C_SlaveTxCpltCallback can be implemented in the user file
  2940. */
  2941. }
  2942. /**
  2943. * @brief Slave Rx Transfer completed callbacks.
  2944. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2945. * the configuration information for I2C module
  2946. * @retval None
  2947. */
  2948. __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
  2949. {
  2950. /* Prevent unused argument(s) compilation warning */
  2951. UNUSED(hi2c);
  2952. /* NOTE : This function should not be modified, when the callback is needed,
  2953. the HAL_I2C_SlaveRxCpltCallback can be implemented in the user file
  2954. */
  2955. }
  2956. /**
  2957. * @brief Slave Address Match callback.
  2958. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2959. * the configuration information for the specified I2C.
  2960. * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XferOptions_definition
  2961. * @param AddrMatchCode Address Match Code
  2962. * @retval None
  2963. */
  2964. __weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
  2965. {
  2966. /* Prevent unused argument(s) compilation warning */
  2967. UNUSED(hi2c);
  2968. UNUSED(TransferDirection);
  2969. UNUSED(AddrMatchCode);
  2970. /* NOTE : This function should not be modified, when the callback is needed,
  2971. the HAL_I2C_AddrCallback can be implemented in the user file
  2972. */
  2973. }
  2974. /**
  2975. * @brief Listen Complete callback.
  2976. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2977. * the configuration information for the specified I2C.
  2978. * @retval None
  2979. */
  2980. __weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
  2981. {
  2982. /* Prevent unused argument(s) compilation warning */
  2983. UNUSED(hi2c);
  2984. /* NOTE : This function should not be modified, when the callback is needed,
  2985. the HAL_I2C_ListenCpltCallback can be implemented in the user file
  2986. */
  2987. }
  2988. /**
  2989. * @brief Memory Tx Transfer completed callbacks.
  2990. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2991. * the configuration information for I2C module
  2992. * @retval None
  2993. */
  2994. __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
  2995. {
  2996. /* Prevent unused argument(s) compilation warning */
  2997. UNUSED(hi2c);
  2998. /* NOTE : This function should not be modified, when the callback is needed,
  2999. the HAL_I2C_MemTxCpltCallback can be implemented in the user file
  3000. */
  3001. }
  3002. /**
  3003. * @brief Memory Rx Transfer completed callbacks.
  3004. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3005. * the configuration information for I2C module
  3006. * @retval None
  3007. */
  3008. __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
  3009. {
  3010. /* Prevent unused argument(s) compilation warning */
  3011. UNUSED(hi2c);
  3012. /* NOTE : This function should not be modified, when the callback is needed,
  3013. the HAL_I2C_MemRxCpltCallback can be implemented in the user file
  3014. */
  3015. }
  3016. /**
  3017. * @brief I2C error callbacks.
  3018. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3019. * the configuration information for I2C module
  3020. * @retval None
  3021. */
  3022. __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
  3023. {
  3024. /* Prevent unused argument(s) compilation warning */
  3025. UNUSED(hi2c);
  3026. /* NOTE : This function should not be modified, when the callback is needed,
  3027. the HAL_I2C_ErrorCallback can be implemented in the user file
  3028. */
  3029. }
  3030. /**
  3031. * @brief I2C abort callback.
  3032. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3033. * the configuration information for the specified I2C.
  3034. * @retval None
  3035. */
  3036. __weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
  3037. {
  3038. /* Prevent unused argument(s) compilation warning */
  3039. UNUSED(hi2c);
  3040. /* NOTE : This function should not be modified, when the callback is needed,
  3041. the HAL_I2C_AbortCpltCallback could be implemented in the user file
  3042. */
  3043. }
  3044. /**
  3045. * @}
  3046. */
  3047. /** @defgroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions
  3048. * @brief Peripheral State and Errors functions
  3049. *
  3050. @verbatim
  3051. ===============================================================================
  3052. ##### Peripheral State, Mode and Errors functions #####
  3053. ===============================================================================
  3054. [..]
  3055. This subsection permits to get in run-time the status of the peripheral
  3056. and the data flow.
  3057. @endverbatim
  3058. * @{
  3059. */
  3060. /**
  3061. * @brief Returns the I2C state.
  3062. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3063. * the configuration information for I2C module
  3064. * @retval HAL state
  3065. */
  3066. HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
  3067. {
  3068. return hi2c->State;
  3069. }
  3070. /**
  3071. * @brief Returns the I2C Master, Slave, Memory or no mode.
  3072. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3073. * the configuration information for I2C module
  3074. * @retval HAL mode
  3075. */
  3076. HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)
  3077. {
  3078. return hi2c->Mode;
  3079. }
  3080. /**
  3081. * @brief Return the I2C error code
  3082. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3083. * the configuration information for the specified I2C.
  3084. * @retval I2C Error Code
  3085. */
  3086. uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
  3087. {
  3088. return hi2c->ErrorCode;
  3089. }
  3090. /**
  3091. * @}
  3092. */
  3093. /**
  3094. * @brief Handle TXE flag for Master
  3095. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3096. * the configuration information for I2C module
  3097. * @retval HAL status
  3098. */
  3099. static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
  3100. {
  3101. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3102. uint32_t CurrentState = hi2c->State;
  3103. uint32_t CurrentMode = hi2c->Mode;
  3104. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3105. uint32_t tmp;
  3106. if((hi2c->XferSize == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
  3107. {
  3108. /* Call TxCpltCallback() directly if no stop mode is set */
  3109. if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
  3110. {
  3111. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3112. tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
  3113. hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
  3114. hi2c->Mode = HAL_I2C_MODE_NONE;
  3115. hi2c->State = HAL_I2C_STATE_READY;
  3116. HAL_I2C_MasterTxCpltCallback(hi2c);
  3117. }
  3118. else /* Generate Stop condition then Call TxCpltCallback() */
  3119. {
  3120. /* Disable EVT, BUF and ERR interrupt */
  3121. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3122. /* Generate Stop */
  3123. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3124. hi2c->PreviousState = I2C_STATE_NONE;
  3125. hi2c->State = HAL_I2C_STATE_READY;
  3126. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3127. {
  3128. hi2c->Mode = HAL_I2C_MODE_NONE;
  3129. HAL_I2C_MemTxCpltCallback(hi2c);
  3130. }
  3131. else
  3132. {
  3133. hi2c->Mode = HAL_I2C_MODE_NONE;
  3134. HAL_I2C_MasterTxCpltCallback(hi2c);
  3135. }
  3136. }
  3137. }
  3138. else if((CurrentState == HAL_I2C_STATE_BUSY_TX) || \
  3139. ((CurrentMode == HAL_I2C_MODE_MEM) && (CurrentState == HAL_I2C_STATE_BUSY_RX)))
  3140. {
  3141. if(hi2c->XferCount == 0U)
  3142. {
  3143. /* Disable BUF interrupt */
  3144. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3145. }
  3146. else
  3147. {
  3148. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3149. {
  3150. if(hi2c->EventCount == 0)
  3151. {
  3152. /* If Memory address size is 8Bit */
  3153. if(hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT)
  3154. {
  3155. /* Send Memory Address */
  3156. hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
  3157. hi2c->EventCount += 2;
  3158. }
  3159. /* If Memory address size is 16Bit */
  3160. else
  3161. {
  3162. /* Send MSB of Memory Address */
  3163. hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress);
  3164. hi2c->EventCount++;
  3165. }
  3166. }
  3167. else if(hi2c->EventCount == 1)
  3168. {
  3169. /* Send LSB of Memory Address */
  3170. hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
  3171. hi2c->EventCount++;
  3172. }
  3173. else if(hi2c->EventCount == 2)
  3174. {
  3175. if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
  3176. {
  3177. /* Generate Restart */
  3178. hi2c->Instance->CR1 |= I2C_CR1_START;
  3179. }
  3180. else if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
  3181. {
  3182. /* Write data to DR */
  3183. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3184. hi2c->XferCount--;
  3185. }
  3186. }
  3187. }
  3188. else
  3189. {
  3190. /* Write data to DR */
  3191. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3192. hi2c->XferCount--;
  3193. }
  3194. }
  3195. }
  3196. return HAL_OK;
  3197. }
  3198. /**
  3199. * @brief Handle BTF flag for Master transmitter
  3200. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3201. * the configuration information for I2C module
  3202. * @retval HAL status
  3203. */
  3204. static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
  3205. {
  3206. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3207. uint32_t tmp;
  3208. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3209. if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
  3210. {
  3211. if(hi2c->XferCount != 0U)
  3212. {
  3213. /* Write data to DR */
  3214. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3215. hi2c->XferCount--;
  3216. }
  3217. else
  3218. {
  3219. /* Call TxCpltCallback() directly if no stop mode is set */
  3220. if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
  3221. {
  3222. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3223. tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
  3224. hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
  3225. hi2c->Mode = HAL_I2C_MODE_NONE;
  3226. hi2c->State = HAL_I2C_STATE_READY;
  3227. HAL_I2C_MasterTxCpltCallback(hi2c);
  3228. }
  3229. else /* Generate Stop condition then Call TxCpltCallback() */
  3230. {
  3231. /* Disable EVT, BUF and ERR interrupt */
  3232. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3233. /* Generate Stop */
  3234. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3235. hi2c->PreviousState = I2C_STATE_NONE;
  3236. hi2c->State = HAL_I2C_STATE_READY;
  3237. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3238. {
  3239. hi2c->Mode = HAL_I2C_MODE_NONE;
  3240. HAL_I2C_MemTxCpltCallback(hi2c);
  3241. }
  3242. else
  3243. {
  3244. hi2c->Mode = HAL_I2C_MODE_NONE;
  3245. HAL_I2C_MasterTxCpltCallback(hi2c);
  3246. }
  3247. }
  3248. }
  3249. }
  3250. return HAL_OK;
  3251. }
  3252. /**
  3253. * @brief Handle RXNE flag for Master
  3254. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3255. * the configuration information for I2C module
  3256. * @retval HAL status
  3257. */
  3258. static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
  3259. {
  3260. if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
  3261. {
  3262. uint32_t tmp = 0U;
  3263. tmp = hi2c->XferCount;
  3264. if(tmp > 3U)
  3265. {
  3266. /* Read data from DR */
  3267. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3268. hi2c->XferCount--;
  3269. }
  3270. else if((tmp == 2U) || (tmp == 3U))
  3271. {
  3272. if(hi2c->XferOptions != I2C_NEXT_FRAME)
  3273. {
  3274. /* Disable Acknowledge */
  3275. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3276. /* Enable Pos */
  3277. hi2c->Instance->CR1 |= I2C_CR1_POS;
  3278. }
  3279. else
  3280. {
  3281. /* Enable Acknowledge */
  3282. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3283. }
  3284. /* Disable BUF interrupt */
  3285. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3286. }
  3287. else
  3288. {
  3289. if(hi2c->XferOptions != I2C_NEXT_FRAME)
  3290. {
  3291. /* Disable Acknowledge */
  3292. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3293. }
  3294. else
  3295. {
  3296. /* Enable Acknowledge */
  3297. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3298. }
  3299. /* Disable EVT, BUF and ERR interrupt */
  3300. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3301. /* Read data from DR */
  3302. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3303. hi2c->XferCount--;
  3304. tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
  3305. hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
  3306. hi2c->State = HAL_I2C_STATE_READY;
  3307. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3308. {
  3309. hi2c->Mode = HAL_I2C_MODE_NONE;
  3310. HAL_I2C_MemRxCpltCallback(hi2c);
  3311. }
  3312. else
  3313. {
  3314. hi2c->Mode = HAL_I2C_MODE_NONE;
  3315. HAL_I2C_MasterRxCpltCallback(hi2c);
  3316. }
  3317. }
  3318. }
  3319. return HAL_OK;
  3320. }
  3321. /**
  3322. * @brief Handle BTF flag for Master receiver
  3323. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3324. * the configuration information for I2C module
  3325. * @retval HAL status
  3326. */
  3327. static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
  3328. {
  3329. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3330. uint32_t tmp;
  3331. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3332. if(hi2c->XferCount == 3U)
  3333. {
  3334. if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
  3335. {
  3336. /* Disable Acknowledge */
  3337. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3338. }
  3339. /* Read data from DR */
  3340. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3341. hi2c->XferCount--;
  3342. }
  3343. else if(hi2c->XferCount == 2U)
  3344. {
  3345. /* Prepare next transfer or stop current transfer */
  3346. if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
  3347. {
  3348. if(CurrentXferOptions != I2C_NEXT_FRAME)
  3349. {
  3350. /* Disable Acknowledge */
  3351. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3352. }
  3353. else
  3354. {
  3355. /* Enable Acknowledge */
  3356. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3357. }
  3358. tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
  3359. hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
  3360. }
  3361. else
  3362. {
  3363. hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
  3364. /* Generate Stop */
  3365. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3366. }
  3367. /* Read data from DR */
  3368. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3369. hi2c->XferCount--;
  3370. /* Read data from DR */
  3371. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3372. hi2c->XferCount--;
  3373. /* Disable EVT and ERR interrupt */
  3374. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  3375. hi2c->State = HAL_I2C_STATE_READY;
  3376. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3377. {
  3378. hi2c->Mode = HAL_I2C_MODE_NONE;
  3379. HAL_I2C_MemRxCpltCallback(hi2c);
  3380. }
  3381. else
  3382. {
  3383. hi2c->Mode = HAL_I2C_MODE_NONE;
  3384. HAL_I2C_MasterRxCpltCallback(hi2c);
  3385. }
  3386. }
  3387. else
  3388. {
  3389. /* Read data from DR */
  3390. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3391. hi2c->XferCount--;
  3392. }
  3393. return HAL_OK;
  3394. }
  3395. /**
  3396. * @brief Handle SB flag for Master
  3397. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3398. * the configuration information for I2C module
  3399. * @retval HAL status
  3400. */
  3401. static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c)
  3402. {
  3403. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3404. {
  3405. if(hi2c->EventCount == 0U)
  3406. {
  3407. /* Send slave address */
  3408. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
  3409. }
  3410. else
  3411. {
  3412. hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
  3413. }
  3414. }
  3415. else
  3416. {
  3417. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  3418. {
  3419. /* Send slave 7 Bits address */
  3420. if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
  3421. {
  3422. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
  3423. }
  3424. else
  3425. {
  3426. hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
  3427. }
  3428. }
  3429. else
  3430. {
  3431. if(hi2c->EventCount == 0U)
  3432. {
  3433. /* Send header of slave address */
  3434. hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(hi2c->Devaddress);
  3435. }
  3436. else if(hi2c->EventCount == 1U)
  3437. {
  3438. /* Send header of slave address */
  3439. hi2c->Instance->DR = I2C_10BIT_HEADER_READ(hi2c->Devaddress);
  3440. }
  3441. }
  3442. }
  3443. return HAL_OK;
  3444. }
  3445. /**
  3446. * @brief Handle ADD10 flag for Master
  3447. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3448. * the configuration information for I2C module
  3449. * @retval HAL status
  3450. */
  3451. static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c)
  3452. {
  3453. /* Send slave address */
  3454. hi2c->Instance->DR = I2C_10BIT_ADDRESS(hi2c->Devaddress);
  3455. return HAL_OK;
  3456. }
  3457. /**
  3458. * @brief Handle ADDR flag for Master
  3459. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3460. * the configuration information for I2C module
  3461. * @retval HAL status
  3462. */
  3463. static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c)
  3464. {
  3465. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3466. uint32_t CurrentMode = hi2c->Mode;
  3467. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3468. uint32_t Prev_State = hi2c->PreviousState;
  3469. if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
  3470. {
  3471. if((hi2c->EventCount == 0U) && (CurrentMode == HAL_I2C_MODE_MEM))
  3472. {
  3473. /* Clear ADDR flag */
  3474. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3475. }
  3476. else if((hi2c->EventCount == 0U) && (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT))
  3477. {
  3478. /* Clear ADDR flag */
  3479. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3480. /* Generate Restart */
  3481. hi2c->Instance->CR1 |= I2C_CR1_START;
  3482. hi2c->EventCount++;
  3483. }
  3484. else
  3485. {
  3486. if(hi2c->XferCount == 0U)
  3487. {
  3488. /* Clear ADDR flag */
  3489. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3490. /* Generate Stop */
  3491. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3492. }
  3493. else if(hi2c->XferCount == 1U)
  3494. {
  3495. /* Prepare next transfer or stop current transfer */
  3496. if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) \
  3497. && (Prev_State != I2C_STATE_MASTER_BUSY_RX))
  3498. {
  3499. if(hi2c->XferOptions != I2C_NEXT_FRAME)
  3500. {
  3501. /* Disable Acknowledge */
  3502. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3503. }
  3504. else
  3505. {
  3506. /* Enable Acknowledge */
  3507. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3508. }
  3509. /* Clear ADDR flag */
  3510. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3511. }
  3512. else
  3513. {
  3514. /* Disable Acknowledge */
  3515. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3516. /* Clear ADDR flag */
  3517. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3518. /* Generate Stop */
  3519. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3520. }
  3521. }
  3522. else if(hi2c->XferCount == 2U)
  3523. {
  3524. if(hi2c->XferOptions != I2C_NEXT_FRAME)
  3525. {
  3526. /* Disable Acknowledge */
  3527. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3528. /* Enable Pos */
  3529. hi2c->Instance->CR1 |= I2C_CR1_POS;
  3530. }
  3531. else
  3532. {
  3533. /* Enable Acknowledge */
  3534. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3535. }
  3536. /* Clear ADDR flag */
  3537. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3538. }
  3539. else
  3540. {
  3541. /* Enable Acknowledge */
  3542. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3543. /* Clear ADDR flag */
  3544. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3545. }
  3546. /* Reset Event counter */
  3547. hi2c->EventCount = 0;
  3548. }
  3549. }
  3550. else
  3551. {
  3552. /* Clear ADDR flag */
  3553. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3554. }
  3555. return HAL_OK;
  3556. }
  3557. /**
  3558. * @brief Handle TXE flag for Slave
  3559. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3560. * the configuration information for I2C module
  3561. * @retval HAL status
  3562. */
  3563. static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
  3564. {
  3565. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3566. uint32_t tmp;
  3567. uint32_t CurrentState = hi2c->State;
  3568. if(hi2c->XferCount != 0U)
  3569. {
  3570. /* Write data to DR */
  3571. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3572. hi2c->XferCount--;
  3573. if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
  3574. {
  3575. /* Last Byte is received, disable Interrupt */
  3576. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3577. /* Set state at HAL_I2C_STATE_LISTEN */
  3578. tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
  3579. hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
  3580. hi2c->State = HAL_I2C_STATE_LISTEN;
  3581. /* Call the Tx complete callback to inform upper layer of the end of receive process */
  3582. HAL_I2C_SlaveTxCpltCallback(hi2c);
  3583. }
  3584. }
  3585. return HAL_OK;
  3586. }
  3587. /**
  3588. * @brief Handle BTF flag for Slave transmitter
  3589. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3590. * the configuration information for I2C module
  3591. * @retval HAL status
  3592. */
  3593. static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
  3594. {
  3595. if(hi2c->XferCount != 0U)
  3596. {
  3597. /* Write data to DR */
  3598. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3599. hi2c->XferCount--;
  3600. }
  3601. return HAL_OK;
  3602. }
  3603. /**
  3604. * @brief Handle RXNE flag for Slave
  3605. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3606. * the configuration information for I2C module
  3607. * @retval HAL status
  3608. */
  3609. static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
  3610. {
  3611. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3612. uint32_t tmp;
  3613. uint32_t CurrentState = hi2c->State;
  3614. if(hi2c->XferCount != 0U)
  3615. {
  3616. /* Read data from DR */
  3617. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3618. hi2c->XferCount--;
  3619. if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
  3620. {
  3621. /* Last Byte is received, disable Interrupt */
  3622. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3623. /* Set state at HAL_I2C_STATE_LISTEN */
  3624. tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
  3625. hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
  3626. hi2c->State = HAL_I2C_STATE_LISTEN;
  3627. /* Call the Rx complete callback to inform upper layer of the end of receive process */
  3628. HAL_I2C_SlaveRxCpltCallback(hi2c);
  3629. }
  3630. }
  3631. return HAL_OK;
  3632. }
  3633. /**
  3634. * @brief Handle BTF flag for Slave receiver
  3635. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3636. * the configuration information for I2C module
  3637. * @retval HAL status
  3638. */
  3639. static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
  3640. {
  3641. if(hi2c->XferCount != 0U)
  3642. {
  3643. /* Read data from DR */
  3644. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3645. hi2c->XferCount--;
  3646. }
  3647. return HAL_OK;
  3648. }
  3649. /**
  3650. * @brief Handle ADD flag for Slave
  3651. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3652. * the configuration information for I2C module
  3653. * @retval HAL status
  3654. */
  3655. static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c)
  3656. {
  3657. uint8_t TransferDirection = I2C_DIRECTION_RECEIVE;
  3658. uint16_t SlaveAddrCode = 0U;
  3659. /* Transfer Direction requested by Master */
  3660. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == RESET)
  3661. {
  3662. TransferDirection = I2C_DIRECTION_TRANSMIT;
  3663. }
  3664. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_DUALF) == RESET)
  3665. {
  3666. SlaveAddrCode = hi2c->Init.OwnAddress1;
  3667. }
  3668. else
  3669. {
  3670. SlaveAddrCode = hi2c->Init.OwnAddress2;
  3671. }
  3672. /* Call Slave Addr callback */
  3673. HAL_I2C_AddrCallback(hi2c, TransferDirection, SlaveAddrCode);
  3674. return HAL_OK;
  3675. }
  3676. /**
  3677. * @brief Handle STOPF flag for Slave
  3678. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3679. * the configuration information for I2C module
  3680. * @retval HAL status
  3681. */
  3682. static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
  3683. {
  3684. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3685. uint32_t CurrentState = hi2c->State;
  3686. /* Disable EVT, BUF and ERR interrupt */
  3687. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3688. /* Clear STOPF flag */
  3689. __HAL_I2C_CLEAR_STOPFLAG(hi2c);
  3690. /* Disable Acknowledge */
  3691. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3692. if((CurrentState == HAL_I2C_STATE_LISTEN ) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN) || \
  3693. (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
  3694. {
  3695. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3696. hi2c->PreviousState = I2C_STATE_NONE;
  3697. hi2c->State = HAL_I2C_STATE_READY;
  3698. hi2c->Mode = HAL_I2C_MODE_NONE;
  3699. /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  3700. HAL_I2C_ListenCpltCallback(hi2c);
  3701. }
  3702. else
  3703. {
  3704. if((hi2c->PreviousState == I2C_STATE_SLAVE_BUSY_RX) || (CurrentState == HAL_I2C_STATE_BUSY_RX))
  3705. {
  3706. hi2c->PreviousState = I2C_STATE_NONE;
  3707. hi2c->State = HAL_I2C_STATE_READY;
  3708. hi2c->Mode = HAL_I2C_MODE_NONE;
  3709. HAL_I2C_SlaveRxCpltCallback(hi2c);
  3710. }
  3711. }
  3712. return HAL_OK;
  3713. }
  3714. /**
  3715. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3716. * the configuration information for I2C module
  3717. * @retval HAL status
  3718. */
  3719. static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
  3720. {
  3721. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3722. uint32_t CurrentState = hi2c->State;
  3723. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3724. uint32_t tmp;
  3725. if(((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME)) && \
  3726. (CurrentState == HAL_I2C_STATE_LISTEN))
  3727. {
  3728. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3729. /* Disable EVT, BUF and ERR interrupt */
  3730. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3731. /* Clear AF flag */
  3732. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  3733. /* Disable Acknowledge */
  3734. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3735. hi2c->PreviousState = I2C_STATE_NONE;
  3736. hi2c->State = HAL_I2C_STATE_READY;
  3737. hi2c->Mode = HAL_I2C_MODE_NONE;
  3738. /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  3739. HAL_I2C_ListenCpltCallback(hi2c);
  3740. }
  3741. else if(CurrentState == HAL_I2C_STATE_BUSY_TX)
  3742. {
  3743. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3744. tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
  3745. hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
  3746. hi2c->State = HAL_I2C_STATE_READY;
  3747. hi2c->Mode = HAL_I2C_MODE_NONE;
  3748. /* Disable EVT, BUF and ERR interrupt */
  3749. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3750. /* Clear AF flag */
  3751. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  3752. /* Disable Acknowledge */
  3753. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3754. HAL_I2C_SlaveTxCpltCallback(hi2c);
  3755. }
  3756. else
  3757. {
  3758. /* Clear AF flag only */
  3759. /* State Listen, but XferOptions == FIRST or NEXT */
  3760. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  3761. }
  3762. return HAL_OK;
  3763. }
  3764. /**
  3765. * @brief I2C interrupts error process
  3766. * @param hi2c I2C handle.
  3767. * @retval None
  3768. */
  3769. static void I2C_ITError(I2C_HandleTypeDef *hi2c)
  3770. {
  3771. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3772. uint32_t CurrentState = hi2c->State;
  3773. if((CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
  3774. {
  3775. /* keep HAL_I2C_STATE_LISTEN */
  3776. hi2c->PreviousState = I2C_STATE_NONE;
  3777. hi2c->State = HAL_I2C_STATE_LISTEN;
  3778. }
  3779. else
  3780. {
  3781. /* If state is an abort treatment on going, don't change state */
  3782. /* This change will be do later */
  3783. if(hi2c->State != HAL_I2C_STATE_ABORT)
  3784. {
  3785. hi2c->State = HAL_I2C_STATE_READY;
  3786. }
  3787. hi2c->PreviousState = I2C_STATE_NONE;
  3788. hi2c->Mode = HAL_I2C_MODE_NONE;
  3789. }
  3790. /* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */
  3791. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  3792. /* Abort DMA transfer */
  3793. if((hi2c->Instance->CR1 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  3794. {
  3795. hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
  3796. if(hi2c->hdmatx != NULL)
  3797. {
  3798. /* Set the DMA Abort callback :
  3799. will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  3800. hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
  3801. if(HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
  3802. {
  3803. /* Call Directly XferAbortCallback function in case of error */
  3804. hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
  3805. }
  3806. }
  3807. else if(hi2c->hdmarx != NULL)
  3808. {
  3809. /* Set the DMA Abort callback :
  3810. will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  3811. hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
  3812. if(HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
  3813. {
  3814. /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */
  3815. hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
  3816. }
  3817. }
  3818. }
  3819. else if(hi2c->State == HAL_I2C_STATE_ABORT)
  3820. {
  3821. hi2c->State = HAL_I2C_STATE_READY;
  3822. /* Call the corresponding callback to inform upper layer of End of Transfer */
  3823. HAL_I2C_AbortCpltCallback(hi2c);
  3824. }
  3825. else
  3826. {
  3827. /* Call user error callback */
  3828. HAL_I2C_ErrorCallback(hi2c);
  3829. }
  3830. /* STOP Flag is not set after a NACK reception */
  3831. /* So may inform upper layer that listen phase is stopped */
  3832. /* during NACK error treatment */
  3833. if((hi2c->State == HAL_I2C_STATE_LISTEN) && ((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF))
  3834. {
  3835. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3836. hi2c->PreviousState = I2C_STATE_NONE;
  3837. hi2c->State = HAL_I2C_STATE_READY;
  3838. hi2c->Mode = HAL_I2C_MODE_NONE;
  3839. /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  3840. HAL_I2C_ListenCpltCallback(hi2c);
  3841. }
  3842. }
  3843. /**
  3844. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3845. * the configuration information for I2C module
  3846. * @param DevAddress Target device address: The device 7 bits address value
  3847. * in datasheet must be shift at right before call interface
  3848. * @param Timeout Timeout duration
  3849. * @param Tickstart Tick start value
  3850. * @retval HAL status
  3851. */
  3852. static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
  3853. {
  3854. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3855. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3856. /* Generate Start condition if first transfer */
  3857. if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
  3858. {
  3859. /* Generate Start */
  3860. hi2c->Instance->CR1 |= I2C_CR1_START;
  3861. }
  3862. else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
  3863. {
  3864. /* Generate ReStart */
  3865. hi2c->Instance->CR1 |= I2C_CR1_START;
  3866. }
  3867. /* Wait until SB flag is set */
  3868. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  3869. {
  3870. return HAL_TIMEOUT;
  3871. }
  3872. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  3873. {
  3874. /* Send slave address */
  3875. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  3876. }
  3877. else
  3878. {
  3879. /* Send header of slave address */
  3880. hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
  3881. /* Wait until ADD10 flag is set */
  3882. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
  3883. {
  3884. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  3885. {
  3886. return HAL_ERROR;
  3887. }
  3888. else
  3889. {
  3890. return HAL_TIMEOUT;
  3891. }
  3892. }
  3893. /* Send slave address */
  3894. hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
  3895. }
  3896. /* Wait until ADDR flag is set */
  3897. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  3898. {
  3899. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  3900. {
  3901. return HAL_ERROR;
  3902. }
  3903. else
  3904. {
  3905. return HAL_TIMEOUT;
  3906. }
  3907. }
  3908. return HAL_OK;
  3909. }
  3910. /**
  3911. * @brief Master sends target device address for read request.
  3912. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3913. * the configuration information for I2C module
  3914. * @param DevAddress Target device address: The device 7 bits address value
  3915. * in datasheet must be shift at right before call interface
  3916. * @param Timeout Timeout duration
  3917. * @param Tickstart Tick start value
  3918. * @retval HAL status
  3919. */
  3920. static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
  3921. {
  3922. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3923. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3924. /* Generate Start condition if first transfer */
  3925. if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
  3926. {
  3927. /* Enable Acknowledge */
  3928. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3929. /* Generate Start */
  3930. hi2c->Instance->CR1 |= I2C_CR1_START;
  3931. }
  3932. else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
  3933. {
  3934. /* Enable Acknowledge */
  3935. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3936. /* Generate ReStart */
  3937. hi2c->Instance->CR1 |= I2C_CR1_START;
  3938. }
  3939. /* Wait until SB flag is set */
  3940. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  3941. {
  3942. return HAL_TIMEOUT;
  3943. }
  3944. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  3945. {
  3946. /* Send slave address */
  3947. hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
  3948. }
  3949. else
  3950. {
  3951. /* Send header of slave address */
  3952. hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
  3953. /* Wait until ADD10 flag is set */
  3954. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
  3955. {
  3956. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  3957. {
  3958. return HAL_ERROR;
  3959. }
  3960. else
  3961. {
  3962. return HAL_TIMEOUT;
  3963. }
  3964. }
  3965. /* Send slave address */
  3966. hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
  3967. /* Wait until ADDR flag is set */
  3968. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  3969. {
  3970. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  3971. {
  3972. return HAL_ERROR;
  3973. }
  3974. else
  3975. {
  3976. return HAL_TIMEOUT;
  3977. }
  3978. }
  3979. /* Clear ADDR flag */
  3980. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3981. /* Generate Restart */
  3982. hi2c->Instance->CR1 |= I2C_CR1_START;
  3983. /* Wait until SB flag is set */
  3984. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  3985. {
  3986. return HAL_TIMEOUT;
  3987. }
  3988. /* Send header of slave address */
  3989. hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
  3990. }
  3991. /* Wait until ADDR flag is set */
  3992. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  3993. {
  3994. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  3995. {
  3996. return HAL_ERROR;
  3997. }
  3998. else
  3999. {
  4000. return HAL_TIMEOUT;
  4001. }
  4002. }
  4003. return HAL_OK;
  4004. }
  4005. /**
  4006. * @brief Master sends target device address followed by internal memory address for write request.
  4007. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4008. * the configuration information for I2C module
  4009. * @param DevAddress Target device address
  4010. * @param MemAddress Internal memory address
  4011. * @param MemAddSize Size of internal memory address
  4012. * @param Timeout Timeout duration
  4013. * @param Tickstart Tick start value
  4014. * @retval HAL status
  4015. */
  4016. static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
  4017. {
  4018. /* Generate Start */
  4019. hi2c->Instance->CR1 |= I2C_CR1_START;
  4020. /* Wait until SB flag is set */
  4021. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4022. {
  4023. return HAL_TIMEOUT;
  4024. }
  4025. /* Send slave address */
  4026. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  4027. /* Wait until ADDR flag is set */
  4028. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4029. {
  4030. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4031. {
  4032. return HAL_ERROR;
  4033. }
  4034. else
  4035. {
  4036. return HAL_TIMEOUT;
  4037. }
  4038. }
  4039. /* Clear ADDR flag */
  4040. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4041. /* Wait until TXE flag is set */
  4042. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4043. {
  4044. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4045. {
  4046. /* Generate Stop */
  4047. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4048. return HAL_ERROR;
  4049. }
  4050. else
  4051. {
  4052. return HAL_TIMEOUT;
  4053. }
  4054. }
  4055. /* If Memory address size is 8Bit */
  4056. if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
  4057. {
  4058. /* Send Memory Address */
  4059. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4060. }
  4061. /* If Memory address size is 16Bit */
  4062. else
  4063. {
  4064. /* Send MSB of Memory Address */
  4065. hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
  4066. /* Wait until TXE flag is set */
  4067. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4068. {
  4069. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4070. {
  4071. /* Generate Stop */
  4072. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4073. return HAL_ERROR;
  4074. }
  4075. else
  4076. {
  4077. return HAL_TIMEOUT;
  4078. }
  4079. }
  4080. /* Send LSB of Memory Address */
  4081. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4082. }
  4083. return HAL_OK;
  4084. }
  4085. /**
  4086. * @brief Master sends target device address followed by internal memory address for read request.
  4087. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4088. * the configuration information for I2C module
  4089. * @param DevAddress Target device address
  4090. * @param MemAddress Internal memory address
  4091. * @param MemAddSize Size of internal memory address
  4092. * @param Timeout Timeout duration
  4093. * @param Tickstart Tick start value
  4094. * @retval HAL status
  4095. */
  4096. static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
  4097. {
  4098. /* Enable Acknowledge */
  4099. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  4100. /* Generate Start */
  4101. hi2c->Instance->CR1 |= I2C_CR1_START;
  4102. /* Wait until SB flag is set */
  4103. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4104. {
  4105. return HAL_TIMEOUT;
  4106. }
  4107. /* Send slave address */
  4108. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  4109. /* Wait until ADDR flag is set */
  4110. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4111. {
  4112. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4113. {
  4114. return HAL_ERROR;
  4115. }
  4116. else
  4117. {
  4118. return HAL_TIMEOUT;
  4119. }
  4120. }
  4121. /* Clear ADDR flag */
  4122. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4123. /* Wait until TXE flag is set */
  4124. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4125. {
  4126. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4127. {
  4128. /* Generate Stop */
  4129. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4130. return HAL_ERROR;
  4131. }
  4132. else
  4133. {
  4134. return HAL_TIMEOUT;
  4135. }
  4136. }
  4137. /* If Memory address size is 8Bit */
  4138. if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
  4139. {
  4140. /* Send Memory Address */
  4141. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4142. }
  4143. /* If Memory address size is 16Bit */
  4144. else
  4145. {
  4146. /* Send MSB of Memory Address */
  4147. hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
  4148. /* Wait until TXE flag is set */
  4149. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4150. {
  4151. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4152. {
  4153. /* Generate Stop */
  4154. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4155. return HAL_ERROR;
  4156. }
  4157. else
  4158. {
  4159. return HAL_TIMEOUT;
  4160. }
  4161. }
  4162. /* Send LSB of Memory Address */
  4163. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4164. }
  4165. /* Wait until TXE flag is set */
  4166. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4167. {
  4168. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4169. {
  4170. /* Generate Stop */
  4171. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4172. return HAL_ERROR;
  4173. }
  4174. else
  4175. {
  4176. return HAL_TIMEOUT;
  4177. }
  4178. }
  4179. /* Generate Restart */
  4180. hi2c->Instance->CR1 |= I2C_CR1_START;
  4181. /* Wait until SB flag is set */
  4182. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4183. {
  4184. return HAL_TIMEOUT;
  4185. }
  4186. /* Send slave address */
  4187. hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
  4188. /* Wait until ADDR flag is set */
  4189. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4190. {
  4191. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4192. {
  4193. return HAL_ERROR;
  4194. }
  4195. else
  4196. {
  4197. return HAL_TIMEOUT;
  4198. }
  4199. }
  4200. return HAL_OK;
  4201. }
  4202. /**
  4203. * @brief DMA I2C process complete callback.
  4204. * @param hdma DMA handle
  4205. * @retval None
  4206. */
  4207. static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma)
  4208. {
  4209. I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  4210. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  4211. uint32_t CurrentState = hi2c->State;
  4212. uint32_t CurrentMode = hi2c->Mode;
  4213. if((CurrentState == HAL_I2C_STATE_BUSY_TX) || ((CurrentState == HAL_I2C_STATE_BUSY_RX) && (CurrentMode == HAL_I2C_MODE_SLAVE)))
  4214. {
  4215. /* Disable DMA Request */
  4216. hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
  4217. hi2c->XferCount = 0U;
  4218. /* Enable EVT and ERR interrupt */
  4219. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  4220. }
  4221. else
  4222. {
  4223. /* Disable Acknowledge */
  4224. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  4225. /* Generate Stop */
  4226. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4227. /* Disable Last DMA */
  4228. hi2c->Instance->CR2 &= ~I2C_CR2_LAST;
  4229. /* Disable DMA Request */
  4230. hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
  4231. hi2c->XferCount = 0U;
  4232. /* Check if Errors has been detected during transfer */
  4233. if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  4234. {
  4235. HAL_I2C_ErrorCallback(hi2c);
  4236. }
  4237. else
  4238. {
  4239. hi2c->State = HAL_I2C_STATE_READY;
  4240. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  4241. {
  4242. hi2c->Mode = HAL_I2C_MODE_NONE;
  4243. HAL_I2C_MemRxCpltCallback(hi2c);
  4244. }
  4245. else
  4246. {
  4247. hi2c->Mode = HAL_I2C_MODE_NONE;
  4248. HAL_I2C_MasterRxCpltCallback(hi2c);
  4249. }
  4250. }
  4251. }
  4252. }
  4253. /**
  4254. * @brief DMA I2C communication error callback.
  4255. * @param hdma DMA handle
  4256. * @retval None
  4257. */
  4258. static void I2C_DMAError(DMA_HandleTypeDef *hdma)
  4259. {
  4260. I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  4261. /* Disable Acknowledge */
  4262. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  4263. hi2c->XferCount = 0U;
  4264. hi2c->State = HAL_I2C_STATE_READY;
  4265. hi2c->Mode = HAL_I2C_MODE_NONE;
  4266. hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  4267. HAL_I2C_ErrorCallback(hi2c);
  4268. }
  4269. /**
  4270. * @brief DMA I2C communication abort callback
  4271. * (To be called at end of DMA Abort procedure).
  4272. * @param hdma: DMA handle.
  4273. * @retval None
  4274. */
  4275. static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
  4276. {
  4277. I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  4278. /* Disable Acknowledge */
  4279. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  4280. hi2c->XferCount = 0U;
  4281. /* Reset XferAbortCallback */
  4282. hi2c->hdmatx->XferAbortCallback = NULL;
  4283. hi2c->hdmarx->XferAbortCallback = NULL;
  4284. /* Check if come from abort from user */
  4285. if(hi2c->State == HAL_I2C_STATE_ABORT)
  4286. {
  4287. hi2c->State = HAL_I2C_STATE_READY;
  4288. hi2c->Mode = HAL_I2C_MODE_NONE;
  4289. /* Call the corresponding callback to inform upper layer of End of Transfer */
  4290. HAL_I2C_AbortCpltCallback(hi2c);
  4291. }
  4292. else
  4293. {
  4294. hi2c->State = HAL_I2C_STATE_READY;
  4295. hi2c->Mode = HAL_I2C_MODE_NONE;
  4296. /* Call the corresponding callback to inform upper layer of End of Transfer */
  4297. HAL_I2C_ErrorCallback(hi2c);
  4298. }
  4299. }
  4300. /**
  4301. * @brief This function handles I2C Communication Timeout.
  4302. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4303. * the configuration information for I2C module
  4304. * @param Flag specifies the I2C flag to check.
  4305. * @param Status The new Flag status (SET or RESET).
  4306. * @param Timeout Timeout duration
  4307. * @param Tickstart Tick start value
  4308. * @retval HAL status
  4309. */
  4310. static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
  4311. {
  4312. /* Wait until flag is set */
  4313. while((__HAL_I2C_GET_FLAG(hi2c, Flag) ? SET : RESET) == Status)
  4314. {
  4315. /* Check for the Timeout */
  4316. if(Timeout != HAL_MAX_DELAY)
  4317. {
  4318. if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
  4319. {
  4320. hi2c->PreviousState = I2C_STATE_NONE;
  4321. hi2c->State= HAL_I2C_STATE_READY;
  4322. /* Process Unlocked */
  4323. __HAL_UNLOCK(hi2c);
  4324. return HAL_TIMEOUT;
  4325. }
  4326. }
  4327. }
  4328. return HAL_OK;
  4329. }
  4330. /**
  4331. * @brief This function handles I2C Communication Timeout for Master addressing phase.
  4332. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4333. * the configuration information for I2C module
  4334. * @param Flag specifies the I2C flag to check.
  4335. * @param Timeout Timeout duration
  4336. * @param Tickstart Tick start value
  4337. * @retval HAL status
  4338. */
  4339. static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
  4340. {
  4341. while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
  4342. {
  4343. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
  4344. {
  4345. /* Generate Stop */
  4346. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4347. /* Clear AF Flag */
  4348. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  4349. hi2c->ErrorCode = HAL_I2C_ERROR_AF;
  4350. hi2c->PreviousState = I2C_STATE_NONE;
  4351. hi2c->State= HAL_I2C_STATE_READY;
  4352. /* Process Unlocked */
  4353. __HAL_UNLOCK(hi2c);
  4354. return HAL_ERROR;
  4355. }
  4356. /* Check for the Timeout */
  4357. if(Timeout != HAL_MAX_DELAY)
  4358. {
  4359. if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
  4360. {
  4361. hi2c->PreviousState = I2C_STATE_NONE;
  4362. hi2c->State= HAL_I2C_STATE_READY;
  4363. /* Process Unlocked */
  4364. __HAL_UNLOCK(hi2c);
  4365. return HAL_TIMEOUT;
  4366. }
  4367. }
  4368. }
  4369. return HAL_OK;
  4370. }
  4371. /**
  4372. * @brief This function handles I2C Communication Timeout for specific usage of TXE flag.
  4373. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4374. * the configuration information for the specified I2C.
  4375. * @param Timeout Timeout duration
  4376. * @param Tickstart Tick start value
  4377. * @retval HAL status
  4378. */
  4379. static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4380. {
  4381. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
  4382. {
  4383. /* Check if a NACK is detected */
  4384. if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  4385. {
  4386. return HAL_ERROR;
  4387. }
  4388. /* Check for the Timeout */
  4389. if(Timeout != HAL_MAX_DELAY)
  4390. {
  4391. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  4392. {
  4393. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4394. hi2c->PreviousState = I2C_STATE_NONE;
  4395. hi2c->State= HAL_I2C_STATE_READY;
  4396. /* Process Unlocked */
  4397. __HAL_UNLOCK(hi2c);
  4398. return HAL_TIMEOUT;
  4399. }
  4400. }
  4401. }
  4402. return HAL_OK;
  4403. }
  4404. /**
  4405. * @brief This function handles I2C Communication Timeout for specific usage of BTF flag.
  4406. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4407. * the configuration information for the specified I2C.
  4408. * @param Timeout Timeout duration
  4409. * @param Tickstart Tick start value
  4410. * @retval HAL status
  4411. */
  4412. static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4413. {
  4414. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
  4415. {
  4416. /* Check if a NACK is detected */
  4417. if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  4418. {
  4419. return HAL_ERROR;
  4420. }
  4421. /* Check for the Timeout */
  4422. if(Timeout != HAL_MAX_DELAY)
  4423. {
  4424. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  4425. {
  4426. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4427. hi2c->PreviousState = I2C_STATE_NONE;
  4428. hi2c->State= HAL_I2C_STATE_READY;
  4429. /* Process Unlocked */
  4430. __HAL_UNLOCK(hi2c);
  4431. return HAL_TIMEOUT;
  4432. }
  4433. }
  4434. }
  4435. return HAL_OK;
  4436. }
  4437. /**
  4438. * @brief This function handles I2C Communication Timeout for specific usage of STOP flag.
  4439. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4440. * the configuration information for the specified I2C.
  4441. * @param Timeout Timeout duration
  4442. * @param Tickstart Tick start value
  4443. * @retval HAL status
  4444. */
  4445. static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4446. {
  4447. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
  4448. {
  4449. /* Check if a NACK is detected */
  4450. if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  4451. {
  4452. return HAL_ERROR;
  4453. }
  4454. /* Check for the Timeout */
  4455. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  4456. {
  4457. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4458. hi2c->PreviousState = I2C_STATE_NONE;
  4459. hi2c->State= HAL_I2C_STATE_READY;
  4460. /* Process Unlocked */
  4461. __HAL_UNLOCK(hi2c);
  4462. return HAL_TIMEOUT;
  4463. }
  4464. }
  4465. return HAL_OK;
  4466. }
  4467. /**
  4468. * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
  4469. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4470. * the configuration information for the specified I2C.
  4471. * @param Timeout Timeout duration
  4472. * @param Tickstart Tick start value
  4473. * @retval HAL status
  4474. */
  4475. static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4476. {
  4477. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
  4478. {
  4479. /* Check if a STOPF is detected */
  4480. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
  4481. {
  4482. /* Clear STOP Flag */
  4483. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
  4484. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  4485. hi2c->PreviousState = I2C_STATE_NONE;
  4486. hi2c->State= HAL_I2C_STATE_READY;
  4487. /* Process Unlocked */
  4488. __HAL_UNLOCK(hi2c);
  4489. return HAL_ERROR;
  4490. }
  4491. /* Check for the Timeout */
  4492. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  4493. {
  4494. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4495. hi2c->State= HAL_I2C_STATE_READY;
  4496. /* Process Unlocked */
  4497. __HAL_UNLOCK(hi2c);
  4498. return HAL_TIMEOUT;
  4499. }
  4500. }
  4501. return HAL_OK;
  4502. }
  4503. /**
  4504. * @brief This function handles Acknowledge failed detection during an I2C Communication.
  4505. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4506. * the configuration information for the specified I2C.
  4507. * @retval HAL status
  4508. */
  4509. static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
  4510. {
  4511. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
  4512. {
  4513. /* Clear NACKF Flag */
  4514. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  4515. hi2c->ErrorCode = HAL_I2C_ERROR_AF;
  4516. hi2c->PreviousState = I2C_STATE_NONE;
  4517. hi2c->State= HAL_I2C_STATE_READY;
  4518. /* Process Unlocked */
  4519. __HAL_UNLOCK(hi2c);
  4520. return HAL_ERROR;
  4521. }
  4522. return HAL_OK;
  4523. }
  4524. /**
  4525. * @}
  4526. */
  4527. #endif /* HAL_I2C_MODULE_ENABLED */
  4528. /**
  4529. * @}
  4530. */
  4531. /**
  4532. * @}
  4533. */
  4534. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/