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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_can.c
  4. * @author MCD Application Team
  5. * @version V1.5.1
  6. * @date 01-July-2016
  7. * @brief This file provides firmware functions to manage the following
  8. * functionalities of the Controller Area Network (CAN) peripheral:
  9. * + Initialization and de-initialization functions
  10. * + IO operation functions
  11. * + Peripheral Control functions
  12. * + Peripheral State and Error functions
  13. *
  14. @verbatim
  15. ==============================================================================
  16. ##### How to use this driver #####
  17. ==============================================================================
  18. [..]
  19. (#) Enable the CAN controller interface clock using
  20. __HAL_RCC_CAN1_CLK_ENABLE() for CAN1 and __HAL_RCC_CAN2_CLK_ENABLE() for CAN2
  21. -@- In case you are using CAN2 only, you have to enable the CAN1 clock.
  22. (#) CAN pins configuration
  23. (++) Enable the clock for the CAN GPIOs using the following function:
  24. __GPIOx_CLK_ENABLE()
  25. (++) Connect and configure the involved CAN pins to AF9 using the
  26. following function HAL_GPIO_Init()
  27. (#) Initialize and configure the CAN using CAN_Init() function.
  28. (#) Transmit the desired CAN frame using HAL_CAN_Transmit() function.
  29. (#) Receive a CAN frame using HAL_CAN_Receive() function.
  30. *** Polling mode IO operation ***
  31. =================================
  32. [..]
  33. (+) Start the CAN peripheral transmission and wait the end of this operation
  34. using HAL_CAN_Transmit(), at this stage user can specify the value of timeout
  35. according to his end application
  36. (+) Start the CAN peripheral reception and wait the end of this operation
  37. using HAL_CAN_Receive(), at this stage user can specify the value of timeout
  38. according to his end application
  39. *** Interrupt mode IO operation ***
  40. ===================================
  41. [..]
  42. (+) Start the CAN peripheral transmission using HAL_CAN_Transmit_IT()
  43. (+) Start the CAN peripheral reception using HAL_CAN_Receive_IT()
  44. (+) Use HAL_CAN_IRQHandler() called under the used CAN Interrupt subroutine
  45. (+) At CAN end of transmission HAL_CAN_TxCpltCallback() function is executed and user can
  46. add his own code by customization of function pointer HAL_CAN_TxCpltCallback
  47. (+) In case of CAN Error, HAL_CAN_ErrorCallback() function is executed and user can
  48. add his own code by customization of function pointer HAL_CAN_ErrorCallback
  49. *** CAN HAL driver macros list ***
  50. =============================================
  51. [..]
  52. Below the list of most used macros in CAN HAL driver.
  53. (+) __HAL_CAN_ENABLE_IT: Enable the specified CAN interrupts
  54. (+) __HAL_CAN_DISABLE_IT: Disable the specified CAN interrupts
  55. (+) __HAL_CAN_GET_IT_SOURCE: Check if the specified CAN interrupt source is enabled or disabled
  56. (+) __HAL_CAN_CLEAR_FLAG: Clear the CAN's pending flags
  57. (+) __HAL_CAN_GET_FLAG: Get the selected CAN's flag status
  58. [..]
  59. (@) You can refer to the CAN HAL driver header file for more useful macros
  60. @endverbatim
  61. ******************************************************************************
  62. * @attention
  63. *
  64. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  65. *
  66. * Redistribution and use in source and binary forms, with or without modification,
  67. * are permitted provided that the following conditions are met:
  68. * 1. Redistributions of source code must retain the above copyright notice,
  69. * this list of conditions and the following disclaimer.
  70. * 2. Redistributions in binary form must reproduce the above copyright notice,
  71. * this list of conditions and the following disclaimer in the documentation
  72. * and/or other materials provided with the distribution.
  73. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  74. * may be used to endorse or promote products derived from this software
  75. * without specific prior written permission.
  76. *
  77. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  78. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  79. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  80. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  81. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  82. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  83. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  84. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  85. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  86. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  87. *
  88. ******************************************************************************
  89. */
  90. /* Includes ------------------------------------------------------------------*/
  91. #include "stm32f4xx_hal.h"
  92. /** @addtogroup STM32F4xx_HAL_Driver
  93. * @{
  94. */
  95. /** @defgroup CAN CAN
  96. * @brief CAN driver modules
  97. * @{
  98. */
  99. #ifdef HAL_CAN_MODULE_ENABLED
  100. #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
  101. defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
  102. defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||\
  103. defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
  104. /* Private typedef -----------------------------------------------------------*/
  105. /* Private define ------------------------------------------------------------*/
  106. /** @addtogroup CAN_Private_Constants
  107. * @{
  108. */
  109. #define CAN_TIMEOUT_VALUE 10U
  110. /**
  111. * @}
  112. */
  113. /* Private macro -------------------------------------------------------------*/
  114. /* Private variables ---------------------------------------------------------*/
  115. /* Private function prototypes -----------------------------------------------*/
  116. /** @addtogroup CAN_Private_Functions
  117. * @{
  118. */
  119. static HAL_StatusTypeDef CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber);
  120. static HAL_StatusTypeDef CAN_Transmit_IT(CAN_HandleTypeDef* hcan);
  121. /**
  122. * @}
  123. */
  124. /* Exported functions --------------------------------------------------------*/
  125. /** @defgroup CAN_Exported_Functions CAN Exported Functions
  126. * @{
  127. */
  128. /** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions
  129. * @brief Initialization and Configuration functions
  130. *
  131. @verbatim
  132. ==============================================================================
  133. ##### Initialization and de-initialization functions #####
  134. ==============================================================================
  135. [..] This section provides functions allowing to:
  136. (+) Initialize and configure the CAN.
  137. (+) De-initialize the CAN.
  138. @endverbatim
  139. * @{
  140. */
  141. /**
  142. * @brief Initializes the CAN peripheral according to the specified
  143. * parameters in the CAN_InitStruct.
  144. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  145. * the configuration information for the specified CAN.
  146. * @retval HAL status
  147. */
  148. HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan)
  149. {
  150. uint32_t InitStatus = 3U;
  151. uint32_t tickstart = 0U;
  152. /* Check CAN handle */
  153. if(hcan == NULL)
  154. {
  155. return HAL_ERROR;
  156. }
  157. /* Check the parameters */
  158. assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance));
  159. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TTCM));
  160. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.ABOM));
  161. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AWUM));
  162. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.NART));
  163. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.RFLM));
  164. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TXFP));
  165. assert_param(IS_CAN_MODE(hcan->Init.Mode));
  166. assert_param(IS_CAN_SJW(hcan->Init.SJW));
  167. assert_param(IS_CAN_BS1(hcan->Init.BS1));
  168. assert_param(IS_CAN_BS2(hcan->Init.BS2));
  169. assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler));
  170. if(hcan->State == HAL_CAN_STATE_RESET)
  171. {
  172. /* Allocate lock resource and initialize it */
  173. hcan->Lock = HAL_UNLOCKED;
  174. /* Init the low level hardware */
  175. HAL_CAN_MspInit(hcan);
  176. }
  177. /* Initialize the CAN state*/
  178. hcan->State = HAL_CAN_STATE_BUSY;
  179. /* Exit from sleep mode */
  180. hcan->Instance->MCR &= (~(uint32_t)CAN_MCR_SLEEP);
  181. /* Request initialisation */
  182. hcan->Instance->MCR |= CAN_MCR_INRQ ;
  183. /* Get tick */
  184. tickstart = HAL_GetTick();
  185. /* Wait the acknowledge */
  186. while((hcan->Instance->MSR & CAN_MSR_INAK) != CAN_MSR_INAK)
  187. {
  188. if((HAL_GetTick() - tickstart ) > CAN_TIMEOUT_VALUE)
  189. {
  190. hcan->State= HAL_CAN_STATE_TIMEOUT;
  191. /* Process unlocked */
  192. __HAL_UNLOCK(hcan);
  193. return HAL_TIMEOUT;
  194. }
  195. }
  196. /* Check acknowledge */
  197. if ((hcan->Instance->MSR & CAN_MSR_INAK) != CAN_MSR_INAK)
  198. {
  199. InitStatus = CAN_INITSTATUS_FAILED;
  200. }
  201. else
  202. {
  203. /* Set the time triggered communication mode */
  204. if (hcan->Init.TTCM == ENABLE)
  205. {
  206. hcan->Instance->MCR |= CAN_MCR_TTCM;
  207. }
  208. else
  209. {
  210. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_TTCM;
  211. }
  212. /* Set the automatic bus-off management */
  213. if (hcan->Init.ABOM == ENABLE)
  214. {
  215. hcan->Instance->MCR |= CAN_MCR_ABOM;
  216. }
  217. else
  218. {
  219. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_ABOM;
  220. }
  221. /* Set the automatic wake-up mode */
  222. if (hcan->Init.AWUM == ENABLE)
  223. {
  224. hcan->Instance->MCR |= CAN_MCR_AWUM;
  225. }
  226. else
  227. {
  228. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_AWUM;
  229. }
  230. /* Set the no automatic retransmission */
  231. if (hcan->Init.NART == ENABLE)
  232. {
  233. hcan->Instance->MCR |= CAN_MCR_NART;
  234. }
  235. else
  236. {
  237. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_NART;
  238. }
  239. /* Set the receive FIFO locked mode */
  240. if (hcan->Init.RFLM == ENABLE)
  241. {
  242. hcan->Instance->MCR |= CAN_MCR_RFLM;
  243. }
  244. else
  245. {
  246. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_RFLM;
  247. }
  248. /* Set the transmit FIFO priority */
  249. if (hcan->Init.TXFP == ENABLE)
  250. {
  251. hcan->Instance->MCR |= CAN_MCR_TXFP;
  252. }
  253. else
  254. {
  255. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_TXFP;
  256. }
  257. /* Set the bit timing register */
  258. hcan->Instance->BTR = (uint32_t)((uint32_t)hcan->Init.Mode) | \
  259. ((uint32_t)hcan->Init.SJW) | \
  260. ((uint32_t)hcan->Init.BS1) | \
  261. ((uint32_t)hcan->Init.BS2) | \
  262. ((uint32_t)hcan->Init.Prescaler - 1U);
  263. /* Request leave initialisation */
  264. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_INRQ;
  265. /* Get tick */
  266. tickstart = HAL_GetTick();
  267. /* Wait the acknowledge */
  268. while((hcan->Instance->MSR & CAN_MSR_INAK) == CAN_MSR_INAK)
  269. {
  270. if((HAL_GetTick() - tickstart ) > CAN_TIMEOUT_VALUE)
  271. {
  272. hcan->State= HAL_CAN_STATE_TIMEOUT;
  273. /* Process unlocked */
  274. __HAL_UNLOCK(hcan);
  275. return HAL_TIMEOUT;
  276. }
  277. }
  278. /* Check acknowledged */
  279. if ((hcan->Instance->MSR & CAN_MSR_INAK) == CAN_MSR_INAK)
  280. {
  281. InitStatus = CAN_INITSTATUS_FAILED;
  282. }
  283. else
  284. {
  285. InitStatus = CAN_INITSTATUS_SUCCESS;
  286. }
  287. }
  288. if(InitStatus == CAN_INITSTATUS_SUCCESS)
  289. {
  290. /* Set CAN error code to none */
  291. hcan->ErrorCode = HAL_CAN_ERROR_NONE;
  292. /* Initialize the CAN state */
  293. hcan->State = HAL_CAN_STATE_READY;
  294. /* Return function status */
  295. return HAL_OK;
  296. }
  297. else
  298. {
  299. /* Initialize the CAN state */
  300. hcan->State = HAL_CAN_STATE_ERROR;
  301. /* Return function status */
  302. return HAL_ERROR;
  303. }
  304. }
  305. /**
  306. * @brief Configures the CAN reception filter according to the specified
  307. * parameters in the CAN_FilterInitStruct.
  308. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  309. * the configuration information for the specified CAN.
  310. * @param sFilterConfig: pointer to a CAN_FilterConfTypeDef structure that
  311. * contains the filter configuration information.
  312. * @retval None
  313. */
  314. HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig)
  315. {
  316. uint32_t filternbrbitpos = 0U;
  317. /* Check the parameters */
  318. assert_param(IS_CAN_FILTER_NUMBER(sFilterConfig->FilterNumber));
  319. assert_param(IS_CAN_FILTER_MODE(sFilterConfig->FilterMode));
  320. assert_param(IS_CAN_FILTER_SCALE(sFilterConfig->FilterScale));
  321. assert_param(IS_CAN_FILTER_FIFO(sFilterConfig->FilterFIFOAssignment));
  322. assert_param(IS_FUNCTIONAL_STATE(sFilterConfig->FilterActivation));
  323. assert_param(IS_CAN_BANKNUMBER(sFilterConfig->BankNumber));
  324. filternbrbitpos = ((uint32_t)1U) << sFilterConfig->FilterNumber;
  325. /* Initialisation mode for the filter */
  326. CAN1->FMR |= (uint32_t)CAN_FMR_FINIT;
  327. /* Select the start slave bank */
  328. CAN1->FMR &= ~((uint32_t)CAN_FMR_CAN2SB);
  329. CAN1->FMR |= (uint32_t)(sFilterConfig->BankNumber << 8U);
  330. /* Filter Deactivation */
  331. CAN1->FA1R &= ~(uint32_t)filternbrbitpos;
  332. /* Filter Scale */
  333. if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT)
  334. {
  335. /* 16-bit scale for the filter */
  336. CAN1->FS1R &= ~(uint32_t)filternbrbitpos;
  337. /* First 16-bit identifier and First 16-bit mask */
  338. /* Or First 16-bit identifier and Second 16-bit identifier */
  339. CAN1->sFilterRegister[sFilterConfig->FilterNumber].FR1 =
  340. ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) |
  341. (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow);
  342. /* Second 16-bit identifier and Second 16-bit mask */
  343. /* Or Third 16-bit identifier and Fourth 16-bit identifier */
  344. CAN1->sFilterRegister[sFilterConfig->FilterNumber].FR2 =
  345. ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) |
  346. (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh);
  347. }
  348. if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT)
  349. {
  350. /* 32-bit scale for the filter */
  351. CAN1->FS1R |= filternbrbitpos;
  352. /* 32-bit identifier or First 32-bit identifier */
  353. CAN1->sFilterRegister[sFilterConfig->FilterNumber].FR1 =
  354. ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) |
  355. (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow);
  356. /* 32-bit mask or Second 32-bit identifier */
  357. CAN1->sFilterRegister[sFilterConfig->FilterNumber].FR2 =
  358. ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) |
  359. (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow);
  360. }
  361. /* Filter Mode */
  362. if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK)
  363. {
  364. /*Id/Mask mode for the filter*/
  365. CAN1->FM1R &= ~(uint32_t)filternbrbitpos;
  366. }
  367. else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */
  368. {
  369. /*Identifier list mode for the filter*/
  370. CAN1->FM1R |= (uint32_t)filternbrbitpos;
  371. }
  372. /* Filter FIFO assignment */
  373. if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0)
  374. {
  375. /* FIFO 0 assignation for the filter */
  376. CAN1->FFA1R &= ~(uint32_t)filternbrbitpos;
  377. }
  378. if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO1)
  379. {
  380. /* FIFO 1 assignation for the filter */
  381. CAN1->FFA1R |= (uint32_t)filternbrbitpos;
  382. }
  383. /* Filter activation */
  384. if (sFilterConfig->FilterActivation == ENABLE)
  385. {
  386. CAN1->FA1R |= filternbrbitpos;
  387. }
  388. /* Leave the initialisation mode for the filter */
  389. CAN1->FMR &= ~((uint32_t)CAN_FMR_FINIT);
  390. /* Return function status */
  391. return HAL_OK;
  392. }
  393. /**
  394. * @brief Deinitializes the CANx peripheral registers to their default reset values.
  395. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  396. * the configuration information for the specified CAN.
  397. * @retval HAL status
  398. */
  399. HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan)
  400. {
  401. /* Check CAN handle */
  402. if(hcan == NULL)
  403. {
  404. return HAL_ERROR;
  405. }
  406. /* Check the parameters */
  407. assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance));
  408. /* Change CAN state */
  409. hcan->State = HAL_CAN_STATE_BUSY;
  410. /* DeInit the low level hardware */
  411. HAL_CAN_MspDeInit(hcan);
  412. /* Change CAN state */
  413. hcan->State = HAL_CAN_STATE_RESET;
  414. /* Release Lock */
  415. __HAL_UNLOCK(hcan);
  416. /* Return function status */
  417. return HAL_OK;
  418. }
  419. /**
  420. * @brief Initializes the CAN MSP.
  421. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  422. * the configuration information for the specified CAN.
  423. * @retval None
  424. */
  425. __weak void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan)
  426. {
  427. /* Prevent unused argument(s) compilation warning */
  428. UNUSED(hcan);
  429. /* NOTE : This function Should not be modified, when the callback is needed,
  430. the HAL_CAN_MspInit could be implemented in the user file
  431. */
  432. }
  433. /**
  434. * @brief DeInitializes the CAN MSP.
  435. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  436. * the configuration information for the specified CAN.
  437. * @retval None
  438. */
  439. __weak void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan)
  440. {
  441. /* Prevent unused argument(s) compilation warning */
  442. UNUSED(hcan);
  443. /* NOTE : This function Should not be modified, when the callback is needed,
  444. the HAL_CAN_MspDeInit could be implemented in the user file
  445. */
  446. }
  447. /**
  448. * @}
  449. */
  450. /** @defgroup CAN_Exported_Functions_Group2 IO operation functions
  451. * @brief IO operation functions
  452. *
  453. @verbatim
  454. ==============================================================================
  455. ##### IO operation functions #####
  456. ==============================================================================
  457. [..] This section provides functions allowing to:
  458. (+) Transmit a CAN frame message.
  459. (+) Receive a CAN frame message.
  460. (+) Enter CAN peripheral in sleep mode.
  461. (+) Wake up the CAN peripheral from sleep mode.
  462. @endverbatim
  463. * @{
  464. */
  465. /**
  466. * @brief Initiates and transmits a CAN frame message.
  467. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  468. * the configuration information for the specified CAN.
  469. * @param Timeout: Specify Timeout value
  470. * @retval HAL status
  471. */
  472. HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef* hcan, uint32_t Timeout)
  473. {
  474. uint32_t transmitmailbox = 5U;
  475. uint32_t tickstart = 0U;
  476. /* Check the parameters */
  477. assert_param(IS_CAN_IDTYPE(hcan->pTxMsg->IDE));
  478. assert_param(IS_CAN_RTR(hcan->pTxMsg->RTR));
  479. assert_param(IS_CAN_DLC(hcan->pTxMsg->DLC));
  480. if(((hcan->Instance->TSR&CAN_TSR_TME0) == CAN_TSR_TME0) || \
  481. ((hcan->Instance->TSR&CAN_TSR_TME1) == CAN_TSR_TME1) || \
  482. ((hcan->Instance->TSR&CAN_TSR_TME2) == CAN_TSR_TME2))
  483. {
  484. /* Process locked */
  485. __HAL_LOCK(hcan);
  486. if(hcan->State == HAL_CAN_STATE_BUSY_RX)
  487. {
  488. /* Change CAN state */
  489. hcan->State = HAL_CAN_STATE_BUSY_TX_RX;
  490. }
  491. else
  492. {
  493. /* Change CAN state */
  494. hcan->State = HAL_CAN_STATE_BUSY_TX;
  495. }
  496. /* Select one empty transmit mailbox */
  497. if ((hcan->Instance->TSR&CAN_TSR_TME0) == CAN_TSR_TME0)
  498. {
  499. transmitmailbox = 0U;
  500. }
  501. else if ((hcan->Instance->TSR&CAN_TSR_TME1) == CAN_TSR_TME1)
  502. {
  503. transmitmailbox = 1U;
  504. }
  505. else
  506. {
  507. transmitmailbox = 2U;
  508. }
  509. /* Set up the Id */
  510. hcan->Instance->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ;
  511. if (hcan->pTxMsg->IDE == CAN_ID_STD)
  512. {
  513. assert_param(IS_CAN_STDID(hcan->pTxMsg->StdId));
  514. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->StdId << 21U) | \
  515. hcan->pTxMsg->RTR);
  516. }
  517. else
  518. {
  519. assert_param(IS_CAN_EXTID(hcan->pTxMsg->ExtId));
  520. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->ExtId << 3U) | \
  521. hcan->pTxMsg->IDE | \
  522. hcan->pTxMsg->RTR);
  523. }
  524. /* Set up the DLC */
  525. hcan->pTxMsg->DLC &= (uint8_t)0x0000000FU;
  526. hcan->Instance->sTxMailBox[transmitmailbox].TDTR &= (uint32_t)0xFFFFFFF0U;
  527. hcan->Instance->sTxMailBox[transmitmailbox].TDTR |= hcan->pTxMsg->DLC;
  528. /* Set up the data field */
  529. hcan->Instance->sTxMailBox[transmitmailbox].TDLR = (((uint32_t)hcan->pTxMsg->Data[3U] << 24U) |
  530. ((uint32_t)hcan->pTxMsg->Data[2U] << 16U) |
  531. ((uint32_t)hcan->pTxMsg->Data[1U] << 8U) |
  532. ((uint32_t)hcan->pTxMsg->Data[0U]));
  533. hcan->Instance->sTxMailBox[transmitmailbox].TDHR = (((uint32_t)hcan->pTxMsg->Data[7U] << 24U) |
  534. ((uint32_t)hcan->pTxMsg->Data[6U] << 16U) |
  535. ((uint32_t)hcan->pTxMsg->Data[5U] << 8U) |
  536. ((uint32_t)hcan->pTxMsg->Data[4U]));
  537. /* Request transmission */
  538. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= CAN_TI0R_TXRQ;
  539. /* Get tick */
  540. tickstart = HAL_GetTick();
  541. /* Check End of transmission flag */
  542. while(!(__HAL_CAN_TRANSMIT_STATUS(hcan, transmitmailbox)))
  543. {
  544. /* Check for the Timeout */
  545. if(Timeout != HAL_MAX_DELAY)
  546. {
  547. if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
  548. {
  549. hcan->State = HAL_CAN_STATE_TIMEOUT;
  550. /* Process unlocked */
  551. __HAL_UNLOCK(hcan);
  552. return HAL_TIMEOUT;
  553. }
  554. }
  555. }
  556. if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX)
  557. {
  558. /* Change CAN state */
  559. hcan->State = HAL_CAN_STATE_BUSY_RX;
  560. }
  561. else
  562. {
  563. /* Change CAN state */
  564. hcan->State = HAL_CAN_STATE_READY;
  565. }
  566. /* Process unlocked */
  567. __HAL_UNLOCK(hcan);
  568. /* Return function status */
  569. return HAL_OK;
  570. }
  571. else
  572. {
  573. /* Change CAN state */
  574. hcan->State = HAL_CAN_STATE_ERROR;
  575. /* Return function status */
  576. return HAL_ERROR;
  577. }
  578. }
  579. /**
  580. * @brief Initiates and transmits a CAN frame message.
  581. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  582. * the configuration information for the specified CAN.
  583. * @retval HAL status
  584. */
  585. HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef* hcan)
  586. {
  587. uint32_t transmitmailbox = 5U;
  588. /* Check the parameters */
  589. assert_param(IS_CAN_IDTYPE(hcan->pTxMsg->IDE));
  590. assert_param(IS_CAN_RTR(hcan->pTxMsg->RTR));
  591. assert_param(IS_CAN_DLC(hcan->pTxMsg->DLC));
  592. if(((hcan->Instance->TSR&CAN_TSR_TME0) == CAN_TSR_TME0) || \
  593. ((hcan->Instance->TSR&CAN_TSR_TME1) == CAN_TSR_TME1) || \
  594. ((hcan->Instance->TSR&CAN_TSR_TME2) == CAN_TSR_TME2))
  595. {
  596. /* Process Locked */
  597. __HAL_LOCK(hcan);
  598. /* Select one empty transmit mailbox */
  599. if((hcan->Instance->TSR&CAN_TSR_TME0) == CAN_TSR_TME0)
  600. {
  601. transmitmailbox = 0U;
  602. }
  603. else if((hcan->Instance->TSR&CAN_TSR_TME1) == CAN_TSR_TME1)
  604. {
  605. transmitmailbox = 1U;
  606. }
  607. else
  608. {
  609. transmitmailbox = 2U;
  610. }
  611. /* Set up the Id */
  612. hcan->Instance->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ;
  613. if(hcan->pTxMsg->IDE == CAN_ID_STD)
  614. {
  615. assert_param(IS_CAN_STDID(hcan->pTxMsg->StdId));
  616. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->StdId << 21U) | \
  617. hcan->pTxMsg->RTR);
  618. }
  619. else
  620. {
  621. assert_param(IS_CAN_EXTID(hcan->pTxMsg->ExtId));
  622. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->ExtId << 3U) | \
  623. hcan->pTxMsg->IDE | \
  624. hcan->pTxMsg->RTR);
  625. }
  626. /* Set up the DLC */
  627. hcan->pTxMsg->DLC &= (uint8_t)0x0000000FU;
  628. hcan->Instance->sTxMailBox[transmitmailbox].TDTR &= (uint32_t)0xFFFFFFF0U;
  629. hcan->Instance->sTxMailBox[transmitmailbox].TDTR |= hcan->pTxMsg->DLC;
  630. /* Set up the data field */
  631. hcan->Instance->sTxMailBox[transmitmailbox].TDLR = (((uint32_t)hcan->pTxMsg->Data[3U] << 24U) |
  632. ((uint32_t)hcan->pTxMsg->Data[2U] << 16U) |
  633. ((uint32_t)hcan->pTxMsg->Data[1U] << 8U) |
  634. ((uint32_t)hcan->pTxMsg->Data[0U]));
  635. hcan->Instance->sTxMailBox[transmitmailbox].TDHR = (((uint32_t)hcan->pTxMsg->Data[7U] << 24U) |
  636. ((uint32_t)hcan->pTxMsg->Data[6U] << 16U) |
  637. ((uint32_t)hcan->pTxMsg->Data[5U] << 8U) |
  638. ((uint32_t)hcan->pTxMsg->Data[4U]));
  639. if(hcan->State == HAL_CAN_STATE_BUSY_RX)
  640. {
  641. /* Change CAN state */
  642. hcan->State = HAL_CAN_STATE_BUSY_TX_RX;
  643. }
  644. else
  645. {
  646. /* Change CAN state */
  647. hcan->State = HAL_CAN_STATE_BUSY_TX;
  648. }
  649. /* Set CAN error code to none */
  650. hcan->ErrorCode = HAL_CAN_ERROR_NONE;
  651. /* Process Unlocked */
  652. __HAL_UNLOCK(hcan);
  653. /* Enable Error warning Interrupt */
  654. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EWG);
  655. /* Enable Error passive Interrupt */
  656. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EPV);
  657. /* Enable Bus-off Interrupt */
  658. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_BOF);
  659. /* Enable Last error code Interrupt */
  660. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_LEC);
  661. /* Enable Error Interrupt */
  662. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_ERR);
  663. /* Enable Transmit mailbox empty Interrupt */
  664. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_TME);
  665. /* Request transmission */
  666. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= CAN_TI0R_TXRQ;
  667. }
  668. else
  669. {
  670. /* Change CAN state */
  671. hcan->State = HAL_CAN_STATE_ERROR;
  672. /* Return function status */
  673. return HAL_ERROR;
  674. }
  675. return HAL_OK;
  676. }
  677. /**
  678. * @brief Receives a correct CAN frame.
  679. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  680. * the configuration information for the specified CAN.
  681. * @param FIFONumber: FIFO Number value
  682. * @param Timeout: Specify Timeout value
  683. * @retval HAL status
  684. */
  685. HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef* hcan, uint8_t FIFONumber, uint32_t Timeout)
  686. {
  687. uint32_t tickstart = 0U;
  688. /* Check the parameters */
  689. assert_param(IS_CAN_FIFO(FIFONumber));
  690. /* Process locked */
  691. __HAL_LOCK(hcan);
  692. if(hcan->State == HAL_CAN_STATE_BUSY_TX)
  693. {
  694. /* Change CAN state */
  695. hcan->State = HAL_CAN_STATE_BUSY_TX_RX;
  696. }
  697. else
  698. {
  699. /* Change CAN state */
  700. hcan->State = HAL_CAN_STATE_BUSY_RX;
  701. }
  702. /* Get tick */
  703. tickstart = HAL_GetTick();
  704. /* Check pending message */
  705. while(__HAL_CAN_MSG_PENDING(hcan, FIFONumber) == 0U)
  706. {
  707. /* Check for the Timeout */
  708. if(Timeout != HAL_MAX_DELAY)
  709. {
  710. if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
  711. {
  712. hcan->State = HAL_CAN_STATE_TIMEOUT;
  713. /* Process unlocked */
  714. __HAL_UNLOCK(hcan);
  715. return HAL_TIMEOUT;
  716. }
  717. }
  718. }
  719. /* Get the Id */
  720. hcan->pRxMsg->IDE = (uint8_t)0x04U & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;
  721. if (hcan->pRxMsg->IDE == CAN_ID_STD)
  722. {
  723. hcan->pRxMsg->StdId = (uint32_t)0x000007FFU & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 21U);
  724. }
  725. else
  726. {
  727. hcan->pRxMsg->ExtId = (uint32_t)0x1FFFFFFFU & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 3U);
  728. }
  729. hcan->pRxMsg->RTR = (uint8_t)0x02U & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;
  730. /* Get the DLC */
  731. hcan->pRxMsg->DLC = (uint8_t)0x0FU & hcan->Instance->sFIFOMailBox[FIFONumber].RDTR;
  732. /* Get the FMI */
  733. hcan->pRxMsg->FMI = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[FIFONumber].RDTR >> 8U);
  734. /* Get the data field */
  735. hcan->pRxMsg->Data[0U] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[FIFONumber].RDLR;
  736. hcan->pRxMsg->Data[1U] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 8U);
  737. hcan->pRxMsg->Data[2U] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 16U);
  738. hcan->pRxMsg->Data[3U] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 24U);
  739. hcan->pRxMsg->Data[4U] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[FIFONumber].RDHR;
  740. hcan->pRxMsg->Data[5U] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 8U);
  741. hcan->pRxMsg->Data[6U] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 16U);
  742. hcan->pRxMsg->Data[7U] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 24U);
  743. /* Release the FIFO */
  744. if(FIFONumber == CAN_FIFO0)
  745. {
  746. /* Release FIFO0 */
  747. __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO0);
  748. }
  749. else /* FIFONumber == CAN_FIFO1 */
  750. {
  751. /* Release FIFO1 */
  752. __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO1);
  753. }
  754. if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX)
  755. {
  756. /* Change CAN state */
  757. hcan->State = HAL_CAN_STATE_BUSY_TX;
  758. /* Process unlocked */
  759. __HAL_UNLOCK(hcan);
  760. }
  761. else
  762. {
  763. /* Change CAN state */
  764. hcan->State = HAL_CAN_STATE_READY;
  765. /* Process unlocked */
  766. __HAL_UNLOCK(hcan);
  767. }
  768. /* Return function status */
  769. return HAL_OK;
  770. }
  771. /**
  772. * @brief Receives a correct CAN frame.
  773. * @param hcan: Pointer to a CAN_HandleTypeDef structure that contains
  774. * the configuration information for the specified CAN.
  775. * @param FIFONumber: Specify the FIFO number
  776. * @retval HAL status
  777. */
  778. HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber)
  779. {
  780. uint32_t tmp = 0U;
  781. /* Check the parameters */
  782. assert_param(IS_CAN_FIFO(FIFONumber));
  783. tmp = hcan->State;
  784. if((tmp == HAL_CAN_STATE_READY) || (tmp == HAL_CAN_STATE_BUSY_TX))
  785. {
  786. /* Process locked */
  787. __HAL_LOCK(hcan);
  788. if(hcan->State == HAL_CAN_STATE_BUSY_TX)
  789. {
  790. /* Change CAN state */
  791. hcan->State = HAL_CAN_STATE_BUSY_TX_RX;
  792. }
  793. else
  794. {
  795. /* Change CAN state */
  796. hcan->State = HAL_CAN_STATE_BUSY_RX;
  797. }
  798. /* Set CAN error code to none */
  799. hcan->ErrorCode = HAL_CAN_ERROR_NONE;
  800. /* Enable Error warning Interrupt */
  801. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EWG);
  802. /* Enable Error passive Interrupt */
  803. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EPV);
  804. /* Enable Bus-off Interrupt */
  805. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_BOF);
  806. /* Enable Last error code Interrupt */
  807. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_LEC);
  808. /* Enable Error Interrupt */
  809. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_ERR);
  810. /* Process unlocked */
  811. __HAL_UNLOCK(hcan);
  812. if(FIFONumber == CAN_FIFO0)
  813. {
  814. /* Enable FIFO 0 message pending Interrupt */
  815. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_FMP0);
  816. }
  817. else
  818. {
  819. /* Enable FIFO 1 message pending Interrupt */
  820. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_FMP1);
  821. }
  822. }
  823. else
  824. {
  825. return HAL_BUSY;
  826. }
  827. /* Return function status */
  828. return HAL_OK;
  829. }
  830. /**
  831. * @brief Enters the Sleep (low power) mode.
  832. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  833. * the configuration information for the specified CAN.
  834. * @retval HAL status.
  835. */
  836. HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef* hcan)
  837. {
  838. uint32_t tickstart = 0U;
  839. /* Process locked */
  840. __HAL_LOCK(hcan);
  841. /* Change CAN state */
  842. hcan->State = HAL_CAN_STATE_BUSY;
  843. /* Request Sleep mode */
  844. hcan->Instance->MCR = (((hcan->Instance->MCR) & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP);
  845. /* Sleep mode status */
  846. if ((hcan->Instance->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) != CAN_MSR_SLAK)
  847. {
  848. /* Process unlocked */
  849. __HAL_UNLOCK(hcan);
  850. /* Return function status */
  851. return HAL_ERROR;
  852. }
  853. /* Get tick */
  854. tickstart = HAL_GetTick();
  855. /* Wait the acknowledge */
  856. while((hcan->Instance->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) != CAN_MSR_SLAK)
  857. {
  858. if((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
  859. {
  860. hcan->State = HAL_CAN_STATE_TIMEOUT;
  861. /* Process unlocked */
  862. __HAL_UNLOCK(hcan);
  863. return HAL_TIMEOUT;
  864. }
  865. }
  866. /* Change CAN state */
  867. hcan->State = HAL_CAN_STATE_READY;
  868. /* Process unlocked */
  869. __HAL_UNLOCK(hcan);
  870. /* Return function status */
  871. return HAL_OK;
  872. }
  873. /**
  874. * @brief Wakes up the CAN peripheral from sleep mode, after that the CAN peripheral
  875. * is in the normal mode.
  876. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  877. * the configuration information for the specified CAN.
  878. * @retval HAL status.
  879. */
  880. HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef* hcan)
  881. {
  882. uint32_t tickstart = 0U;
  883. /* Process locked */
  884. __HAL_LOCK(hcan);
  885. /* Change CAN state */
  886. hcan->State = HAL_CAN_STATE_BUSY;
  887. /* Wake up request */
  888. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_SLEEP;
  889. /* Get tick */
  890. tickstart = HAL_GetTick();
  891. /* Sleep mode status */
  892. while((hcan->Instance->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK)
  893. {
  894. if((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
  895. {
  896. hcan->State= HAL_CAN_STATE_TIMEOUT;
  897. /* Process unlocked */
  898. __HAL_UNLOCK(hcan);
  899. return HAL_TIMEOUT;
  900. }
  901. }
  902. if((hcan->Instance->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK)
  903. {
  904. /* Process unlocked */
  905. __HAL_UNLOCK(hcan);
  906. /* Return function status */
  907. return HAL_ERROR;
  908. }
  909. /* Change CAN state */
  910. hcan->State = HAL_CAN_STATE_READY;
  911. /* Process unlocked */
  912. __HAL_UNLOCK(hcan);
  913. /* Return function status */
  914. return HAL_OK;
  915. }
  916. /**
  917. * @brief Handles CAN interrupt request
  918. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  919. * the configuration information for the specified CAN.
  920. * @retval None
  921. */
  922. void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan)
  923. {
  924. uint32_t tmp1 = 0U, tmp2 = 0U, tmp3 = 0U;
  925. /* Check End of transmission flag */
  926. if(__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_TME))
  927. {
  928. tmp1 = __HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_0);
  929. tmp2 = __HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_1);
  930. tmp3 = __HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_2);
  931. if(tmp1 || tmp2 || tmp3)
  932. {
  933. /* Call transmit function */
  934. CAN_Transmit_IT(hcan);
  935. }
  936. }
  937. tmp1 = __HAL_CAN_MSG_PENDING(hcan, CAN_FIFO0);
  938. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP0);
  939. /* Check End of reception flag for FIFO0 */
  940. if((tmp1 != 0U) && tmp2)
  941. {
  942. /* Call receive function */
  943. CAN_Receive_IT(hcan, CAN_FIFO0);
  944. }
  945. tmp1 = __HAL_CAN_MSG_PENDING(hcan, CAN_FIFO1);
  946. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP1);
  947. /* Check End of reception flag for FIFO1 */
  948. if((tmp1 != 0U) && tmp2)
  949. {
  950. /* Call receive function */
  951. CAN_Receive_IT(hcan, CAN_FIFO1);
  952. }
  953. tmp1 = __HAL_CAN_GET_FLAG(hcan, CAN_FLAG_EWG);
  954. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_EWG);
  955. tmp3 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR);
  956. /* Check Error Warning Flag */
  957. if(tmp1 && tmp2 && tmp3)
  958. {
  959. /* Set CAN error code to EWG error */
  960. hcan->ErrorCode |= HAL_CAN_ERROR_EWG;
  961. }
  962. tmp1 = __HAL_CAN_GET_FLAG(hcan, CAN_FLAG_EPV);
  963. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_EPV);
  964. tmp3 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR);
  965. /* Check Error Passive Flag */
  966. if(tmp1 && tmp2 && tmp3)
  967. {
  968. /* Set CAN error code to EPV error */
  969. hcan->ErrorCode |= HAL_CAN_ERROR_EPV;
  970. }
  971. tmp1 = __HAL_CAN_GET_FLAG(hcan, CAN_FLAG_BOF);
  972. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_BOF);
  973. tmp3 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR);
  974. /* Check Bus-Off Flag */
  975. if(tmp1 && tmp2 && tmp3)
  976. {
  977. /* Set CAN error code to BOF error */
  978. hcan->ErrorCode |= HAL_CAN_ERROR_BOF;
  979. }
  980. tmp1 = HAL_IS_BIT_CLR(hcan->Instance->ESR, CAN_ESR_LEC);
  981. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_LEC);
  982. tmp3 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR);
  983. /* Check Last error code Flag */
  984. if((!tmp1) && tmp2 && tmp3)
  985. {
  986. tmp1 = (hcan->Instance->ESR) & CAN_ESR_LEC;
  987. switch(tmp1)
  988. {
  989. case(CAN_ESR_LEC_0):
  990. /* Set CAN error code to STF error */
  991. hcan->ErrorCode |= HAL_CAN_ERROR_STF;
  992. break;
  993. case(CAN_ESR_LEC_1):
  994. /* Set CAN error code to FOR error */
  995. hcan->ErrorCode |= HAL_CAN_ERROR_FOR;
  996. break;
  997. case(CAN_ESR_LEC_1 | CAN_ESR_LEC_0):
  998. /* Set CAN error code to ACK error */
  999. hcan->ErrorCode |= HAL_CAN_ERROR_ACK;
  1000. break;
  1001. case(CAN_ESR_LEC_2):
  1002. /* Set CAN error code to BR error */
  1003. hcan->ErrorCode |= HAL_CAN_ERROR_BR;
  1004. break;
  1005. case(CAN_ESR_LEC_2 | CAN_ESR_LEC_0):
  1006. /* Set CAN error code to BD error */
  1007. hcan->ErrorCode |= HAL_CAN_ERROR_BD;
  1008. break;
  1009. case(CAN_ESR_LEC_2 | CAN_ESR_LEC_1):
  1010. /* Set CAN error code to CRC error */
  1011. hcan->ErrorCode |= HAL_CAN_ERROR_CRC;
  1012. break;
  1013. default:
  1014. break;
  1015. }
  1016. /* Clear Last error code Flag */
  1017. hcan->Instance->ESR &= ~(CAN_ESR_LEC);
  1018. }
  1019. /* Call the Error call Back in case of Errors */
  1020. if(hcan->ErrorCode != HAL_CAN_ERROR_NONE)
  1021. {
  1022. /* Clear ERRI Flag */
  1023. hcan->Instance->MSR = CAN_MSR_ERRI;
  1024. /* Set the CAN state ready to be able to start again the process */
  1025. hcan->State = HAL_CAN_STATE_READY;
  1026. /* Call Error callback function */
  1027. HAL_CAN_ErrorCallback(hcan);
  1028. }
  1029. }
  1030. /**
  1031. * @brief Transmission complete callback in non blocking mode
  1032. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1033. * the configuration information for the specified CAN.
  1034. * @retval None
  1035. */
  1036. __weak void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan)
  1037. {
  1038. /* Prevent unused argument(s) compilation warning */
  1039. UNUSED(hcan);
  1040. /* NOTE : This function Should not be modified, when the callback is needed,
  1041. the HAL_CAN_TxCpltCallback could be implemented in the user file
  1042. */
  1043. }
  1044. /**
  1045. * @brief Transmission complete callback in non blocking mode
  1046. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1047. * the configuration information for the specified CAN.
  1048. * @retval None
  1049. */
  1050. __weak void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan)
  1051. {
  1052. /* Prevent unused argument(s) compilation warning */
  1053. UNUSED(hcan);
  1054. /* NOTE : This function Should not be modified, when the callback is needed,
  1055. the HAL_CAN_RxCpltCallback could be implemented in the user file
  1056. */
  1057. }
  1058. /**
  1059. * @brief Error CAN callback.
  1060. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1061. * the configuration information for the specified CAN.
  1062. * @retval None
  1063. */
  1064. __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan)
  1065. {
  1066. /* Prevent unused argument(s) compilation warning */
  1067. UNUSED(hcan);
  1068. /* NOTE : This function Should not be modified, when the callback is needed,
  1069. the HAL_CAN_ErrorCallback could be implemented in the user file
  1070. */
  1071. }
  1072. /**
  1073. * @}
  1074. */
  1075. /** @defgroup CAN_Exported_Functions_Group3 Peripheral State and Error functions
  1076. * @brief CAN Peripheral State functions
  1077. *
  1078. @verbatim
  1079. ==============================================================================
  1080. ##### Peripheral State and Error functions #####
  1081. ==============================================================================
  1082. [..]
  1083. This subsection provides functions allowing to :
  1084. (+) Check the CAN state.
  1085. (+) Check CAN Errors detected during interrupt process
  1086. @endverbatim
  1087. * @{
  1088. */
  1089. /**
  1090. * @brief return the CAN state
  1091. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1092. * the configuration information for the specified CAN.
  1093. * @retval HAL state
  1094. */
  1095. HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan)
  1096. {
  1097. /* Return CAN state */
  1098. return hcan->State;
  1099. }
  1100. /**
  1101. * @brief Return the CAN error code
  1102. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1103. * the configuration information for the specified CAN.
  1104. * @retval CAN Error Code
  1105. */
  1106. uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan)
  1107. {
  1108. return hcan->ErrorCode;
  1109. }
  1110. /**
  1111. * @}
  1112. */
  1113. /**
  1114. * @brief Initiates and transmits a CAN frame message.
  1115. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1116. * the configuration information for the specified CAN.
  1117. * @retval HAL status
  1118. */
  1119. static HAL_StatusTypeDef CAN_Transmit_IT(CAN_HandleTypeDef* hcan)
  1120. {
  1121. /* Disable Transmit mailbox empty Interrupt */
  1122. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_TME);
  1123. if(hcan->State == HAL_CAN_STATE_BUSY_TX)
  1124. {
  1125. /* Disable Error warning Interrupt */
  1126. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EWG);
  1127. /* Disable Error passive Interrupt */
  1128. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EPV);
  1129. /* Disable Bus-off Interrupt */
  1130. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_BOF);
  1131. /* Disable Last error code Interrupt */
  1132. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_LEC);
  1133. /* Disable Error Interrupt */
  1134. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_ERR);
  1135. }
  1136. if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX)
  1137. {
  1138. /* Change CAN state */
  1139. hcan->State = HAL_CAN_STATE_BUSY_RX;
  1140. }
  1141. else
  1142. {
  1143. /* Change CAN state */
  1144. hcan->State = HAL_CAN_STATE_READY;
  1145. }
  1146. /* Transmission complete callback */
  1147. HAL_CAN_TxCpltCallback(hcan);
  1148. return HAL_OK;
  1149. }
  1150. /**
  1151. * @brief Receives a correct CAN frame.
  1152. * @param hcan: Pointer to a CAN_HandleTypeDef structure that contains
  1153. * the configuration information for the specified CAN.
  1154. * @param FIFONumber: Specify the FIFO number
  1155. * @retval HAL status
  1156. * @retval None
  1157. */
  1158. static HAL_StatusTypeDef CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber)
  1159. {
  1160. /* Get the Id */
  1161. hcan->pRxMsg->IDE = (uint8_t)0x04U & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;
  1162. if (hcan->pRxMsg->IDE == CAN_ID_STD)
  1163. {
  1164. hcan->pRxMsg->StdId = (uint32_t)0x000007FFU & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 21U);
  1165. }
  1166. else
  1167. {
  1168. hcan->pRxMsg->ExtId = (uint32_t)0x1FFFFFFFU & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 3U);
  1169. }
  1170. hcan->pRxMsg->RTR = (uint8_t)0x02U & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;
  1171. /* Get the DLC */
  1172. hcan->pRxMsg->DLC = (uint8_t)0x0FU & hcan->Instance->sFIFOMailBox[FIFONumber].RDTR;
  1173. /* Get the FMI */
  1174. hcan->pRxMsg->FMI = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[FIFONumber].RDTR >> 8U);
  1175. /* Get the data field */
  1176. hcan->pRxMsg->Data[0U] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[FIFONumber].RDLR;
  1177. hcan->pRxMsg->Data[1U] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 8U);
  1178. hcan->pRxMsg->Data[2U] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 16U);
  1179. hcan->pRxMsg->Data[3U] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 24U);
  1180. hcan->pRxMsg->Data[4U] = (uint8_t)0xFFU & hcan->Instance->sFIFOMailBox[FIFONumber].RDHR;
  1181. hcan->pRxMsg->Data[5U] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 8U);
  1182. hcan->pRxMsg->Data[6U] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 16U);
  1183. hcan->pRxMsg->Data[7U] = (uint8_t)0xFFU & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 24U);
  1184. /* Release the FIFO */
  1185. /* Release FIFO0 */
  1186. if (FIFONumber == CAN_FIFO0)
  1187. {
  1188. __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO0);
  1189. /* Disable FIFO 0 message pending Interrupt */
  1190. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_FMP0);
  1191. }
  1192. /* Release FIFO1 */
  1193. else /* FIFONumber == CAN_FIFO1 */
  1194. {
  1195. __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO1);
  1196. /* Disable FIFO 1 message pending Interrupt */
  1197. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_FMP1);
  1198. }
  1199. if(hcan->State == HAL_CAN_STATE_BUSY_RX)
  1200. {
  1201. /* Disable Error warning Interrupt */
  1202. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EWG);
  1203. /* Disable Error passive Interrupt */
  1204. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EPV);
  1205. /* Disable Bus-off Interrupt */
  1206. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_BOF);
  1207. /* Disable Last error code Interrupt */
  1208. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_LEC);
  1209. /* Disable Error Interrupt */
  1210. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_ERR);
  1211. }
  1212. if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX)
  1213. {
  1214. /* Disable CAN state */
  1215. hcan->State = HAL_CAN_STATE_BUSY_TX;
  1216. }
  1217. else
  1218. {
  1219. /* Change CAN state */
  1220. hcan->State = HAL_CAN_STATE_READY;
  1221. }
  1222. /* Receive complete callback */
  1223. HAL_CAN_RxCpltCallback(hcan);
  1224. /* Return function status */
  1225. return HAL_OK;
  1226. }
  1227. /**
  1228. * @}
  1229. */
  1230. #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
  1231. STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
  1232. STM32F412Vx || STM32F412Rx || STM32F412Cx */
  1233. #endif /* HAL_CAN_MODULE_ENABLED */
  1234. /**
  1235. * @}
  1236. */
  1237. /**
  1238. * @}
  1239. */
  1240. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/