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  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_hal_dac.c
  4. * @author MCD Application Team
  5. * @version V1.3.0
  6. * @date 29-January-2016
  7. * @brief DAC HAL module driver.
  8. * This file provides firmware functions to manage the following
  9. * functionalities of the Digital to Analog Converter (DAC) peripheral:
  10. * + Initialization and de-initialization functions
  11. * + IO operation functions
  12. * + Peripheral Control functions
  13. * + Peripheral State and Errors functions
  14. *
  15. *
  16. @verbatim
  17. ==============================================================================
  18. ##### DAC Peripheral features #####
  19. ==============================================================================
  20. [..]
  21. *** DAC Channels ***
  22. ====================
  23. [..]
  24. STM32L4 devices integrate two 12-bit Digital Analog Converters
  25. The 2 converters (i.e. channel1 & channel2)
  26. can be used independently or simultaneously (dual mode):
  27. (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip
  28. peripherals (ex. OPAMPs, comparators).
  29. (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip
  30. peripherals (ex. OPAMPs, comparators).
  31. *** DAC Triggers ***
  32. ====================
  33. [..]
  34. Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE
  35. and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register.
  36. [..]
  37. Digital to Analog conversion can be triggered by:
  38. (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9.
  39. The used pin (GPIOx_PIN_9) must be configured in input mode.
  40. (#) Timers TRGO: TIM2, TIM3, TIM4, TIM5, TIM6 and TIM7
  41. (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T3_TRGO...)
  42. (#) Software using DAC_TRIGGER_SOFTWARE
  43. *** DAC Buffer mode feature ***
  44. ===============================
  45. [..]
  46. Each DAC channel integrates an output buffer that can be used to
  47. reduce the output impedance, and to drive external loads directly
  48. without having to add an external operational amplifier.
  49. To enable, the output buffer use
  50. sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
  51. [..]
  52. (@) Refer to the device datasheet for more details about output
  53. impedance value with and without output buffer.
  54. *** DAC connect feature ***
  55. ===============================
  56. [..]
  57. Each DAC channel can be connected internally.
  58. To connect, use
  59. sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_ENABLE;
  60. *** GPIO configurations guidelines ***
  61. =====================
  62. [..]
  63. When a DAC channel is used (ex channel1 on PA4) and the other is not
  64. (ex channel2 on PA5 is configured in Analog and disabled).
  65. Channel1 may disturb channel2 as coupling effect.
  66. Note that there is no coupling on channel2 as soon as channel2 is turned on.
  67. Coupling on adjacent channel could be avoided as follows:
  68. when unused PA5 is configured as INPUT PULL-UP or DOWN.
  69. PA5 is configured in ANALOG just before it is turned on.
  70. *** DAC Sample and Hold feature ***
  71. ========================
  72. [..]
  73. For each converter, 2 modes are supported: normal mode and
  74. "sample and hold" mode (i.e. low power mode).
  75. In the sample and hold mode, the DAC core converts data, then holds the
  76. converted voltage on a capacitor. When not converting, the DAC cores and
  77. buffer are completely turned off between samples and the DAC output is
  78. tri-stated, therefore reducing the overall power consumption. A new
  79. stabilization period is needed before each new conversion.
  80. The sample and hold allow setting internal or external voltage @
  81. low power consumption cost (output value can be at any given rate either
  82. by CPU or DMA).
  83. The Sample and hold block and registers uses either LSI & run in
  84. several power modes: run mode, sleep mode, low power run, low power sleep
  85. mode & stop1 mode.
  86. Low power stop1 mode allows only static conversion.
  87. To enable Sample and Hold mode
  88. Enable LSI using HAL_RCC_OscConfig with RCC_OSCILLATORTYPE_LSI &
  89. RCC_LSI_ON parameters.
  90. Use DAC_InitStructure.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_ENABLE;
  91. & DAC_ChannelConfTypeDef.DAC_SampleAndHoldConfig.DAC_SampleTime,
  92. DAC_HoldTime & DAC_RefreshTime;
  93. *** DAC calibration feature ***
  94. ===================================
  95. [..]
  96. (#) The 2 converters (channel1 & channel2) provide calibration capabilities.
  97. (++) Calibration aims at correcting some offset of output buffer.
  98. (++) The DAC uses either factory calibration settings OR user defined
  99. calibration (trimming) settings (i.e. trimming mode).
  100. (++) The user defined settings can be figured out using self calibration
  101. handled by HAL_DACEx_SelfCalibrate.
  102. (++) HAL_DACEx_SelfCalibrate:
  103. (+++) Runs automatically the calibration.
  104. (+++) Enables the user trimming mode
  105. (+++) Updates a structure with trimming values with fresh calibration
  106. results.
  107. The user may store the calibration results for larger
  108. (ex monitoring the trimming as a function of temperature
  109. for instance)
  110. *** DAC wave generation feature ***
  111. ===================================
  112. [..]
  113. Both DAC channels can be used to generate
  114. (#) Noise wave
  115. (#) Triangle wave
  116. *** DAC data format ***
  117. =======================
  118. [..]
  119. The DAC data format can be:
  120. (#) 8-bit right alignment using DAC_ALIGN_8B_R
  121. (#) 12-bit left alignment using DAC_ALIGN_12B_L
  122. (#) 12-bit right alignment using DAC_ALIGN_12B_R
  123. *** DAC data value to voltage correspondence ***
  124. ================================================
  125. [..]
  126. The analog output voltage on each DAC channel pin is determined
  127. by the following equation:
  128. [..]
  129. DAC_OUTx = VREF+ * DOR / 4095
  130. (+) with DOR is the Data Output Register
  131. [..]
  132. VEF+ is the input voltage reference (refer to the device datasheet)
  133. [..]
  134. e.g. To set DAC_OUT1 to 0.7V, use
  135. (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
  136. *** DMA requests ***
  137. =====================
  138. [..]
  139. A DMA1 request can be generated when an external trigger (but not a software trigger)
  140. occurs if DMA1 requests are enabled using HAL_DAC_Start_DMA().
  141. DMA requests are mapped as following:
  142. (#) DAC channel1: mapped either on
  143. (++) DMA1 request 6 channel3
  144. (++) or DMA2 request channel4 which must be already configured
  145. (#) DAC channel2: mapped either on
  146. (++) DMA1 request 5 channel4
  147. (++) or DMA2 request 3 channel5 which must be already configured
  148. [..]
  149. (@) For Dual mode and specific signal (Triangle and noise) generation please
  150. refer to Extended Features Driver description
  151. ##### How to use this driver #####
  152. ==============================================================================
  153. [..]
  154. (+) DAC APB clock must be enabled to get write access to DAC
  155. registers using HAL_DAC_Init()
  156. (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
  157. (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
  158. (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions.
  159. *** Calibration mode IO operation ***
  160. ======================================
  161. [..]
  162. (+) Retrieve the factory trimming (calibration settings) using HAL_DACEx_GetTrimOffset()
  163. (+) Run the calibration using HAL_DACEx_SelfCalibrate()
  164. (+) Update the trimming while DAC running using HAL_DACEx_SetUserTrimming()
  165. *** Polling mode IO operation ***
  166. =================================
  167. [..]
  168. (+) Start the DAC peripheral using HAL_DAC_Start()
  169. (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function.
  170. (+) Stop the DAC peripheral using HAL_DAC_Stop()
  171. *** DMA mode IO operation ***
  172. ==============================
  173. [..]
  174. (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length
  175. of data to be transferred at each end of conversion
  176. (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
  177. function is executed and user can add his own code by customization of function pointer
  178. HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
  179. (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
  180. function is executed and user can add his own code by customization of function pointer
  181. HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
  182. (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can
  183. add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1
  184. (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler.
  185. HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2()
  186. function is executed and user can add his own code by customization of function pointer
  187. HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and
  188. add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1()
  189. (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
  190. *** DAC HAL driver macros list ***
  191. =============================================
  192. [..]
  193. Below the list of most used macros in DAC HAL driver.
  194. (+) __HAL_DAC_ENABLE : Enable the DAC peripheral
  195. (+) __HAL_DAC_DISABLE : Disable the DAC peripheral
  196. (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags
  197. (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status
  198. [..]
  199. (@) You can refer to the DAC HAL driver header file for more useful macros
  200. @endverbatim
  201. ******************************************************************************
  202. * @attention
  203. *
  204. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  205. *
  206. * Redistribution and use in source and binary forms, with or without modification,
  207. * are permitted provided that the following conditions are met:
  208. * 1. Redistributions of source code must retain the above copyright notice,
  209. * this list of conditions and the following disclaimer.
  210. * 2. Redistributions in binary form must reproduce the above copyright notice,
  211. * this list of conditions and the following disclaimer in the documentation
  212. * and/or other materials provided with the distribution.
  213. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  214. * may be used to endorse or promote products derived from this software
  215. * without specific prior written permission.
  216. *
  217. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  218. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  219. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  220. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  221. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  222. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  223. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  224. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  225. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  226. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  227. *
  228. ******************************************************************************
  229. */
  230. /* Includes ------------------------------------------------------------------*/
  231. #include "stm32l4xx_hal.h"
  232. /** @addtogroup STM32L4xx_HAL_Driver
  233. * @{
  234. */
  235. /** @defgroup DAC DAC
  236. * @brief DAC driver modules
  237. * @{
  238. */
  239. #ifdef HAL_DAC_MODULE_ENABLED
  240. /* Private typedef -----------------------------------------------------------*/
  241. /* Private define ------------------------------------------------------------*/
  242. /* Private constants ---------------------------------------------------------*/
  243. /** @addtogroup DAC_Private_Constants DAC Private Constants
  244. * @{
  245. */
  246. #define TIMEOUT_DAC_CALIBCONFIG ((uint32_t)1) /* 1ms */
  247. /**
  248. * @}
  249. */
  250. /* Private macro -------------------------------------------------------------*/
  251. /* Private macro -------------------------------------------------------------*/
  252. /* Private variables ---------------------------------------------------------*/
  253. /* Private function prototypes -----------------------------------------------*/
  254. /** @defgroup DAC_Private_Functions DAC Private Functions
  255. * @{
  256. */
  257. static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
  258. static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
  259. static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
  260. /**
  261. * @}
  262. */
  263. /* Exported functions -------------------------------------------------------*/
  264. /** @defgroup DAC_Exported_Functions DAC Exported Functions
  265. * @{
  266. */
  267. /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
  268. * @brief Initialization and Configuration functions
  269. *
  270. @verbatim
  271. ==============================================================================
  272. ##### Initialization and de-initialization functions #####
  273. ==============================================================================
  274. [..] This section provides functions allowing to:
  275. (+) Initialize and configure the DAC.
  276. (+) De-initialize the DAC.
  277. @endverbatim
  278. * @{
  279. */
  280. /**
  281. * @brief Initialize the DAC peripheral according to the specified parameters
  282. * in the DAC_InitStruct and initialize the associated handle.
  283. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  284. * the configuration information for the specified DAC.
  285. * @retval HAL status
  286. */
  287. HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
  288. {
  289. /* Check DAC handle */
  290. if(hdac == NULL)
  291. {
  292. return HAL_ERROR;
  293. }
  294. /* Check the parameters */
  295. assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
  296. if(hdac->State == HAL_DAC_STATE_RESET)
  297. {
  298. /* Allocate lock resource and initialize it */
  299. hdac->Lock = HAL_UNLOCKED;
  300. /* Init the low level hardware */
  301. HAL_DAC_MspInit(hdac);
  302. }
  303. /* Initialize the DAC state*/
  304. hdac->State = HAL_DAC_STATE_BUSY;
  305. /* Set DAC error code to none */
  306. hdac->ErrorCode = HAL_DAC_ERROR_NONE;
  307. /* Initialize the DAC state*/
  308. hdac->State = HAL_DAC_STATE_READY;
  309. /* Return function status */
  310. return HAL_OK;
  311. }
  312. /**
  313. * @brief Deinitialize the DAC peripheral registers to their default reset values.
  314. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  315. * the configuration information for the specified DAC.
  316. * @retval HAL status
  317. */
  318. HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac)
  319. {
  320. /* Check DAC handle */
  321. if(hdac == NULL)
  322. {
  323. return HAL_ERROR;
  324. }
  325. /* Check the parameters */
  326. assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
  327. /* Change DAC state */
  328. hdac->State = HAL_DAC_STATE_BUSY;
  329. /* DeInit the low level hardware */
  330. HAL_DAC_MspDeInit(hdac);
  331. /* Set DAC error code to none */
  332. hdac->ErrorCode = HAL_DAC_ERROR_NONE;
  333. /* Change DAC state */
  334. hdac->State = HAL_DAC_STATE_RESET;
  335. /* Release Lock */
  336. __HAL_UNLOCK(hdac);
  337. /* Return function status */
  338. return HAL_OK;
  339. }
  340. /**
  341. * @brief Initialize the DAC MSP.
  342. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  343. * the configuration information for the specified DAC.
  344. * @retval None
  345. */
  346. __weak void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
  347. {
  348. /* Prevent unused argument(s) compilation warning */
  349. UNUSED(hdac);
  350. /* NOTE : This function should not be modified, when the callback is needed,
  351. the HAL_DAC_MspInit could be implemented in the user file
  352. */
  353. }
  354. /**
  355. * @brief DeInitialize the DAC MSP.
  356. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  357. * the configuration information for the specified DAC.
  358. * @retval None
  359. */
  360. __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
  361. {
  362. /* Prevent unused argument(s) compilation warning */
  363. UNUSED(hdac);
  364. /* NOTE : This function should not be modified, when the callback is needed,
  365. the HAL_DAC_MspDeInit could be implemented in the user file
  366. */
  367. }
  368. /**
  369. * @}
  370. */
  371. /** @defgroup DAC_Exported_Functions_Group2 IO operation functions
  372. * @brief IO operation functions
  373. *
  374. @verbatim
  375. ==============================================================================
  376. ##### IO operation functions #####
  377. ==============================================================================
  378. [..] This section provides functions allowing to:
  379. (+) Start conversion.
  380. (+) Stop conversion.
  381. (+) Start conversion and enable DMA transfer.
  382. (+) Stop conversion and disable DMA transfer.
  383. (+) Get result of conversion.
  384. @endverbatim
  385. * @{
  386. */
  387. /**
  388. * @brief Enables DAC and starts conversion of channel.
  389. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  390. * the configuration information for the specified DAC.
  391. * @param Channel: The selected DAC channel.
  392. * This parameter can be one of the following values:
  393. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  394. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  395. * @retval HAL status
  396. */
  397. HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
  398. {
  399. /* Check the parameters */
  400. assert_param(IS_DAC_CHANNEL(Channel));
  401. /* Process locked */
  402. __HAL_LOCK(hdac);
  403. /* Change DAC state */
  404. hdac->State = HAL_DAC_STATE_BUSY;
  405. /* Enable the Peripheral */
  406. __HAL_DAC_ENABLE(hdac, Channel);
  407. if(Channel == DAC_CHANNEL_1)
  408. {
  409. /* Check if software trigger enabled */
  410. if((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == (DAC_CR_TEN1 | DAC_CR_TSEL1))
  411. {
  412. /* Enable the selected DAC software conversion */
  413. SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
  414. }
  415. }
  416. else
  417. {
  418. /* Check if software trigger enabled */
  419. if((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_CR_TEN2 | DAC_CR_TSEL2))
  420. {
  421. /* Enable the selected DAC software conversion*/
  422. SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
  423. }
  424. }
  425. /* Change DAC state */
  426. hdac->State = HAL_DAC_STATE_READY;
  427. /* Process unlocked */
  428. __HAL_UNLOCK(hdac);
  429. /* Return function status */
  430. return HAL_OK;
  431. }
  432. /**
  433. * @brief Disables DAC and stop conversion of channel.
  434. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  435. * the configuration information for the specified DAC.
  436. * @param Channel: The selected DAC channel.
  437. * This parameter can be one of the following values:
  438. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  439. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  440. * @retval HAL status
  441. */
  442. HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel)
  443. {
  444. /* Check the parameters */
  445. assert_param(IS_DAC_CHANNEL(Channel));
  446. /* Disable the Peripheral */
  447. __HAL_DAC_DISABLE(hdac, Channel);
  448. /* Change DAC state */
  449. hdac->State = HAL_DAC_STATE_READY;
  450. /* Return function status */
  451. return HAL_OK;
  452. }
  453. /**
  454. * @brief Enables DAC and starts conversion of channel.
  455. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  456. * the configuration information for the specified DAC.
  457. * @param Channel: The selected DAC channel.
  458. * This parameter can be one of the following values:
  459. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  460. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  461. * @param pData: The destination peripheral Buffer address.
  462. * @param Length: The length of data to be transferred from memory to DAC peripheral
  463. * @param Alignment: Specifies the data alignment for DAC channel.
  464. * This parameter can be one of the following values:
  465. * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
  466. * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
  467. * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
  468. * @retval HAL status
  469. */
  470. HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
  471. {
  472. uint32_t tmpreg = 0;
  473. /* Check the parameters */
  474. assert_param(IS_DAC_CHANNEL(Channel));
  475. assert_param(IS_DAC_ALIGN(Alignment));
  476. /* Process locked */
  477. __HAL_LOCK(hdac);
  478. /* Change DAC state */
  479. hdac->State = HAL_DAC_STATE_BUSY;
  480. if(Channel == DAC_CHANNEL_1)
  481. {
  482. /* Set the DMA transfer complete callback for channel1 */
  483. hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
  484. /* Set the DMA half transfer complete callback for channel1 */
  485. hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
  486. /* Set the DMA error callback for channel1 */
  487. hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
  488. /* Enable the selected DAC channel1 DMA request */
  489. SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
  490. /* Case of use of channel 1 */
  491. switch(Alignment)
  492. {
  493. case DAC_ALIGN_12B_R:
  494. /* Get DHR12R1 address */
  495. tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
  496. break;
  497. case DAC_ALIGN_12B_L:
  498. /* Get DHR12L1 address */
  499. tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
  500. break;
  501. case DAC_ALIGN_8B_R:
  502. /* Get DHR8R1 address */
  503. tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
  504. break;
  505. default:
  506. break;
  507. }
  508. }
  509. else
  510. {
  511. /* Set the DMA transfer complete callback for channel2 */
  512. hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
  513. /* Set the DMA half transfer complete callback for channel2 */
  514. hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
  515. /* Set the DMA error callback for channel2 */
  516. hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
  517. /* Enable the selected DAC channel2 DMA request */
  518. SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
  519. /* Case of use of channel 2 */
  520. switch(Alignment)
  521. {
  522. case DAC_ALIGN_12B_R:
  523. /* Get DHR12R2 address */
  524. tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
  525. break;
  526. case DAC_ALIGN_12B_L:
  527. /* Get DHR12L2 address */
  528. tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
  529. break;
  530. case DAC_ALIGN_8B_R:
  531. /* Get DHR8R2 address */
  532. tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
  533. break;
  534. default:
  535. break;
  536. }
  537. }
  538. /* Enable the DMA channel */
  539. if(Channel == DAC_CHANNEL_1)
  540. {
  541. /* Enable the DAC DMA underrun interrupt */
  542. __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
  543. /* Enable the DMA channel */
  544. HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
  545. }
  546. else
  547. {
  548. /* Enable the DAC DMA underrun interrupt */
  549. __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
  550. /* Enable the DMA channel */
  551. HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
  552. }
  553. /* Process Unlocked */
  554. __HAL_UNLOCK(hdac);
  555. /* Enable the Peripheral */
  556. __HAL_DAC_ENABLE(hdac, Channel);
  557. /* Return function status */
  558. return HAL_OK;
  559. }
  560. /**
  561. * @brief Disables DAC and stop conversion of channel.
  562. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  563. * the configuration information for the specified DAC.
  564. * @param Channel: The selected DAC channel.
  565. * This parameter can be one of the following values:
  566. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  567. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  568. * @retval HAL status
  569. */
  570. HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel)
  571. {
  572. HAL_StatusTypeDef status = HAL_OK;
  573. /* Check the parameters */
  574. assert_param(IS_DAC_CHANNEL(Channel));
  575. /* Disable the selected DAC channel DMA request */
  576. hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << Channel);
  577. /* Disable the Peripheral */
  578. __HAL_DAC_DISABLE(hdac, Channel);
  579. /* Disable the DMA channel */
  580. /* Channel1 is used */
  581. if (Channel == DAC_CHANNEL_1)
  582. {
  583. /* Disable the DMA channel */
  584. status = HAL_DMA_Abort(hdac->DMA_Handle1);
  585. /* Disable the DAC DMA underrun interrupt */
  586. __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
  587. }
  588. else /* Channel2 is used for */
  589. {
  590. /* Disable the DMA channel */
  591. status = HAL_DMA_Abort(hdac->DMA_Handle2);
  592. /* Disable the DAC DMA underrun interrupt */
  593. __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2);
  594. }
  595. /* Check if DMA Channel effectively disabled */
  596. if (status != HAL_OK)
  597. {
  598. /* Update DAC state machine to error */
  599. hdac->State = HAL_DAC_STATE_ERROR;
  600. }
  601. else
  602. {
  603. /* Change DAC state */
  604. hdac->State = HAL_DAC_STATE_READY;
  605. }
  606. /* Return function status */
  607. return status;
  608. }
  609. /* DAC channel 2 is available on top of DAC channel 1 */
  610. /**
  611. * @brief Handles DAC interrupt request
  612. * This function uses the interruption of DMA
  613. * underrun.
  614. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  615. * the configuration information for the specified DAC.
  616. * @retval None
  617. */
  618. void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
  619. {
  620. if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1))
  621. {
  622. /* Check underrun flag of DAC channel 1 */
  623. if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
  624. {
  625. /* Change DAC state to error state */
  626. hdac->State = HAL_DAC_STATE_ERROR;
  627. /* Set DAC error code to chanel1 DMA underrun error */
  628. SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1);
  629. /* Clear the underrun flag */
  630. __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
  631. /* Disable the selected DAC channel1 DMA request */
  632. CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
  633. /* Error callback */
  634. HAL_DAC_DMAUnderrunCallbackCh1(hdac);
  635. }
  636. }
  637. if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2))
  638. {
  639. /* Check underrun flag of DAC channel 1 */
  640. if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
  641. {
  642. /* Change DAC state to error state */
  643. hdac->State = HAL_DAC_STATE_ERROR;
  644. /* Set DAC error code to channel2 DMA underrun error */
  645. SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2);
  646. /* Clear the underrun flag */
  647. __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2);
  648. /* Disable the selected DAC channel1 DMA request */
  649. CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
  650. /* Error callback */
  651. HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
  652. }
  653. }
  654. }
  655. /**
  656. * @brief Set the specified data holding register value for DAC channel.
  657. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  658. * the configuration information for the specified DAC.
  659. * @param Channel: The selected DAC channel.
  660. * This parameter can be one of the following values:
  661. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  662. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  663. * @param Alignment: Specifies the data alignment.
  664. * This parameter can be one of the following values:
  665. * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
  666. * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
  667. * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
  668. * @param Data: Data to be loaded in the selected data holding register.
  669. * @retval HAL status
  670. */
  671. HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
  672. {
  673. __IO uint32_t tmp = 0;
  674. /* Check the parameters */
  675. assert_param(IS_DAC_CHANNEL(Channel));
  676. assert_param(IS_DAC_ALIGN(Alignment));
  677. assert_param(IS_DAC_DATA(Data));
  678. tmp = (uint32_t)hdac->Instance;
  679. if(Channel == DAC_CHANNEL_1)
  680. {
  681. tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
  682. }
  683. else
  684. {
  685. tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
  686. }
  687. /* Set the DAC channel selected data holding register */
  688. *(__IO uint32_t *) tmp = Data;
  689. /* Return function status */
  690. return HAL_OK;
  691. }
  692. /**
  693. * @brief Conversion complete callback in non-blocking mode for Channel1
  694. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  695. * the configuration information for the specified DAC.
  696. * @retval None
  697. */
  698. __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac)
  699. {
  700. /* Prevent unused argument(s) compilation warning */
  701. UNUSED(hdac);
  702. /* NOTE : This function should not be modified, when the callback is needed,
  703. the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file
  704. */
  705. }
  706. /**
  707. * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1
  708. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  709. * the configuration information for the specified DAC.
  710. * @retval None
  711. */
  712. __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac)
  713. {
  714. /* Prevent unused argument(s) compilation warning */
  715. UNUSED(hdac);
  716. /* NOTE : This function should not be modified, when the callback is needed,
  717. the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
  718. */
  719. }
  720. /**
  721. * @brief Error DAC callback for Channel1.
  722. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  723. * the configuration information for the specified DAC.
  724. * @retval None
  725. */
  726. __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
  727. {
  728. /* Prevent unused argument(s) compilation warning */
  729. UNUSED(hdac);
  730. /* NOTE : This function should not be modified, when the callback is needed,
  731. the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
  732. */
  733. }
  734. /**
  735. * @brief DMA underrun DAC callback for channel1.
  736. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  737. * the configuration information for the specified DAC.
  738. * @retval None
  739. */
  740. __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
  741. {
  742. /* Prevent unused argument(s) compilation warning */
  743. UNUSED(hdac);
  744. /* NOTE : This function should not be modified, when the callback is needed,
  745. the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
  746. */
  747. }
  748. /**
  749. * @}
  750. */
  751. /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
  752. * @brief Peripheral Control functions
  753. *
  754. @verbatim
  755. ==============================================================================
  756. ##### Peripheral Control functions #####
  757. ==============================================================================
  758. [..] This section provides functions allowing to:
  759. (+) Configure channels.
  760. (+) Set the specified data holding register value for DAC channel.
  761. @endverbatim
  762. * @{
  763. */
  764. /**
  765. * @brief Returns the last data output value of the selected DAC channel.
  766. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  767. * the configuration information for the specified DAC.
  768. * @param Channel: The selected DAC channel.
  769. * This parameter can be one of the following values:
  770. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  771. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  772. * @retval The selected DAC channel data output value.
  773. */
  774. uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
  775. {
  776. /* Check the parameters */
  777. assert_param(IS_DAC_CHANNEL(Channel));
  778. /* Returns the DAC channel data output register value */
  779. if(Channel == DAC_CHANNEL_1)
  780. {
  781. return hdac->Instance->DOR1;
  782. }
  783. else
  784. {
  785. return hdac->Instance->DOR2;
  786. }
  787. }
  788. /**
  789. * @brief Configures the selected DAC channel.
  790. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  791. * the configuration information for the specified DAC.
  792. * @param sConfig: DAC configuration structure.
  793. * @param Channel: The selected DAC channel.
  794. * This parameter can be one of the following values:
  795. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  796. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  797. * @retval HAL status
  798. */
  799. HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
  800. {
  801. uint32_t tmpreg1 = 0, tmpreg2 = 0;
  802. uint32_t tickstart = 0;
  803. /* Check the DAC parameters */
  804. assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
  805. assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
  806. assert_param(IS_DAC_CHIP_CONNECTION(sConfig->DAC_ConnectOnChipPeripheral));
  807. assert_param(IS_DAC_TRIMMING(sConfig->DAC_UserTrimming));
  808. if ((sConfig->DAC_UserTrimming) == DAC_TRIMMING_USER)
  809. {
  810. assert_param(IS_DAC_TRIMMINGVALUE(sConfig->DAC_TrimmingValue));
  811. }
  812. assert_param(IS_DAC_SAMPLEANDHOLD(sConfig->DAC_SampleAndHold));
  813. if ((sConfig->DAC_SampleAndHold) == DAC_SAMPLEANDHOLD_ENABLE)
  814. {
  815. assert_param(IS_DAC_SAMPLETIME(sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime));
  816. assert_param(IS_DAC_HOLDTIME(sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime));
  817. assert_param(IS_DAC_REFRESHTIME(sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime));
  818. }
  819. assert_param(IS_DAC_CHANNEL(Channel));
  820. /* Process locked */
  821. __HAL_LOCK(hdac);
  822. /* Change DAC state */
  823. hdac->State = HAL_DAC_STATE_BUSY;
  824. if(sConfig->DAC_SampleAndHold == DAC_SAMPLEANDHOLD_ENABLE)
  825. /* Sample on old configuration */
  826. {
  827. /* SampleTime */
  828. if (Channel == DAC_CHANNEL_1)
  829. {
  830. /* Get timeout */
  831. tickstart = HAL_GetTick();
  832. /* SHSR1 can be written when BWST1 equals RESET */
  833. while (((hdac->Instance->SR) & DAC_SR_BWST1)!= RESET)
  834. {
  835. /* Check for the Timeout */
  836. if((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
  837. {
  838. /* Update error code */
  839. SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
  840. /* Change the DMA state */
  841. hdac->State = HAL_DAC_STATE_TIMEOUT;
  842. return HAL_TIMEOUT;
  843. }
  844. }
  845. HAL_Delay(1);
  846. hdac->Instance->SHSR1 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
  847. }
  848. else /* Channel 2 */
  849. {
  850. /* SHSR2 can be written when BWST2 equals RESET */
  851. while (((hdac->Instance->SR) & DAC_SR_BWST2)!= RESET)
  852. {
  853. /* Check for the Timeout */
  854. if((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
  855. {
  856. /* Update error code */
  857. SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
  858. /* Change the DMA state */
  859. hdac->State = HAL_DAC_STATE_TIMEOUT;
  860. return HAL_TIMEOUT;
  861. }
  862. }
  863. HAL_Delay(1);
  864. hdac->Instance->SHSR2 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
  865. }
  866. /* HoldTime */
  867. hdac->Instance->SHHR = (sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime)<<Channel;
  868. /* RefreshTime */
  869. hdac->Instance->SHRR = (sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime)<<Channel;
  870. }
  871. if(sConfig->DAC_UserTrimming == DAC_TRIMMING_USER)
  872. /* USER TRIMMING */
  873. {
  874. /* Get the DAC CCR value */
  875. tmpreg1 = hdac->Instance->CCR;
  876. /* Clear trimming value */
  877. tmpreg1 &= ~(((uint32_t)(DAC_CCR_OTRIM1)) << Channel);
  878. /* Configure for the selected trimming offset */
  879. tmpreg2 = sConfig->DAC_TrimmingValue;
  880. /* Calculate CCR register value depending on DAC_Channel */
  881. tmpreg1 |= tmpreg2 << Channel;
  882. /* Write to DAC CCR */
  883. hdac->Instance->CCR = tmpreg1;
  884. }
  885. /* else factory trimming is used (factory setting are available at reset)*/
  886. /* SW Nothing has nothing to do */
  887. /* Get the DAC MCR value */
  888. tmpreg1 = hdac->Instance->MCR;
  889. /* Clear DAC_MCR_MODE2_0, DAC_MCR_MODE2_1 and DAC_MCR_MODE2_2 bits */
  890. tmpreg1 &= ~(((uint32_t)(DAC_MCR_MODE1)) << Channel);
  891. /* Configure for the selected DAC channel: mode, buffer output & on chip peripheral connect */
  892. tmpreg2 = (sConfig->DAC_SampleAndHold | sConfig->DAC_OutputBuffer | sConfig->DAC_ConnectOnChipPeripheral);
  893. /* Calculate MCR register value depending on DAC_Channel */
  894. tmpreg1 |= tmpreg2 << Channel;
  895. /* Write to DAC MCR */
  896. hdac->Instance->MCR = tmpreg1;
  897. /* DAC in normal operating mode hence clear DAC_CR_CENx bit */
  898. CLEAR_BIT (hdac->Instance->CR, DAC_CR_CEN1 << Channel);
  899. /* Get the DAC CR value */
  900. tmpreg1 = hdac->Instance->CR;
  901. /* Clear TENx, TSELx, WAVEx and MAMPx bits */
  902. tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1)) << Channel);
  903. /* Configure for the selected DAC channel: trigger */
  904. /* Set TSELx and TENx bits according to DAC_Trigger value */
  905. tmpreg2 = (sConfig->DAC_Trigger);
  906. /* Calculate CR register value depending on DAC_Channel */
  907. tmpreg1 |= tmpreg2 << Channel;
  908. /* Write to DAC CR */
  909. hdac->Instance->CR = tmpreg1;
  910. /* Disable wave generation */
  911. hdac->Instance->CR &= ~(DAC_CR_WAVE1 << Channel);
  912. /* Change DAC state */
  913. hdac->State = HAL_DAC_STATE_READY;
  914. /* Process unlocked */
  915. __HAL_UNLOCK(hdac);
  916. /* Return function status */
  917. return HAL_OK;
  918. }
  919. /**
  920. * @}
  921. */
  922. /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
  923. * @brief Peripheral State and Errors functions
  924. *
  925. @verbatim
  926. ==============================================================================
  927. ##### Peripheral State and Errors functions #####
  928. ==============================================================================
  929. [..]
  930. This subsection provides functions allowing to
  931. (+) Check the DAC state.
  932. (+) Check the DAC Errors.
  933. @endverbatim
  934. * @{
  935. */
  936. /**
  937. * @brief return the DAC handle state
  938. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  939. * the configuration information for the specified DAC.
  940. * @retval HAL state
  941. */
  942. HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac)
  943. {
  944. /* Return DAC handle state */
  945. return hdac->State;
  946. }
  947. /**
  948. * @brief Return the DAC error code
  949. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  950. * the configuration information for the specified DAC.
  951. * @retval DAC Error Code
  952. */
  953. uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac)
  954. {
  955. return hdac->ErrorCode;
  956. }
  957. /**
  958. * @}
  959. */
  960. /**
  961. * @}
  962. */
  963. /** @addtogroup DAC_Private_Functions
  964. * @{
  965. */
  966. /**
  967. * @brief DMA conversion complete callback.
  968. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  969. * the configuration information for the specified DMA module.
  970. * @retval None
  971. */
  972. static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
  973. {
  974. DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  975. HAL_DAC_ConvCpltCallbackCh1(hdac);
  976. hdac->State= HAL_DAC_STATE_READY;
  977. }
  978. /**
  979. * @brief DMA half transfer complete callback.
  980. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  981. * the configuration information for the specified DMA module.
  982. * @retval None
  983. */
  984. static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
  985. {
  986. DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  987. /* Conversion complete callback */
  988. HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
  989. }
  990. /**
  991. * @brief DMA error callback
  992. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  993. * the configuration information for the specified DMA module.
  994. * @retval None
  995. */
  996. static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
  997. {
  998. DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  999. /* Set DAC error code to DMA error */
  1000. hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
  1001. HAL_DAC_ErrorCallbackCh1(hdac);
  1002. hdac->State= HAL_DAC_STATE_READY;
  1003. }
  1004. /**
  1005. * @}
  1006. */
  1007. #endif /* HAL_DAC_MODULE_ENABLED */
  1008. /**
  1009. * @}
  1010. */
  1011. /**
  1012. * @}
  1013. */
  1014. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/