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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_flash_ex.c
  4. * @author MCD Application Team
  5. * @version V1.5.2
  6. * @date 22-September-2016
  7. * @brief Extended FLASH HAL module driver.
  8. * This file provides firmware functions to manage the following
  9. * functionalities of the FLASH extension peripheral:
  10. * + Extended programming operations functions
  11. *
  12. @verbatim
  13. ==============================================================================
  14. ##### Flash Extension features #####
  15. ==============================================================================
  16. [..] Comparing to other previous devices, the FLASH interface for STM32F427xx/437xx and
  17. STM32F429xx/439xx devices contains the following additional features
  18. (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write
  19. capability (RWW)
  20. (+) Dual bank memory organization
  21. (+) PCROP protection for all banks
  22. ##### How to use this driver #####
  23. ==============================================================================
  24. [..] This driver provides functions to configure and program the FLASH memory
  25. of all STM32F427xx/437xx, STM32F429xx/439xx, STM32F469xx/479xx and STM32F446xx
  26. devices. It includes
  27. (#) FLASH Memory Erase functions:
  28. (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
  29. HAL_FLASH_Lock() functions
  30. (++) Erase function: Erase sector, erase all sectors
  31. (++) There are two modes of erase :
  32. (+++) Polling Mode using HAL_FLASHEx_Erase()
  33. (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT()
  34. (#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to :
  35. (++) Set/Reset the write protection
  36. (++) Set the Read protection Level
  37. (++) Set the BOR level
  38. (++) Program the user Option Bytes
  39. (#) Advanced Option Bytes Programming functions: Use HAL_FLASHEx_AdvOBProgram() to :
  40. (++) Extended space (bank 2) erase function
  41. (++) Full FLASH space (2 Mo) erase (bank 1 and bank 2)
  42. (++) Dual Boot activation
  43. (++) Write protection configuration for bank 2
  44. (++) PCROP protection configuration and control for both banks
  45. @endverbatim
  46. ******************************************************************************
  47. * @attention
  48. *
  49. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  50. *
  51. * Redistribution and use in source and binary forms, with or without modification,
  52. * are permitted provided that the following conditions are met:
  53. * 1. Redistributions of source code must retain the above copyright notice,
  54. * this list of conditions and the following disclaimer.
  55. * 2. Redistributions in binary form must reproduce the above copyright notice,
  56. * this list of conditions and the following disclaimer in the documentation
  57. * and/or other materials provided with the distribution.
  58. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  59. * may be used to endorse or promote products derived from this software
  60. * without specific prior written permission.
  61. *
  62. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  63. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  64. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  65. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  66. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  67. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  68. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  69. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  70. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  71. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  72. *
  73. ******************************************************************************
  74. */
  75. /* Includes ------------------------------------------------------------------*/
  76. #include "stm32f4xx_hal.h"
  77. /** @addtogroup STM32F4xx_HAL_Driver
  78. * @{
  79. */
  80. /** @defgroup FLASHEx FLASHEx
  81. * @brief FLASH HAL Extension module driver
  82. * @{
  83. */
  84. #ifdef HAL_FLASH_MODULE_ENABLED
  85. /* Private typedef -----------------------------------------------------------*/
  86. /* Private define ------------------------------------------------------------*/
  87. /** @addtogroup FLASHEx_Private_Constants
  88. * @{
  89. */
  90. #define FLASH_TIMEOUT_VALUE ((uint32_t)50000U)/* 50 s */
  91. /**
  92. * @}
  93. */
  94. /* Private macro -------------------------------------------------------------*/
  95. /* Private variables ---------------------------------------------------------*/
  96. /** @addtogroup FLASHEx_Private_Variables
  97. * @{
  98. */
  99. extern FLASH_ProcessTypeDef pFlash;
  100. /**
  101. * @}
  102. */
  103. /* Private function prototypes -----------------------------------------------*/
  104. /** @addtogroup FLASHEx_Private_Functions
  105. * @{
  106. */
  107. /* Option bytes control */
  108. static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks);
  109. static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks);
  110. static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks);
  111. static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level);
  112. static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby);
  113. static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level);
  114. static uint8_t FLASH_OB_GetUser(void);
  115. static uint16_t FLASH_OB_GetWRP(void);
  116. static uint8_t FLASH_OB_GetRDP(void);
  117. static uint8_t FLASH_OB_GetBOR(void);
  118. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) ||\
  119. defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
  120. static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector);
  121. static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector);
  122. #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
  123. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
  124. static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
  125. static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
  126. static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig);
  127. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
  128. extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
  129. /**
  130. * @}
  131. */
  132. /* Exported functions --------------------------------------------------------*/
  133. /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions
  134. * @{
  135. */
  136. /** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions
  137. * @brief Extended IO operation functions
  138. *
  139. @verbatim
  140. ===============================================================================
  141. ##### Extended programming operation functions #####
  142. ===============================================================================
  143. [..]
  144. This subsection provides a set of functions allowing to manage the Extension FLASH
  145. programming operations.
  146. @endverbatim
  147. * @{
  148. */
  149. /**
  150. * @brief Perform a mass erase or erase the specified FLASH memory sectors
  151. * @param[in] pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
  152. * contains the configuration information for the erasing.
  153. *
  154. * @param[out] SectorError: pointer to variable that
  155. * contains the configuration information on faulty sector in case of error
  156. * (0xFFFFFFFFU means that all the sectors have been correctly erased)
  157. *
  158. * @retval HAL Status
  159. */
  160. HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError)
  161. {
  162. HAL_StatusTypeDef status = HAL_ERROR;
  163. uint32_t index = 0U;
  164. /* Process Locked */
  165. __HAL_LOCK(&pFlash);
  166. /* Check the parameters */
  167. assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
  168. /* Wait for last operation to be completed */
  169. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  170. if(status == HAL_OK)
  171. {
  172. /*Initialization of SectorError variable*/
  173. *SectorError = 0xFFFFFFFFU;
  174. if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
  175. {
  176. /*Mass erase to be done*/
  177. FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
  178. /* Wait for last operation to be completed */
  179. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  180. /* if the erase operation is completed, disable the MER Bit */
  181. FLASH->CR &= (~FLASH_MER_BIT);
  182. }
  183. else
  184. {
  185. /* Check the parameters */
  186. assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
  187. /* Erase by sector by sector to be done*/
  188. for(index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++)
  189. {
  190. FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange);
  191. /* Wait for last operation to be completed */
  192. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  193. /* If the erase operation is completed, disable the SER and SNB Bits */
  194. CLEAR_BIT(FLASH->CR, (FLASH_CR_SER | FLASH_CR_SNB));
  195. if(status != HAL_OK)
  196. {
  197. /* In case of error, stop erase procedure and return the faulty sector*/
  198. *SectorError = index;
  199. break;
  200. }
  201. }
  202. }
  203. /* Flush the caches to be sure of the data consistency */
  204. FLASH_FlushCaches();
  205. }
  206. /* Process Unlocked */
  207. __HAL_UNLOCK(&pFlash);
  208. return status;
  209. }
  210. /**
  211. * @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled
  212. * @param pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
  213. * contains the configuration information for the erasing.
  214. *
  215. * @retval HAL Status
  216. */
  217. HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
  218. {
  219. HAL_StatusTypeDef status = HAL_OK;
  220. /* Process Locked */
  221. __HAL_LOCK(&pFlash);
  222. /* Check the parameters */
  223. assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
  224. /* Enable End of FLASH Operation interrupt */
  225. __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP);
  226. /* Enable Error source interrupt */
  227. __HAL_FLASH_ENABLE_IT(FLASH_IT_ERR);
  228. /* Clear pending flags (if any) */
  229. __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |\
  230. FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR| FLASH_FLAG_PGSERR);
  231. if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
  232. {
  233. /*Mass erase to be done*/
  234. pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE;
  235. pFlash.Bank = pEraseInit->Banks;
  236. FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
  237. }
  238. else
  239. {
  240. /* Erase by sector to be done*/
  241. /* Check the parameters */
  242. assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
  243. pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE;
  244. pFlash.NbSectorsToErase = pEraseInit->NbSectors;
  245. pFlash.Sector = pEraseInit->Sector;
  246. pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange;
  247. /*Erase 1st sector and wait for IT*/
  248. FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->VoltageRange);
  249. }
  250. return status;
  251. }
  252. /**
  253. * @brief Program option bytes
  254. * @param pOBInit: pointer to an FLASH_OBInitStruct structure that
  255. * contains the configuration information for the programming.
  256. *
  257. * @retval HAL Status
  258. */
  259. HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
  260. {
  261. HAL_StatusTypeDef status = HAL_ERROR;
  262. /* Process Locked */
  263. __HAL_LOCK(&pFlash);
  264. /* Check the parameters */
  265. assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
  266. /*Write protection configuration*/
  267. if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
  268. {
  269. assert_param(IS_WRPSTATE(pOBInit->WRPState));
  270. if(pOBInit->WRPState == OB_WRPSTATE_ENABLE)
  271. {
  272. /*Enable of Write protection on the selected Sector*/
  273. status = FLASH_OB_EnableWRP(pOBInit->WRPSector, pOBInit->Banks);
  274. }
  275. else
  276. {
  277. /*Disable of Write protection on the selected Sector*/
  278. status = FLASH_OB_DisableWRP(pOBInit->WRPSector, pOBInit->Banks);
  279. }
  280. }
  281. /*Read protection configuration*/
  282. if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
  283. {
  284. status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
  285. }
  286. /*USER configuration*/
  287. if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
  288. {
  289. status = FLASH_OB_UserConfig(pOBInit->USERConfig&OB_IWDG_SW,
  290. pOBInit->USERConfig&OB_STOP_NO_RST,
  291. pOBInit->USERConfig&OB_STDBY_NO_RST);
  292. }
  293. /*BOR Level configuration*/
  294. if((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR)
  295. {
  296. status = FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel);
  297. }
  298. /* Process Unlocked */
  299. __HAL_UNLOCK(&pFlash);
  300. return status;
  301. }
  302. /**
  303. * @brief Get the Option byte configuration
  304. * @param pOBInit: pointer to an FLASH_OBInitStruct structure that
  305. * contains the configuration information for the programming.
  306. *
  307. * @retval None
  308. */
  309. void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
  310. {
  311. pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_BOR;
  312. /*Get WRP*/
  313. pOBInit->WRPSector = (uint32_t)FLASH_OB_GetWRP();
  314. /*Get RDP Level*/
  315. pOBInit->RDPLevel = (uint32_t)FLASH_OB_GetRDP();
  316. /*Get USER*/
  317. pOBInit->USERConfig = (uint8_t)FLASH_OB_GetUser();
  318. /*Get BOR Level*/
  319. pOBInit->BORLevel = (uint32_t)FLASH_OB_GetBOR();
  320. }
  321. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
  322. defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
  323. defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
  324. defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
  325. defined(STM32F412Cx)
  326. /**
  327. * @brief Program option bytes
  328. * @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that
  329. * contains the configuration information for the programming.
  330. *
  331. * @retval HAL Status
  332. */
  333. HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
  334. {
  335. HAL_StatusTypeDef status = HAL_ERROR;
  336. /* Check the parameters */
  337. assert_param(IS_OBEX(pAdvOBInit->OptionType));
  338. /*Program PCROP option byte*/
  339. if(((pAdvOBInit->OptionType) & OPTIONBYTE_PCROP) == OPTIONBYTE_PCROP)
  340. {
  341. /* Check the parameters */
  342. assert_param(IS_PCROPSTATE(pAdvOBInit->PCROPState));
  343. if((pAdvOBInit->PCROPState) == OB_PCROP_STATE_ENABLE)
  344. {
  345. /*Enable of Write protection on the selected Sector*/
  346. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
  347. defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
  348. defined(STM32F412Cx)
  349. status = FLASH_OB_EnablePCROP(pAdvOBInit->Sectors);
  350. #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
  351. status = FLASH_OB_EnablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
  352. #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
  353. }
  354. else
  355. {
  356. /*Disable of Write protection on the selected Sector*/
  357. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
  358. defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
  359. defined(STM32F412Cx)
  360. status = FLASH_OB_DisablePCROP(pAdvOBInit->Sectors);
  361. #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
  362. status = FLASH_OB_DisablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
  363. #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
  364. }
  365. }
  366. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
  367. /*Program BOOT config option byte*/
  368. if(((pAdvOBInit->OptionType) & OPTIONBYTE_BOOTCONFIG) == OPTIONBYTE_BOOTCONFIG)
  369. {
  370. status = FLASH_OB_BootConfig(pAdvOBInit->BootConfig);
  371. }
  372. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
  373. return status;
  374. }
  375. /**
  376. * @brief Get the OBEX byte configuration
  377. * @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that
  378. * contains the configuration information for the programming.
  379. *
  380. * @retval None
  381. */
  382. void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
  383. {
  384. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
  385. defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
  386. defined(STM32F412Cx)
  387. /*Get Sector*/
  388. pAdvOBInit->Sectors = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
  389. #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
  390. /*Get Sector for Bank1*/
  391. pAdvOBInit->SectorsBank1 = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
  392. /*Get Sector for Bank2*/
  393. pAdvOBInit->SectorsBank2 = (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
  394. /*Get Boot config OB*/
  395. pAdvOBInit->BootConfig = *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS;
  396. #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
  397. }
  398. /**
  399. * @brief Select the Protection Mode
  400. *
  401. * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
  402. * Global Read Out Protection modification (from level1 to level0)
  403. * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
  404. * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
  405. * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/
  406. * STM32F469xx/STM32F479xx/STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx devices.
  407. *
  408. * @retval HAL Status
  409. */
  410. HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void)
  411. {
  412. uint8_t optiontmp = 0xFFU;
  413. /* Mask SPRMOD bit */
  414. optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7FU);
  415. /* Update Option Byte */
  416. *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_SELECTED | optiontmp);
  417. return HAL_OK;
  418. }
  419. /**
  420. * @brief Deselect the Protection Mode
  421. *
  422. * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
  423. * Global Read Out Protection modification (from level1 to level0)
  424. * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
  425. * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
  426. * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/
  427. * STM32F469xx/STM32F479xx/STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx devices.
  428. *
  429. * @retval HAL Status
  430. */
  431. HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void)
  432. {
  433. uint8_t optiontmp = 0xFFU;
  434. /* Mask SPRMOD bit */
  435. optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7FU);
  436. /* Update Option Byte */
  437. *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_DESELECTED | optiontmp);
  438. return HAL_OK;
  439. }
  440. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F410xx ||\
  441. STM32F411xE || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
  442. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
  443. /**
  444. * @brief Returns the FLASH Write Protection Option Bytes value for Bank 2
  445. * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx devices.
  446. * @retval The FLASH Write Protection Option Bytes value
  447. */
  448. uint16_t HAL_FLASHEx_OB_GetBank2WRP(void)
  449. {
  450. /* Return the FLASH write protection Register value */
  451. return (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
  452. }
  453. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
  454. /**
  455. * @}
  456. */
  457. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
  458. /**
  459. * @brief Full erase of FLASH memory sectors
  460. * @param VoltageRange: The device voltage range which defines the erase parallelism.
  461. * This parameter can be one of the following values:
  462. * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
  463. * the operation will be done by byte (8-bit)
  464. * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
  465. * the operation will be done by half word (16-bit)
  466. * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
  467. * the operation will be done by word (32-bit)
  468. * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
  469. * the operation will be done by double word (64-bit)
  470. *
  471. * @param Banks: Banks to be erased
  472. * This parameter can be one of the following values:
  473. * @arg FLASH_BANK_1: Bank1 to be erased
  474. * @arg FLASH_BANK_2: Bank2 to be erased
  475. * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
  476. *
  477. * @retval HAL Status
  478. */
  479. static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
  480. {
  481. /* Check the parameters */
  482. assert_param(IS_VOLTAGERANGE(VoltageRange));
  483. assert_param(IS_FLASH_BANK(Banks));
  484. /* if the previous operation is completed, proceed to erase all sectors */
  485. CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
  486. if(Banks == FLASH_BANK_BOTH)
  487. {
  488. /* bank1 & bank2 will be erased*/
  489. FLASH->CR |= FLASH_MER_BIT;
  490. }
  491. else if(Banks == FLASH_BANK_1)
  492. {
  493. /*Only bank1 will be erased*/
  494. FLASH->CR |= FLASH_CR_MER1;
  495. }
  496. else
  497. {
  498. /*Only bank2 will be erased*/
  499. FLASH->CR |= FLASH_CR_MER2;
  500. }
  501. FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange <<8U);
  502. }
  503. /**
  504. * @brief Erase the specified FLASH memory sector
  505. * @param Sector: FLASH sector to erase
  506. * The value of this parameter depend on device used within the same series
  507. * @param VoltageRange: The device voltage range which defines the erase parallelism.
  508. * This parameter can be one of the following values:
  509. * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
  510. * the operation will be done by byte (8-bit)
  511. * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
  512. * the operation will be done by half word (16-bit)
  513. * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
  514. * the operation will be done by word (32-bit)
  515. * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
  516. * the operation will be done by double word (64-bit)
  517. *
  518. * @retval None
  519. */
  520. void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
  521. {
  522. uint32_t tmp_psize = 0U;
  523. /* Check the parameters */
  524. assert_param(IS_FLASH_SECTOR(Sector));
  525. assert_param(IS_VOLTAGERANGE(VoltageRange));
  526. if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
  527. {
  528. tmp_psize = FLASH_PSIZE_BYTE;
  529. }
  530. else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
  531. {
  532. tmp_psize = FLASH_PSIZE_HALF_WORD;
  533. }
  534. else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
  535. {
  536. tmp_psize = FLASH_PSIZE_WORD;
  537. }
  538. else
  539. {
  540. tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
  541. }
  542. /* Need to add offset of 4 when sector higher than FLASH_SECTOR_11 */
  543. if(Sector > FLASH_SECTOR_11)
  544. {
  545. Sector += 4U;
  546. }
  547. /* If the previous operation is completed, proceed to erase the sector */
  548. CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
  549. FLASH->CR |= tmp_psize;
  550. CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
  551. FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
  552. FLASH->CR |= FLASH_CR_STRT;
  553. }
  554. /**
  555. * @brief Enable the write protection of the desired bank1 or bank 2 sectors
  556. *
  557. * @note When the memory read protection level is selected (RDP level = 1),
  558. * it is not possible to program or erase the flash sector i if CortexM4
  559. * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
  560. * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
  561. *
  562. * @param WRPSector: specifies the sector(s) to be write protected.
  563. * This parameter can be one of the following values:
  564. * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
  565. * @arg OB_WRP_SECTOR_All
  566. * @note BANK2 starts from OB_WRP_SECTOR_12
  567. *
  568. * @param Banks: Enable write protection on all the sectors for the specific bank
  569. * This parameter can be one of the following values:
  570. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  571. * @arg FLASH_BANK_2: WRP on all sectors of bank2
  572. * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
  573. *
  574. * @retval HAL FLASH State
  575. */
  576. static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
  577. {
  578. HAL_StatusTypeDef status = HAL_OK;
  579. /* Check the parameters */
  580. assert_param(IS_OB_WRP_SECTOR(WRPSector));
  581. assert_param(IS_FLASH_BANK(Banks));
  582. /* Wait for last operation to be completed */
  583. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  584. if(status == HAL_OK)
  585. {
  586. if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
  587. (WRPSector < OB_WRP_SECTOR_12))
  588. {
  589. if(WRPSector == OB_WRP_SECTOR_All)
  590. {
  591. /*Write protection on all sector of BANK1*/
  592. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~(WRPSector>>12U));
  593. }
  594. else
  595. {
  596. /*Write protection done on sectors of BANK1*/
  597. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
  598. }
  599. }
  600. else
  601. {
  602. /*Write protection done on sectors of BANK2*/
  603. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12U));
  604. }
  605. /*Write protection on all sector of BANK2*/
  606. if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
  607. {
  608. /* Wait for last operation to be completed */
  609. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  610. if(status == HAL_OK)
  611. {
  612. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12U));
  613. }
  614. }
  615. }
  616. return status;
  617. }
  618. /**
  619. * @brief Disable the write protection of the desired bank1 or bank 2 sectors
  620. *
  621. * @note When the memory read protection level is selected (RDP level = 1),
  622. * it is not possible to program or erase the flash sector i if CortexM4
  623. * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
  624. * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
  625. *
  626. * @param WRPSector: specifies the sector(s) to be write protected.
  627. * This parameter can be one of the following values:
  628. * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
  629. * @arg OB_WRP_Sector_All
  630. * @note BANK2 starts from OB_WRP_SECTOR_12
  631. *
  632. * @param Banks: Disable write protection on all the sectors for the specific bank
  633. * This parameter can be one of the following values:
  634. * @arg FLASH_BANK_1: Bank1 to be erased
  635. * @arg FLASH_BANK_2: Bank2 to be erased
  636. * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
  637. *
  638. * @retval HAL Status
  639. */
  640. static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
  641. {
  642. HAL_StatusTypeDef status = HAL_OK;
  643. /* Check the parameters */
  644. assert_param(IS_OB_WRP_SECTOR(WRPSector));
  645. assert_param(IS_FLASH_BANK(Banks));
  646. /* Wait for last operation to be completed */
  647. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  648. if(status == HAL_OK)
  649. {
  650. if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
  651. (WRPSector < OB_WRP_SECTOR_12))
  652. {
  653. if(WRPSector == OB_WRP_SECTOR_All)
  654. {
  655. /*Write protection on all sector of BANK1*/
  656. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12U);
  657. }
  658. else
  659. {
  660. /*Write protection done on sectors of BANK1*/
  661. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
  662. }
  663. }
  664. else
  665. {
  666. /*Write protection done on sectors of BANK2*/
  667. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12U);
  668. }
  669. /*Write protection on all sector of BANK2*/
  670. if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
  671. {
  672. /* Wait for last operation to be completed */
  673. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  674. if(status == HAL_OK)
  675. {
  676. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12U);
  677. }
  678. }
  679. }
  680. return status;
  681. }
  682. /**
  683. * @brief Configure the Dual Bank Boot.
  684. *
  685. * @note This function can be used only for STM32F42xxx/43xxx devices.
  686. *
  687. * @param BootConfig specifies the Dual Bank Boot Option byte.
  688. * This parameter can be one of the following values:
  689. * @arg OB_Dual_BootEnabled: Dual Bank Boot Enable
  690. * @arg OB_Dual_BootDisabled: Dual Bank Boot Disabled
  691. * @retval None
  692. */
  693. static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig)
  694. {
  695. HAL_StatusTypeDef status = HAL_OK;
  696. /* Check the parameters */
  697. assert_param(IS_OB_BOOT(BootConfig));
  698. /* Wait for last operation to be completed */
  699. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  700. if(status == HAL_OK)
  701. {
  702. /* Set Dual Bank Boot */
  703. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2);
  704. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= BootConfig;
  705. }
  706. return status;
  707. }
  708. /**
  709. * @brief Enable the read/write protection (PCROP) of the desired
  710. * sectors of Bank 1 and/or Bank 2.
  711. * @note This function can be used only for STM32F42xxx/43xxx devices.
  712. * @param SectorBank1 Specifies the sector(s) to be read/write protected or unprotected for bank1.
  713. * This parameter can be one of the following values:
  714. * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
  715. * @arg OB_PCROP_SECTOR__All
  716. * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
  717. * This parameter can be one of the following values:
  718. * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
  719. * @arg OB_PCROP_SECTOR__All
  720. * @param Banks Enable PCROP protection on all the sectors for the specific bank
  721. * This parameter can be one of the following values:
  722. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  723. * @arg FLASH_BANK_2: WRP on all sectors of bank2
  724. * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
  725. *
  726. * @retval HAL Status
  727. */
  728. static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
  729. {
  730. HAL_StatusTypeDef status = HAL_OK;
  731. assert_param(IS_FLASH_BANK(Banks));
  732. /* Wait for last operation to be completed */
  733. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  734. if(status == HAL_OK)
  735. {
  736. if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
  737. {
  738. assert_param(IS_OB_PCROP(SectorBank1));
  739. /*Write protection done on sectors of BANK1*/
  740. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)SectorBank1;
  741. }
  742. else
  743. {
  744. assert_param(IS_OB_PCROP(SectorBank2));
  745. /*Write protection done on sectors of BANK2*/
  746. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
  747. }
  748. /*Write protection on all sector of BANK2*/
  749. if(Banks == FLASH_BANK_BOTH)
  750. {
  751. assert_param(IS_OB_PCROP(SectorBank2));
  752. /* Wait for last operation to be completed */
  753. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  754. if(status == HAL_OK)
  755. {
  756. /*Write protection done on sectors of BANK2*/
  757. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
  758. }
  759. }
  760. }
  761. return status;
  762. }
  763. /**
  764. * @brief Disable the read/write protection (PCROP) of the desired
  765. * sectors of Bank 1 and/or Bank 2.
  766. * @note This function can be used only for STM32F42xxx/43xxx devices.
  767. * @param SectorBank1 specifies the sector(s) to be read/write protected or unprotected for bank1.
  768. * This parameter can be one of the following values:
  769. * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
  770. * @arg OB_PCROP_SECTOR__All
  771. * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
  772. * This parameter can be one of the following values:
  773. * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
  774. * @arg OB_PCROP_SECTOR__All
  775. * @param Banks Disable PCROP protection on all the sectors for the specific bank
  776. * This parameter can be one of the following values:
  777. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  778. * @arg FLASH_BANK_2: WRP on all sectors of bank2
  779. * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
  780. *
  781. * @retval HAL Status
  782. */
  783. static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
  784. {
  785. HAL_StatusTypeDef status = HAL_OK;
  786. /* Check the parameters */
  787. assert_param(IS_FLASH_BANK(Banks));
  788. /* Wait for last operation to be completed */
  789. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  790. if(status == HAL_OK)
  791. {
  792. if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
  793. {
  794. assert_param(IS_OB_PCROP(SectorBank1));
  795. /*Write protection done on sectors of BANK1*/
  796. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~SectorBank1);
  797. }
  798. else
  799. {
  800. /*Write protection done on sectors of BANK2*/
  801. assert_param(IS_OB_PCROP(SectorBank2));
  802. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
  803. }
  804. /*Write protection on all sector of BANK2*/
  805. if(Banks == FLASH_BANK_BOTH)
  806. {
  807. assert_param(IS_OB_PCROP(SectorBank2));
  808. /* Wait for last operation to be completed */
  809. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  810. if(status == HAL_OK)
  811. {
  812. /*Write protection done on sectors of BANK2*/
  813. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
  814. }
  815. }
  816. }
  817. return status;
  818. }
  819. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
  820. #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
  821. defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
  822. defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
  823. defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
  824. /**
  825. * @brief Mass erase of FLASH memory
  826. * @param VoltageRange: The device voltage range which defines the erase parallelism.
  827. * This parameter can be one of the following values:
  828. * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
  829. * the operation will be done by byte (8-bit)
  830. * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
  831. * the operation will be done by half word (16-bit)
  832. * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
  833. * the operation will be done by word (32-bit)
  834. * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
  835. * the operation will be done by double word (64-bit)
  836. *
  837. * @param Banks: Banks to be erased
  838. * This parameter can be one of the following values:
  839. * @arg FLASH_BANK_1: Bank1 to be erased
  840. *
  841. * @retval None
  842. */
  843. static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
  844. {
  845. /* Check the parameters */
  846. assert_param(IS_VOLTAGERANGE(VoltageRange));
  847. assert_param(IS_FLASH_BANK(Banks));
  848. /* If the previous operation is completed, proceed to erase all sectors */
  849. CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
  850. FLASH->CR |= FLASH_CR_MER;
  851. FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange <<8U);
  852. }
  853. /**
  854. * @brief Erase the specified FLASH memory sector
  855. * @param Sector: FLASH sector to erase
  856. * The value of this parameter depend on device used within the same series
  857. * @param VoltageRange: The device voltage range which defines the erase parallelism.
  858. * This parameter can be one of the following values:
  859. * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
  860. * the operation will be done by byte (8-bit)
  861. * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
  862. * the operation will be done by half word (16-bit)
  863. * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
  864. * the operation will be done by word (32-bit)
  865. * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
  866. * the operation will be done by double word (64-bit)
  867. *
  868. * @retval None
  869. */
  870. void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
  871. {
  872. uint32_t tmp_psize = 0U;
  873. /* Check the parameters */
  874. assert_param(IS_FLASH_SECTOR(Sector));
  875. assert_param(IS_VOLTAGERANGE(VoltageRange));
  876. if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
  877. {
  878. tmp_psize = FLASH_PSIZE_BYTE;
  879. }
  880. else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
  881. {
  882. tmp_psize = FLASH_PSIZE_HALF_WORD;
  883. }
  884. else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
  885. {
  886. tmp_psize = FLASH_PSIZE_WORD;
  887. }
  888. else
  889. {
  890. tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
  891. }
  892. /* If the previous operation is completed, proceed to erase the sector */
  893. CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
  894. FLASH->CR |= tmp_psize;
  895. CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
  896. FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
  897. FLASH->CR |= FLASH_CR_STRT;
  898. }
  899. /**
  900. * @brief Enable the write protection of the desired bank 1 sectors
  901. *
  902. * @note When the memory read protection level is selected (RDP level = 1),
  903. * it is not possible to program or erase the flash sector i if CortexM4
  904. * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
  905. * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
  906. *
  907. * @param WRPSector: specifies the sector(s) to be write protected.
  908. * The value of this parameter depend on device used within the same series
  909. *
  910. * @param Banks: Enable write protection on all the sectors for the specific bank
  911. * This parameter can be one of the following values:
  912. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  913. *
  914. * @retval HAL Status
  915. */
  916. static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
  917. {
  918. HAL_StatusTypeDef status = HAL_OK;
  919. /* Check the parameters */
  920. assert_param(IS_OB_WRP_SECTOR(WRPSector));
  921. assert_param(IS_FLASH_BANK(Banks));
  922. /* Wait for last operation to be completed */
  923. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  924. if(status == HAL_OK)
  925. {
  926. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
  927. }
  928. return status;
  929. }
  930. /**
  931. * @brief Disable the write protection of the desired bank 1 sectors
  932. *
  933. * @note When the memory read protection level is selected (RDP level = 1),
  934. * it is not possible to program or erase the flash sector i if CortexM4
  935. * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
  936. * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
  937. *
  938. * @param WRPSector: specifies the sector(s) to be write protected.
  939. * The value of this parameter depend on device used within the same series
  940. *
  941. * @param Banks: Enable write protection on all the sectors for the specific bank
  942. * This parameter can be one of the following values:
  943. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  944. *
  945. * @retval HAL Status
  946. */
  947. static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
  948. {
  949. HAL_StatusTypeDef status = HAL_OK;
  950. /* Check the parameters */
  951. assert_param(IS_OB_WRP_SECTOR(WRPSector));
  952. assert_param(IS_FLASH_BANK(Banks));
  953. /* Wait for last operation to be completed */
  954. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  955. if(status == HAL_OK)
  956. {
  957. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
  958. }
  959. return status;
  960. }
  961. #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
  962. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
  963. defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
  964. defined(STM32F412Cx)
  965. /**
  966. * @brief Enable the read/write protection (PCROP) of the desired sectors.
  967. * @note This function can be used only for STM32F401xx devices.
  968. * @param Sector specifies the sector(s) to be read/write protected or unprotected.
  969. * This parameter can be one of the following values:
  970. * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
  971. * @arg OB_PCROP_Sector_All
  972. * @retval HAL Status
  973. */
  974. static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector)
  975. {
  976. HAL_StatusTypeDef status = HAL_OK;
  977. /* Check the parameters */
  978. assert_param(IS_OB_PCROP(Sector));
  979. /* Wait for last operation to be completed */
  980. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  981. if(status == HAL_OK)
  982. {
  983. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)Sector;
  984. }
  985. return status;
  986. }
  987. /**
  988. * @brief Disable the read/write protection (PCROP) of the desired sectors.
  989. * @note This function can be used only for STM32F401xx devices.
  990. * @param Sector specifies the sector(s) to be read/write protected or unprotected.
  991. * This parameter can be one of the following values:
  992. * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
  993. * @arg OB_PCROP_Sector_All
  994. * @retval HAL Status
  995. */
  996. static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector)
  997. {
  998. HAL_StatusTypeDef status = HAL_OK;
  999. /* Check the parameters */
  1000. assert_param(IS_OB_PCROP(Sector));
  1001. /* Wait for last operation to be completed */
  1002. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  1003. if(status == HAL_OK)
  1004. {
  1005. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~Sector);
  1006. }
  1007. return status;
  1008. }
  1009. #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
  1010. /**
  1011. * @brief Set the read protection level.
  1012. * @param Level: specifies the read protection level.
  1013. * This parameter can be one of the following values:
  1014. * @arg OB_RDP_LEVEL_0: No protection
  1015. * @arg OB_RDP_LEVEL_1: Read protection of the memory
  1016. * @arg OB_RDP_LEVEL_2: Full chip protection
  1017. *
  1018. * @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
  1019. *
  1020. * @retval HAL Status
  1021. */
  1022. static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level)
  1023. {
  1024. HAL_StatusTypeDef status = HAL_OK;
  1025. /* Check the parameters */
  1026. assert_param(IS_OB_RDP_LEVEL(Level));
  1027. /* Wait for last operation to be completed */
  1028. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  1029. if(status == HAL_OK)
  1030. {
  1031. *(__IO uint8_t*)OPTCR_BYTE1_ADDRESS = Level;
  1032. }
  1033. return status;
  1034. }
  1035. /**
  1036. * @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
  1037. * @param Iwdg: Selects the IWDG mode
  1038. * This parameter can be one of the following values:
  1039. * @arg OB_IWDG_SW: Software IWDG selected
  1040. * @arg OB_IWDG_HW: Hardware IWDG selected
  1041. * @param Stop: Reset event when entering STOP mode.
  1042. * This parameter can be one of the following values:
  1043. * @arg OB_STOP_NO_RST: No reset generated when entering in STOP
  1044. * @arg OB_STOP_RST: Reset generated when entering in STOP
  1045. * @param Stdby: Reset event when entering Standby mode.
  1046. * This parameter can be one of the following values:
  1047. * @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY
  1048. * @arg OB_STDBY_RST: Reset generated when entering in STANDBY
  1049. * @retval HAL Status
  1050. */
  1051. static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby)
  1052. {
  1053. uint8_t optiontmp = 0xFFU;
  1054. HAL_StatusTypeDef status = HAL_OK;
  1055. /* Check the parameters */
  1056. assert_param(IS_OB_IWDG_SOURCE(Iwdg));
  1057. assert_param(IS_OB_STOP_SOURCE(Stop));
  1058. assert_param(IS_OB_STDBY_SOURCE(Stdby));
  1059. /* Wait for last operation to be completed */
  1060. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  1061. if(status == HAL_OK)
  1062. {
  1063. /* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */
  1064. optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1FU);
  1065. /* Update User Option Byte */
  1066. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS = Iwdg | (uint8_t)(Stdby | (uint8_t)(Stop | ((uint8_t)optiontmp)));
  1067. }
  1068. return status;
  1069. }
  1070. /**
  1071. * @brief Set the BOR Level.
  1072. * @param Level: specifies the Option Bytes BOR Reset Level.
  1073. * This parameter can be one of the following values:
  1074. * @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
  1075. * @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
  1076. * @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
  1077. * @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V
  1078. * @retval HAL Status
  1079. */
  1080. static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level)
  1081. {
  1082. /* Check the parameters */
  1083. assert_param(IS_OB_BOR_LEVEL(Level));
  1084. /* Set the BOR Level */
  1085. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV);
  1086. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= Level;
  1087. return HAL_OK;
  1088. }
  1089. /**
  1090. * @brief Return the FLASH User Option Byte value.
  1091. * @retval uint8_t FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1)
  1092. * and RST_STDBY(Bit2).
  1093. */
  1094. static uint8_t FLASH_OB_GetUser(void)
  1095. {
  1096. /* Return the User Option Byte */
  1097. return ((uint8_t)(FLASH->OPTCR & 0xE0U));
  1098. }
  1099. /**
  1100. * @brief Return the FLASH Write Protection Option Bytes value.
  1101. * @retval uint16_t FLASH Write Protection Option Bytes value
  1102. */
  1103. static uint16_t FLASH_OB_GetWRP(void)
  1104. {
  1105. /* Return the FLASH write protection Register value */
  1106. return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
  1107. }
  1108. /**
  1109. * @brief Returns the FLASH Read Protection level.
  1110. * @retval FLASH ReadOut Protection Status:
  1111. * This parameter can be one of the following values:
  1112. * @arg OB_RDP_LEVEL_0: No protection
  1113. * @arg OB_RDP_LEVEL_1: Read protection of the memory
  1114. * @arg OB_RDP_LEVEL_2: Full chip protection
  1115. */
  1116. static uint8_t FLASH_OB_GetRDP(void)
  1117. {
  1118. uint8_t readstatus = OB_RDP_LEVEL_0;
  1119. if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2))
  1120. {
  1121. readstatus = OB_RDP_LEVEL_2;
  1122. }
  1123. else if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1))
  1124. {
  1125. readstatus = OB_RDP_LEVEL_1;
  1126. }
  1127. else
  1128. {
  1129. readstatus = OB_RDP_LEVEL_0;
  1130. }
  1131. return readstatus;
  1132. }
  1133. /**
  1134. * @brief Returns the FLASH BOR level.
  1135. * @retval uint8_t The FLASH BOR level:
  1136. * - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
  1137. * - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
  1138. * - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
  1139. * - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V
  1140. */
  1141. static uint8_t FLASH_OB_GetBOR(void)
  1142. {
  1143. /* Return the FLASH BOR level */
  1144. return (uint8_t)(*(__IO uint8_t *)(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0CU);
  1145. }
  1146. /**
  1147. * @brief Flush the instruction and data caches
  1148. * @retval None
  1149. */
  1150. void FLASH_FlushCaches(void)
  1151. {
  1152. /* Flush instruction cache */
  1153. if(READ_BIT(FLASH->ACR, FLASH_ACR_ICEN)!= RESET)
  1154. {
  1155. /* Disable instruction cache */
  1156. __HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
  1157. /* Reset instruction cache */
  1158. __HAL_FLASH_INSTRUCTION_CACHE_RESET();
  1159. /* Enable instruction cache */
  1160. __HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
  1161. }
  1162. /* Flush data cache */
  1163. if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET)
  1164. {
  1165. /* Disable data cache */
  1166. __HAL_FLASH_DATA_CACHE_DISABLE();
  1167. /* Reset data cache */
  1168. __HAL_FLASH_DATA_CACHE_RESET();
  1169. /* Enable data cache */
  1170. __HAL_FLASH_DATA_CACHE_ENABLE();
  1171. }
  1172. }
  1173. /**
  1174. * @}
  1175. */
  1176. #endif /* HAL_FLASH_MODULE_ENABLED */
  1177. /**
  1178. * @}
  1179. */
  1180. /**
  1181. * @}
  1182. */
  1183. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/