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  1. /**
  2. ******************************************************************************
  3. * @file stm32f0xx_hal_pcd.h
  4. * @author MCD Application Team
  5. * @brief Header file of PCD HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * 1. Redistributions of source code must retain the above copyright notice,
  14. * this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright notice,
  16. * this list of conditions and the following disclaimer in the documentation
  17. * and/or other materials provided with the distribution.
  18. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. ******************************************************************************
  34. */
  35. /* Define to prevent recursive inclusion -------------------------------------*/
  36. #ifndef __STM32F0xx_HAL_PCD_H
  37. #define __STM32F0xx_HAL_PCD_H
  38. #ifdef __cplusplus
  39. extern "C" {
  40. #endif
  41. #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB)|| defined(STM32F070x6)
  42. /* Includes ------------------------------------------------------------------*/
  43. #include "stm32f0xx_hal_def.h"
  44. /** @addtogroup STM32F0xx_HAL_Driver
  45. * @{
  46. */
  47. /** @addtogroup PCD
  48. * @{
  49. */
  50. /* Exported types ------------------------------------------------------------*/
  51. /** @defgroup PCD_Exported_Types PCD Exported Types
  52. * @{
  53. */
  54. /**
  55. * @brief PCD State structure definition
  56. */
  57. typedef enum
  58. {
  59. HAL_PCD_STATE_RESET = 0x00U,
  60. HAL_PCD_STATE_READY = 0x01U,
  61. HAL_PCD_STATE_ERROR = 0x02U,
  62. HAL_PCD_STATE_BUSY = 0x03U,
  63. HAL_PCD_STATE_TIMEOUT = 0x04U
  64. } PCD_StateTypeDef;
  65. /**
  66. * @brief PCD double buffered endpoint direction
  67. */
  68. typedef enum
  69. {
  70. PCD_EP_DBUF_OUT,
  71. PCD_EP_DBUF_IN,
  72. PCD_EP_DBUF_ERR,
  73. }PCD_EP_DBUF_DIR;
  74. /**
  75. * @brief PCD endpoint buffer number
  76. */
  77. typedef enum
  78. {
  79. PCD_EP_NOBUF,
  80. PCD_EP_BUF0,
  81. PCD_EP_BUF1
  82. }PCD_EP_BUF_NUM;
  83. /**
  84. * @brief PCD Initialization Structure definition
  85. */
  86. typedef struct
  87. {
  88. uint32_t dev_endpoints; /*!< Device Endpoints number.
  89. This parameter depends on the used USB core.
  90. This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
  91. uint32_t speed; /*!< USB Core speed.
  92. This parameter can be any value of @ref PCD_Core_Speed */
  93. uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size.
  94. This parameter can be any value of @ref PCD_EP0_MPS */
  95. uint32_t phy_itface; /*!< Select the used PHY interface.
  96. This parameter can be any value of @ref PCD_Core_PHY */
  97. uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal.
  98. This parameter can be set to ENABLE or DISABLE */
  99. uint32_t low_power_enable; /*!< Enable or disable Low Power mode
  100. This parameter can be set to ENABLE or DISABLE */
  101. uint32_t lpm_enable; /*!< Enable or disable the Link Power Management .
  102. This parameter can be set to ENABLE or DISABLE */
  103. uint32_t battery_charging_enable; /*!< Enable or disable Battery charging.
  104. This parameter can be set to ENABLE or DISABLE */
  105. }PCD_InitTypeDef;
  106. typedef struct
  107. {
  108. uint8_t num; /*!< Endpoint number
  109. This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
  110. uint8_t is_in; /*!< Endpoint direction
  111. This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
  112. uint8_t is_stall; /*!< Endpoint stall condition
  113. This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
  114. uint8_t type; /*!< Endpoint type
  115. This parameter can be any value of @ref PCD_EP_Type */
  116. uint16_t pmaadress; /*!< PMA Address
  117. This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
  118. uint16_t pmaaddr0; /*!< PMA Address0
  119. This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
  120. uint16_t pmaaddr1; /*!< PMA Address1
  121. This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
  122. uint8_t doublebuffer; /*!< Double buffer enable
  123. This parameter can be 0 or 1 */
  124. uint32_t maxpacket; /*!< Endpoint Max packet size
  125. This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
  126. uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
  127. uint32_t xfer_len; /*!< Current transfer length */
  128. uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
  129. }PCD_EPTypeDef;
  130. typedef USB_TypeDef PCD_TypeDef;
  131. /**
  132. * @brief PCD Handle Structure definition
  133. */
  134. typedef struct
  135. {
  136. PCD_TypeDef *Instance; /*!< Register base address */
  137. PCD_InitTypeDef Init; /*!< PCD required parameters */
  138. __IO uint8_t USB_Address; /*!< USB Address */
  139. PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
  140. PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
  141. HAL_LockTypeDef Lock; /*!< PCD peripheral status */
  142. __IO PCD_StateTypeDef State; /*!< PCD communication state */
  143. uint32_t Setup[12]; /*!< Setup packet buffer */
  144. void *pData; /*!< Pointer to upper stack Handler */
  145. } PCD_HandleTypeDef;
  146. /**
  147. * @}
  148. */
  149. /* Include PCD HAL Extension module */
  150. #include "stm32f0xx_hal_pcd_ex.h"
  151. /* Exported constants --------------------------------------------------------*/
  152. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  153. * @{
  154. */
  155. /** @defgroup PCD_Core_Speed PCD Core Speed
  156. * @{
  157. */
  158. #define PCD_SPEED_HIGH 0 /* Not Supported */
  159. #define PCD_SPEED_FULL 2
  160. /**
  161. * @}
  162. */
  163. /** @defgroup PCD_Core_PHY PCD Core PHY
  164. * @{
  165. */
  166. #define PCD_PHY_EMBEDDED 2
  167. /**
  168. * @}
  169. */
  170. /**
  171. * @}
  172. */
  173. /* Exported macros -----------------------------------------------------------*/
  174. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  175. * @brief macros to handle interrupts and specific clock configurations
  176. * @{
  177. */
  178. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISTR) & (__INTERRUPT__)) == (__INTERRUPT__))
  179. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISTR) &= (uint16_t)(~(__INTERRUPT__))))
  180. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE
  181. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
  182. #define __HAL_USB_EXTI_GENERATE_SWIT(__EXTILINE__) (EXTI->SWIER |= (__EXTILINE__))
  183. /**
  184. * @}
  185. */
  186. /* Exported functions --------------------------------------------------------*/
  187. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  188. * @{
  189. */
  190. /* Initialization/de-initialization functions ********************************/
  191. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  192. * @{
  193. */
  194. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  195. HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
  196. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  197. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  198. /**
  199. * @}
  200. */
  201. /* I/O operation functions ***************************************************/
  202. /* Non-Blocking mode: Interrupt */
  203. /** @addtogroup PCD_Exported_Functions_Group2 IO operation functions
  204. * @{
  205. */
  206. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  207. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  208. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  209. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  210. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  211. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  212. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  213. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  214. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  215. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  216. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  217. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  218. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  219. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  220. /**
  221. * @}
  222. */
  223. /* Peripheral Control functions **********************************************/
  224. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  225. * @{
  226. */
  227. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  228. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  229. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  230. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
  231. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  232. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  233. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  234. uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  235. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  236. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  237. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  238. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  239. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  240. /**
  241. * @}
  242. */
  243. /* Peripheral State functions ************************************************/
  244. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  245. * @{
  246. */
  247. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
  248. /**
  249. * @}
  250. */
  251. /**
  252. * @}
  253. */
  254. /* Private constants ---------------------------------------------------------*/
  255. /** @defgroup PCD_Private_Constants PCD Private Constants
  256. * @{
  257. */
  258. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  259. * @{
  260. */
  261. #define USB_WAKEUP_EXTI_LINE ((uint32_t)EXTI_IMR_MR18) /*!< External interrupt line 18 Connected to the USB FS EXTI Line */
  262. /**
  263. * @}
  264. */
  265. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  266. * @{
  267. */
  268. #define DEP0CTL_MPS_64 0
  269. #define DEP0CTL_MPS_32 1
  270. #define DEP0CTL_MPS_16 2
  271. #define DEP0CTL_MPS_8 3
  272. #define PCD_EP0MPS_64 DEP0CTL_MPS_64
  273. #define PCD_EP0MPS_32 DEP0CTL_MPS_32
  274. #define PCD_EP0MPS_16 DEP0CTL_MPS_16
  275. #define PCD_EP0MPS_08 DEP0CTL_MPS_8
  276. /**
  277. * @}
  278. */
  279. /** @defgroup PCD_EP_Type PCD EP Type
  280. * @{
  281. */
  282. #define PCD_EP_TYPE_CTRL 0
  283. #define PCD_EP_TYPE_ISOC 1
  284. #define PCD_EP_TYPE_BULK 2
  285. #define PCD_EP_TYPE_INTR 3
  286. /**
  287. * @}
  288. */
  289. /** @defgroup PCD_ENDP PCD ENDP
  290. * @{
  291. */
  292. #define PCD_ENDP0 ((uint8_t)0U)
  293. #define PCD_ENDP1 ((uint8_t)1U)
  294. #define PCD_ENDP2 ((uint8_t)2U)
  295. #define PCD_ENDP3 ((uint8_t)3U)
  296. #define PCD_ENDP4 ((uint8_t)4U)
  297. #define PCD_ENDP5 ((uint8_t)5U)
  298. #define PCD_ENDP6 ((uint8_t)6U)
  299. #define PCD_ENDP7 ((uint8_t)7U)
  300. /**
  301. * @}
  302. */
  303. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  304. * @{
  305. */
  306. #define PCD_SNG_BUF 0
  307. #define PCD_DBL_BUF 1
  308. /**
  309. * @}
  310. */
  311. /**
  312. * @}
  313. */
  314. /* Private macros ------------------------------------------------------------*/
  315. /** @addtogroup PCD_Private_Macros PCD Private Macros
  316. * @{
  317. */
  318. /* SetENDPOINT */
  319. #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*((uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U))))= (uint16_t)(wRegValue))
  320. /* GetENDPOINT */
  321. #define PCD_GET_ENDPOINT(USBx, bEpNum) (*((uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U)))))
  322. /**
  323. * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
  324. * @param USBx USB peripheral instance register address.
  325. * @param bEpNum Endpoint Number.
  326. * @param wType Endpoint Type.
  327. * @retval None
  328. */
  329. #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  330. ((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & ((uint32_t)(USB_EP_T_MASK))) | ((uint32_t)(wType)) )))
  331. /**
  332. * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
  333. * @param USBx USB peripheral instance register address.
  334. * @param bEpNum Endpoint Number.
  335. * @retval Endpoint Type
  336. */
  337. #define PCD_GET_EPTYPE(USBx, bEpNum) (((uint16_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_T_FIELD)
  338. /**
  339. * @brief free buffer used from the application realizing it to the line
  340. toggles bit SW_BUF in the double buffered endpoint register
  341. * @param USBx USB peripheral instance register address.
  342. * @param bEpNum Endpoint Number.
  343. * @param bDir Direction
  344. * @retval None
  345. */
  346. #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
  347. {\
  348. if ((bDir) == PCD_EP_DBUF_OUT)\
  349. { /* OUT double buffered endpoint */\
  350. PCD_TX_DTOG((USBx), (bEpNum));\
  351. }\
  352. else if ((bDir) == PCD_EP_DBUF_IN)\
  353. { /* IN double buffered endpoint */\
  354. PCD_RX_DTOG((USBx), (bEpNum));\
  355. }\
  356. }
  357. /**
  358. * @brief gets direction of the double buffered endpoint
  359. * @param USBx USB peripheral instance register address.
  360. * @param bEpNum Endpoint Number.
  361. * @retval EP_DBUF_OUT, EP_DBUF_IN,
  362. * EP_DBUF_ERR if the endpoint counter not yet programmed.
  363. */
  364. #define PCD_GET_DB_DIR(USBx, bEpNum)\
  365. {\
  366. if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00U) != 0U)\
  367. return(PCD_EP_DBUF_OUT);\
  368. else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FFU) != 0U)\
  369. return(PCD_EP_DBUF_IN);\
  370. else\
  371. return(PCD_EP_DBUF_ERR);\
  372. }
  373. /**
  374. * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
  375. * @param USBx USB peripheral instance register address.
  376. * @param bEpNum Endpoint Number.
  377. * @param wState new state
  378. * @retval None
  379. */
  380. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\
  381. \
  382. _wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPTX_DTOGMASK);\
  383. /* toggle first bit ? */ \
  384. if((USB_EPTX_DTOG1 & (wState))!= 0U)\
  385. { \
  386. _wRegVal ^=(uint16_t) USB_EPTX_DTOG1; \
  387. } \
  388. /* toggle second bit ? */ \
  389. if((USB_EPTX_DTOG2 & ((uint32_t)(wState)))!= 0U) \
  390. { \
  391. _wRegVal ^=(uint16_t) USB_EPTX_DTOG2; \
  392. } \
  393. PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) | USB_EP_CTR_RX|USB_EP_CTR_TX));\
  394. } /* PCD_SET_EP_TX_STATUS */
  395. /**
  396. * @brief sets the status for rx transfer (bits STAT_TX[1:0])
  397. * @param USBx USB peripheral instance register address.
  398. * @param bEpNum Endpoint Number.
  399. * @param wState new state
  400. * @retval None
  401. */
  402. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
  403. register uint16_t _wRegVal; \
  404. \
  405. _wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPRX_DTOGMASK);\
  406. /* toggle first bit ? */ \
  407. if((USB_EPRX_DTOG1 & (wState))!= 0U) \
  408. { \
  409. _wRegVal ^= (uint16_t) USB_EPRX_DTOG1; \
  410. } \
  411. /* toggle second bit ? */ \
  412. if((USB_EPRX_DTOG2 & ((uint32_t)(wState)))!= 0U) \
  413. { \
  414. _wRegVal ^= (uint16_t) USB_EPRX_DTOG2; \
  415. } \
  416. PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
  417. } /* PCD_SET_EP_RX_STATUS */
  418. /**
  419. * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  420. * @param USBx USB peripheral instance register address.
  421. * @param bEpNum Endpoint Number.
  422. * @param wStaterx new state.
  423. * @param wStatetx new state.
  424. * @retval None
  425. */
  426. #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\
  427. register uint32_t _wRegVal; \
  428. \
  429. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\
  430. /* toggle first bit ? */ \
  431. if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0U) \
  432. { \
  433. _wRegVal ^= USB_EPRX_DTOG1; \
  434. } \
  435. /* toggle second bit ? */ \
  436. if((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
  437. { \
  438. _wRegVal ^= USB_EPRX_DTOG2; \
  439. } \
  440. /* toggle first bit ? */ \
  441. if((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
  442. { \
  443. _wRegVal ^= USB_EPTX_DTOG1; \
  444. } \
  445. /* toggle second bit ? */ \
  446. if((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
  447. { \
  448. _wRegVal ^= USB_EPTX_DTOG2; \
  449. } \
  450. PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \
  451. } /* PCD_SET_EP_TXRX_STATUS */
  452. /**
  453. * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
  454. * /STAT_RX[1:0])
  455. * @param USBx USB peripheral instance register address.
  456. * @param bEpNum Endpoint Number.
  457. * @retval status
  458. */
  459. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPTX_STAT)
  460. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPRX_STAT)
  461. /**
  462. * @brief sets directly the VALID tx/rx-status into the endpoint register
  463. * @param USBx USB peripheral instance register address.
  464. * @param bEpNum Endpoint Number.
  465. * @retval None
  466. */
  467. #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  468. #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  469. /**
  470. * @brief checks stall condition in an endpoint.
  471. * @param USBx USB peripheral instance register address.
  472. * @param bEpNum Endpoint Number.
  473. * @retval TRUE = endpoint in stall condition.
  474. */
  475. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
  476. == USB_EP_TX_STALL)
  477. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
  478. == USB_EP_RX_STALL)
  479. /**
  480. * @brief set & clear EP_KIND bit.
  481. * @param USBx USB peripheral instance register address.
  482. * @param bEpNum Endpoint Number.
  483. * @retval None
  484. */
  485. #define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  486. (USB_EP_CTR_RX|USB_EP_CTR_TX|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) | USB_EP_KIND) & USB_EPREG_MASK))))
  487. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  488. (USB_EP_CTR_RX|USB_EP_CTR_TX|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPKIND_MASK))))
  489. /**
  490. * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
  491. * @param USBx USB peripheral instance register address.
  492. * @param bEpNum Endpoint Number.
  493. * @retval None
  494. */
  495. #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  496. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  497. /**
  498. * @brief Sets/clears directly EP_KIND bit in the endpoint register.
  499. * @param USBx USB peripheral instance register address.
  500. * @param bEpNum Endpoint Number.
  501. * @retval None
  502. */
  503. #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  504. #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  505. /**
  506. * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
  507. * @param USBx USB peripheral instance register address.
  508. * @param bEpNum Endpoint Number.
  509. * @retval None
  510. */
  511. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  512. PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFFU & USB_EPREG_MASK))
  513. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  514. PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7FU & USB_EPREG_MASK))
  515. /**
  516. * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  517. * @param USBx USB peripheral instance register address.
  518. * @param bEpNum Endpoint Number.
  519. * @retval None
  520. */
  521. #define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  522. USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK)))
  523. #define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  524. USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK)))
  525. /**
  526. * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  527. * @param USBx USB peripheral instance register address.
  528. * @param bEpNum Endpoint Number.
  529. * @retval None
  530. */
  531. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_RX) != 0)\
  532. { \
  533. PCD_RX_DTOG((USBx),(bEpNum));\
  534. }
  535. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_TX) != 0)\
  536. {\
  537. PCD_TX_DTOG((USBx),(bEpNum));\
  538. }
  539. /**
  540. * @brief Sets address in an endpoint register.
  541. * @param USBx USB peripheral instance register address.
  542. * @param bEpNum Endpoint Number.
  543. * @param bAddr Address.
  544. * @retval None
  545. */
  546. #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\
  547. USB_EP_CTR_RX|USB_EP_CTR_TX|(((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK) | (bAddr))
  548. /**
  549. * @brief Gets address in an endpoint register.
  550. * @param USBx USB peripheral instance register address.
  551. * @param bEpNum Endpoint Number.
  552. * @retval None
  553. */
  554. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  555. #define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8)+ ((uint32_t)(USBx) + 0x400U)))))
  556. #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8+2)+ ((uint32_t)(USBx) + 0x400U)))))
  557. #define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8+4)+ ((uint32_t)(USBx) + 0x400U)))))
  558. #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8+6)+ ((uint32_t)(USBx) + 0x400U)))))
  559. /**
  560. * @brief sets address of the tx/rx buffer.
  561. * @param USBx USB peripheral instance register address.
  562. * @param bEpNum Endpoint Number.
  563. * @param wAddr address to be set (must be word aligned).
  564. * @retval None
  565. */
  566. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U))
  567. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U))
  568. /**
  569. * @brief Gets address of the tx/rx buffer.
  570. * @param USBx USB peripheral instance register address.
  571. * @param bEpNum Endpoint Number.
  572. * @retval address of the buffer.
  573. */
  574. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  575. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  576. /**
  577. * @brief Sets counter of rx buffer with no. of blocks.
  578. * @param dwReg Register
  579. * @param wCount Counter.
  580. * @param wNBlocks no. of Blocks.
  581. * @retval None
  582. */
  583. #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
  584. (wNBlocks) = (wCount) >> 5U;\
  585. if(((wCount) & 0x1fU) == 0U)\
  586. { \
  587. (wNBlocks)--;\
  588. } \
  589. *pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10U) | (uint16_t)0x8000U); \
  590. }/* PCD_CALC_BLK32 */
  591. #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
  592. (wNBlocks) = (wCount) >> 1U;\
  593. if(((wCount) & 0x1U) != 0U)\
  594. { \
  595. (wNBlocks)++;\
  596. } \
  597. *pdwReg = (uint16_t)((wNBlocks) << 10U);\
  598. }/* PCD_CALC_BLK2 */
  599. #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\
  600. uint16_t wNBlocks;\
  601. if((wCount) > 62U) \
  602. { \
  603. PCD_CALC_BLK32((dwReg),(wCount),wNBlocks) \
  604. } \
  605. else \
  606. { \
  607. PCD_CALC_BLK2((dwReg),(wCount),wNBlocks) \
  608. } \
  609. }/* PCD_SET_EP_CNT_RX_REG */
  610. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\
  611. uint16_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \
  612. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount))\
  613. }
  614. /**
  615. * @brief sets counter for the tx/rx buffer.
  616. * @param USBx USB peripheral instance register address.
  617. * @param bEpNum Endpoint Number.
  618. * @param wCount Counter value.
  619. * @retval None
  620. */
  621. #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount))
  622. #define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\
  623. uint16_t *pdwReg =PCD_EP_RX_CNT((USBx),(bEpNum)); \
  624. PCD_SET_EP_CNT_RX_REG((pdwReg), (wCount))\
  625. }
  626. /**
  627. * @brief gets counter of the tx buffer.
  628. * @param USBx USB peripheral instance register address.
  629. * @param bEpNum Endpoint Number.
  630. * @retval Counter value
  631. */
  632. #define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
  633. #define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
  634. /**
  635. * @brief Sets buffer 0/1 address in a double buffer endpoint.
  636. * @param USBx USB peripheral instance register address.
  637. * @param bEpNum Endpoint Number.
  638. * @param wBuf0Addr buffer 0 address.
  639. * @retval Counter value
  640. */
  641. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) (PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)))
  642. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) (PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)))
  643. /**
  644. * @brief Sets addresses in a double buffer endpoint.
  645. * @param USBx USB peripheral instance register address.
  646. * @param bEpNum Endpoint Number.
  647. * @param wBuf0Addr buffer 0 address.
  648. * @param wBuf1Addr buffer 1 address.
  649. * @retval None
  650. */
  651. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
  652. PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\
  653. PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\
  654. } /* PCD_SET_EP_DBUF_ADDR */
  655. /**
  656. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  657. * @param USBx USB peripheral instance register address.
  658. * @param bEpNum Endpoint Number.
  659. * @retval None
  660. */
  661. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  662. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  663. /**
  664. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  665. * @param USBx USB peripheral instance register address.
  666. * @param bEpNum Endpoint Number.
  667. * @param bDir endpoint dir EP_DBUF_OUT = OUT
  668. * EP_DBUF_IN = IN
  669. * @param wCount Counter value
  670. * @retval None
  671. */
  672. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \
  673. if((bDir) == PCD_EP_DBUF_OUT)\
  674. /* OUT endpoint */ \
  675. {PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount))} \
  676. else if((bDir) == PCD_EP_DBUF_IN)\
  677. { \
  678. *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
  679. } \
  680. } /* SetEPDblBuf0Count*/
  681. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \
  682. if((bDir) == PCD_EP_DBUF_OUT)\
  683. {/* OUT endpoint */ \
  684. PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)) \
  685. } \
  686. else if((bDir) == PCD_EP_DBUF_IN)\
  687. {/* IN endpoint */ \
  688. *PCD_EP_RX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
  689. } \
  690. } /* SetEPDblBuf1Count */
  691. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\
  692. PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)) \
  693. PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)) \
  694. } /* PCD_SET_EP_DBUF_CNT */
  695. /**
  696. * @brief Gets buffer 0/1 rx/tx counter for double buffering.
  697. * @param USBx USB peripheral instance register address.
  698. * @param bEpNum Endpoint Number.
  699. * @retval None
  700. */
  701. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  702. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  703. /** @defgroup PCD_Instance_definition PCD Instance definition
  704. * @{
  705. */
  706. #define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE
  707. /**
  708. * @}
  709. */
  710. /**
  711. * @}
  712. */
  713. /**
  714. * @}
  715. */
  716. /**
  717. * @}
  718. */
  719. #endif /* STM32F042x6 || STM32F072xB || STM32F078xx || STM32F070xB || STM32F070x6 */
  720. #ifdef __cplusplus
  721. }
  722. #endif
  723. #endif /* __STM32F0xx_HAL_PCD_H */
  724. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/