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  1. ;********************** COPYRIGHT(c) 2017 STMicroelectronics ******************
  2. ;* File Name : startup_stm32l485xx.s
  3. ;* Author : MCD Application Team
  4. ;* Version : V1.3.2
  5. ;* Date : 16-June-2017
  6. ;* Description : STM32L485xx Ultra Low Power devices vector table for MDK-ARM toolchain.
  7. ;* This module performs:
  8. ;* - Set the initial SP
  9. ;* - Set the initial PC == Reset_Handler
  10. ;* - Set the vector table entries with the exceptions ISR address
  11. ;* - Branches to __main in the C library (which eventually
  12. ;* calls main()).
  13. ;* After Reset the Cortex-M4 processor is in Thread mode,
  14. ;* priority is Privileged, and the Stack is set to Main.
  15. ;* <<< Use Configuration Wizard in Context Menu >>>
  16. ;*******************************************************************************
  17. ;*
  18. ;* Redistribution and use in source and binary forms, with or without modification,
  19. ;* are permitted provided that the following conditions are met:
  20. ;* 1. Redistributions of source code must retain the above copyright notice,
  21. ;* this list of conditions and the following disclaimer.
  22. ;* 2. Redistributions in binary form must reproduce the above copyright notice,
  23. ;* this list of conditions and the following disclaimer in the documentation
  24. ;* and/or other materials provided with the distribution.
  25. ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
  26. ;* may be used to endorse or promote products derived from this software
  27. ;* without specific prior written permission.
  28. ;*
  29. ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  30. ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  31. ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  32. ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  33. ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  34. ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  35. ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  36. ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  37. ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38. ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39. ;*
  40. ;*******************************************************************************
  41. ;
  42. ; Amount of memory (in bytes) allocated for Stack
  43. ; Tailor this value to your application needs
  44. ; <h> Stack Configuration
  45. ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  46. ; </h>
  47. Stack_Size EQU 0x400;
  48. AREA STACK, NOINIT, READWRITE, ALIGN=3
  49. Stack_Mem SPACE Stack_Size
  50. __initial_sp
  51. ; <h> Heap Configuration
  52. ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  53. ; </h>
  54. Heap_Size EQU 0x200;
  55. AREA HEAP, NOINIT, READWRITE, ALIGN=3
  56. __heap_base
  57. Heap_Mem SPACE Heap_Size
  58. __heap_limit
  59. PRESERVE8
  60. THUMB
  61. ; Vector Table Mapped to Address 0 at Reset
  62. AREA RESET, DATA, READONLY
  63. EXPORT __Vectors
  64. EXPORT __Vectors_End
  65. EXPORT __Vectors_Size
  66. __Vectors DCD __initial_sp ; Top of Stack
  67. DCD Reset_Handler ; Reset Handler
  68. DCD NMI_Handler ; NMI Handler
  69. DCD HardFault_Handler ; Hard Fault Handler
  70. DCD MemManage_Handler ; MPU Fault Handler
  71. DCD BusFault_Handler ; Bus Fault Handler
  72. DCD UsageFault_Handler ; Usage Fault Handler
  73. DCD 0 ; Reserved
  74. DCD 0 ; Reserved
  75. DCD 0 ; Reserved
  76. DCD 0 ; Reserved
  77. DCD SVC_Handler ; SVCall Handler
  78. DCD DebugMon_Handler ; Debug Monitor Handler
  79. DCD 0 ; Reserved
  80. DCD PendSV_Handler ; PendSV Handler
  81. DCD SysTick_Handler ; SysTick Handler
  82. ; External Interrupts
  83. DCD WWDG_IRQHandler ; Window WatchDog
  84. DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
  85. DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
  86. DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
  87. DCD FLASH_IRQHandler ; FLASH
  88. DCD RCC_IRQHandler ; RCC
  89. DCD EXTI0_IRQHandler ; EXTI Line0
  90. DCD EXTI1_IRQHandler ; EXTI Line1
  91. DCD EXTI2_IRQHandler ; EXTI Line2
  92. DCD EXTI3_IRQHandler ; EXTI Line3
  93. DCD EXTI4_IRQHandler ; EXTI Line4
  94. DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
  95. DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
  96. DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
  97. DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
  98. DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
  99. DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
  100. DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
  101. DCD ADC1_2_IRQHandler ; ADC1, ADC2
  102. DCD CAN1_TX_IRQHandler ; CAN1 TX
  103. DCD CAN1_RX0_IRQHandler ; CAN1 RX0
  104. DCD CAN1_RX1_IRQHandler ; CAN1 RX1
  105. DCD CAN1_SCE_IRQHandler ; CAN1 SCE
  106. DCD EXTI9_5_IRQHandler ; External Line[9:5]s
  107. DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
  108. DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
  109. DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17
  110. DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
  111. DCD TIM2_IRQHandler ; TIM2
  112. DCD TIM3_IRQHandler ; TIM3
  113. DCD TIM4_IRQHandler ; TIM4
  114. DCD I2C1_EV_IRQHandler ; I2C1 Event
  115. DCD I2C1_ER_IRQHandler ; I2C1 Error
  116. DCD I2C2_EV_IRQHandler ; I2C2 Event
  117. DCD I2C2_ER_IRQHandler ; I2C2 Error
  118. DCD SPI1_IRQHandler ; SPI1
  119. DCD SPI2_IRQHandler ; SPI2
  120. DCD USART1_IRQHandler ; USART1
  121. DCD USART2_IRQHandler ; USART2
  122. DCD USART3_IRQHandler ; USART3
  123. DCD EXTI15_10_IRQHandler ; External Line[15:10]
  124. DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
  125. DCD DFSDM1_FLT3_IRQHandler ; DFSDM1 Filter 3 global Interrupt
  126. DCD TIM8_BRK_IRQHandler ; TIM8 Break Interrupt
  127. DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
  128. DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation Interrupt
  129. DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
  130. DCD ADC3_IRQHandler ; ADC3 global Interrupt
  131. DCD FMC_IRQHandler ; FMC
  132. DCD SDMMC1_IRQHandler ; SDMMC1
  133. DCD TIM5_IRQHandler ; TIM5
  134. DCD SPI3_IRQHandler ; SPI3
  135. DCD UART4_IRQHandler ; UART4
  136. DCD UART5_IRQHandler ; UART5
  137. DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
  138. DCD TIM7_IRQHandler ; TIM7
  139. DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
  140. DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
  141. DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
  142. DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
  143. DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
  144. DCD DFSDM1_FLT0_IRQHandler ; DFSDM1 Filter 0 global Interrupt
  145. DCD DFSDM1_FLT1_IRQHandler ; DFSDM1 Filter 1 global Interrupt
  146. DCD DFSDM1_FLT2_IRQHandler ; DFSDM1 Filter 2 global Interrupt
  147. DCD COMP_IRQHandler ; COMP Interrupt
  148. DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
  149. DCD LPTIM2_IRQHandler ; LP TIM2 interrupt
  150. DCD OTG_FS_IRQHandler ; USB OTG FS
  151. DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
  152. DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
  153. DCD LPUART1_IRQHandler ; LP UART1 interrupt
  154. DCD QUADSPI_IRQHandler ; Quad SPI global interrupt
  155. DCD I2C3_EV_IRQHandler ; I2C3 event
  156. DCD I2C3_ER_IRQHandler ; I2C3 error
  157. DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
  158. DCD SAI2_IRQHandler ; Serial Audio Interface 2 global interrupt
  159. DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt
  160. DCD TSC_IRQHandler ; Touch Sense Controller global interrupt
  161. DCD 0 ; Reserved
  162. DCD AES_IRQHandler ; AES global interrupt
  163. DCD RNG_IRQHandler ; RNG global interrupt
  164. DCD FPU_IRQHandler ; FPU
  165. __Vectors_End
  166. __Vectors_Size EQU __Vectors_End - __Vectors
  167. AREA |.text|, CODE, READONLY
  168. ; Reset handler
  169. Reset_Handler PROC
  170. EXPORT Reset_Handler [WEAK]
  171. IMPORT SystemInit
  172. IMPORT __main
  173. LDR R0, =SystemInit
  174. BLX R0
  175. LDR R0, =__main
  176. BX R0
  177. ENDP
  178. ; Dummy Exception Handlers (infinite loops which can be modified)
  179. NMI_Handler PROC
  180. EXPORT NMI_Handler [WEAK]
  181. B .
  182. ENDP
  183. HardFault_Handler\
  184. PROC
  185. EXPORT HardFault_Handler [WEAK]
  186. B .
  187. ENDP
  188. MemManage_Handler\
  189. PROC
  190. EXPORT MemManage_Handler [WEAK]
  191. B .
  192. ENDP
  193. BusFault_Handler\
  194. PROC
  195. EXPORT BusFault_Handler [WEAK]
  196. B .
  197. ENDP
  198. UsageFault_Handler\
  199. PROC
  200. EXPORT UsageFault_Handler [WEAK]
  201. B .
  202. ENDP
  203. SVC_Handler PROC
  204. EXPORT SVC_Handler [WEAK]
  205. B .
  206. ENDP
  207. DebugMon_Handler\
  208. PROC
  209. EXPORT DebugMon_Handler [WEAK]
  210. B .
  211. ENDP
  212. PendSV_Handler PROC
  213. EXPORT PendSV_Handler [WEAK]
  214. B .
  215. ENDP
  216. SysTick_Handler PROC
  217. EXPORT SysTick_Handler [WEAK]
  218. B .
  219. ENDP
  220. Default_Handler PROC
  221. EXPORT WWDG_IRQHandler [WEAK]
  222. EXPORT PVD_PVM_IRQHandler [WEAK]
  223. EXPORT TAMP_STAMP_IRQHandler [WEAK]
  224. EXPORT RTC_WKUP_IRQHandler [WEAK]
  225. EXPORT FLASH_IRQHandler [WEAK]
  226. EXPORT RCC_IRQHandler [WEAK]
  227. EXPORT EXTI0_IRQHandler [WEAK]
  228. EXPORT EXTI1_IRQHandler [WEAK]
  229. EXPORT EXTI2_IRQHandler [WEAK]
  230. EXPORT EXTI3_IRQHandler [WEAK]
  231. EXPORT EXTI4_IRQHandler [WEAK]
  232. EXPORT DMA1_Channel1_IRQHandler [WEAK]
  233. EXPORT DMA1_Channel2_IRQHandler [WEAK]
  234. EXPORT DMA1_Channel3_IRQHandler [WEAK]
  235. EXPORT DMA1_Channel4_IRQHandler [WEAK]
  236. EXPORT DMA1_Channel5_IRQHandler [WEAK]
  237. EXPORT DMA1_Channel6_IRQHandler [WEAK]
  238. EXPORT DMA1_Channel7_IRQHandler [WEAK]
  239. EXPORT ADC1_2_IRQHandler [WEAK]
  240. EXPORT CAN1_TX_IRQHandler [WEAK]
  241. EXPORT CAN1_RX0_IRQHandler [WEAK]
  242. EXPORT CAN1_RX1_IRQHandler [WEAK]
  243. EXPORT CAN1_SCE_IRQHandler [WEAK]
  244. EXPORT EXTI9_5_IRQHandler [WEAK]
  245. EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
  246. EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
  247. EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
  248. EXPORT TIM1_CC_IRQHandler [WEAK]
  249. EXPORT TIM2_IRQHandler [WEAK]
  250. EXPORT TIM3_IRQHandler [WEAK]
  251. EXPORT TIM4_IRQHandler [WEAK]
  252. EXPORT I2C1_EV_IRQHandler [WEAK]
  253. EXPORT I2C1_ER_IRQHandler [WEAK]
  254. EXPORT I2C2_EV_IRQHandler [WEAK]
  255. EXPORT I2C2_ER_IRQHandler [WEAK]
  256. EXPORT SPI1_IRQHandler [WEAK]
  257. EXPORT SPI2_IRQHandler [WEAK]
  258. EXPORT USART1_IRQHandler [WEAK]
  259. EXPORT USART2_IRQHandler [WEAK]
  260. EXPORT USART3_IRQHandler [WEAK]
  261. EXPORT EXTI15_10_IRQHandler [WEAK]
  262. EXPORT RTC_Alarm_IRQHandler [WEAK]
  263. EXPORT DFSDM1_FLT3_IRQHandler [WEAK]
  264. EXPORT TIM8_BRK_IRQHandler [WEAK]
  265. EXPORT TIM8_UP_IRQHandler [WEAK]
  266. EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
  267. EXPORT TIM8_CC_IRQHandler [WEAK]
  268. EXPORT ADC3_IRQHandler [WEAK]
  269. EXPORT FMC_IRQHandler [WEAK]
  270. EXPORT SDMMC1_IRQHandler [WEAK]
  271. EXPORT TIM5_IRQHandler [WEAK]
  272. EXPORT SPI3_IRQHandler [WEAK]
  273. EXPORT UART4_IRQHandler [WEAK]
  274. EXPORT UART5_IRQHandler [WEAK]
  275. EXPORT TIM6_DAC_IRQHandler [WEAK]
  276. EXPORT TIM7_IRQHandler [WEAK]
  277. EXPORT DMA2_Channel1_IRQHandler [WEAK]
  278. EXPORT DMA2_Channel2_IRQHandler [WEAK]
  279. EXPORT DMA2_Channel3_IRQHandler [WEAK]
  280. EXPORT DMA2_Channel4_IRQHandler [WEAK]
  281. EXPORT DMA2_Channel5_IRQHandler [WEAK]
  282. EXPORT DFSDM1_FLT0_IRQHandler [WEAK]
  283. EXPORT DFSDM1_FLT1_IRQHandler [WEAK]
  284. EXPORT DFSDM1_FLT2_IRQHandler [WEAK]
  285. EXPORT COMP_IRQHandler [WEAK]
  286. EXPORT LPTIM1_IRQHandler [WEAK]
  287. EXPORT LPTIM2_IRQHandler [WEAK]
  288. EXPORT OTG_FS_IRQHandler [WEAK]
  289. EXPORT DMA2_Channel6_IRQHandler [WEAK]
  290. EXPORT DMA2_Channel7_IRQHandler [WEAK]
  291. EXPORT LPUART1_IRQHandler [WEAK]
  292. EXPORT QUADSPI_IRQHandler [WEAK]
  293. EXPORT I2C3_EV_IRQHandler [WEAK]
  294. EXPORT I2C3_ER_IRQHandler [WEAK]
  295. EXPORT SAI1_IRQHandler [WEAK]
  296. EXPORT SAI2_IRQHandler [WEAK]
  297. EXPORT SWPMI1_IRQHandler [WEAK]
  298. EXPORT TSC_IRQHandler [WEAK]
  299. EXPORT AES_IRQHandler [WEAK]
  300. EXPORT RNG_IRQHandler [WEAK]
  301. EXPORT FPU_IRQHandler [WEAK]
  302. WWDG_IRQHandler
  303. PVD_PVM_IRQHandler
  304. TAMP_STAMP_IRQHandler
  305. RTC_WKUP_IRQHandler
  306. FLASH_IRQHandler
  307. RCC_IRQHandler
  308. EXTI0_IRQHandler
  309. EXTI1_IRQHandler
  310. EXTI2_IRQHandler
  311. EXTI3_IRQHandler
  312. EXTI4_IRQHandler
  313. DMA1_Channel1_IRQHandler
  314. DMA1_Channel2_IRQHandler
  315. DMA1_Channel3_IRQHandler
  316. DMA1_Channel4_IRQHandler
  317. DMA1_Channel5_IRQHandler
  318. DMA1_Channel6_IRQHandler
  319. DMA1_Channel7_IRQHandler
  320. ADC1_2_IRQHandler
  321. CAN1_TX_IRQHandler
  322. CAN1_RX0_IRQHandler
  323. CAN1_RX1_IRQHandler
  324. CAN1_SCE_IRQHandler
  325. EXTI9_5_IRQHandler
  326. TIM1_BRK_TIM15_IRQHandler
  327. TIM1_UP_TIM16_IRQHandler
  328. TIM1_TRG_COM_TIM17_IRQHandler
  329. TIM1_CC_IRQHandler
  330. TIM2_IRQHandler
  331. TIM3_IRQHandler
  332. TIM4_IRQHandler
  333. I2C1_EV_IRQHandler
  334. I2C1_ER_IRQHandler
  335. I2C2_EV_IRQHandler
  336. I2C2_ER_IRQHandler
  337. SPI1_IRQHandler
  338. SPI2_IRQHandler
  339. USART1_IRQHandler
  340. USART2_IRQHandler
  341. USART3_IRQHandler
  342. EXTI15_10_IRQHandler
  343. RTC_Alarm_IRQHandler
  344. DFSDM1_FLT3_IRQHandler
  345. TIM8_BRK_IRQHandler
  346. TIM8_UP_IRQHandler
  347. TIM8_TRG_COM_IRQHandler
  348. TIM8_CC_IRQHandler
  349. ADC3_IRQHandler
  350. FMC_IRQHandler
  351. SDMMC1_IRQHandler
  352. TIM5_IRQHandler
  353. SPI3_IRQHandler
  354. UART4_IRQHandler
  355. UART5_IRQHandler
  356. TIM6_DAC_IRQHandler
  357. TIM7_IRQHandler
  358. DMA2_Channel1_IRQHandler
  359. DMA2_Channel2_IRQHandler
  360. DMA2_Channel3_IRQHandler
  361. DMA2_Channel4_IRQHandler
  362. DMA2_Channel5_IRQHandler
  363. DFSDM1_FLT0_IRQHandler
  364. DFSDM1_FLT1_IRQHandler
  365. DFSDM1_FLT2_IRQHandler
  366. COMP_IRQHandler
  367. LPTIM1_IRQHandler
  368. LPTIM2_IRQHandler
  369. OTG_FS_IRQHandler
  370. DMA2_Channel6_IRQHandler
  371. DMA2_Channel7_IRQHandler
  372. LPUART1_IRQHandler
  373. QUADSPI_IRQHandler
  374. I2C3_EV_IRQHandler
  375. I2C3_ER_IRQHandler
  376. SAI1_IRQHandler
  377. SAI2_IRQHandler
  378. SWPMI1_IRQHandler
  379. TSC_IRQHandler
  380. AES_IRQHandler
  381. RNG_IRQHandler
  382. FPU_IRQHandler
  383. B .
  384. ENDP
  385. ALIGN
  386. ;*******************************************************************************
  387. ; User Stack and Heap initialization
  388. ;*******************************************************************************
  389. IF :DEF:__MICROLIB
  390. EXPORT __initial_sp
  391. EXPORT __heap_base
  392. EXPORT __heap_limit
  393. ELSE
  394. IMPORT __use_two_region_memory
  395. EXPORT __user_initial_stackheap
  396. __user_initial_stackheap
  397. LDR R0, = Heap_Mem
  398. LDR R1, =(Stack_Mem + Stack_Size)
  399. LDR R2, = (Heap_Mem + Heap_Size)
  400. LDR R3, = Stack_Mem
  401. BX LR
  402. ALIGN
  403. ENDIF
  404. END
  405. ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****