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stm32lib/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_hsem.h

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  1. /**

  2.   ******************************************************************************

  3.   * @file    stm32h7xx_ll_hsem.h

  4.   * @author  MCD Application Team

  5.   * @brief   Header file of HSEM LL module.

  6.   ******************************************************************************

  7.   * @attention

  8.   *

  9.   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.

  10.   * All rights reserved.</center></h2>

  11.   *

  12.   * This software component is licensed by ST under BSD 3-Clause license,

  13.   * the "License"; You may not use this file except in compliance with the

  14.   * License. You may obtain a copy of the License at:

  15.   *                        opensource.org/licenses/BSD-3-Clause

  16.   *

  17.   ******************************************************************************

  18.   */

  19. 

  20. /* Define to prevent recursive inclusion -------------------------------------*/

  21. #ifndef STM32H7xx_LL_HSEM_H

  22. #define STM32H7xx_LL_HSEM_H

  23. 

  24. #ifdef __cplusplus

  25. extern "C" {

  26. #endif

  27. 

  28. /* Includes ------------------------------------------------------------------*/

  29. #include "stm32h7xx.h"

  30. 

  31. /** @addtogroup STM32H7xx_LL_Driver

  32.   * @{

  33.   */

  34. 

  35. #if defined(HSEM)

  36. 

  37. /** @defgroup HSEM_LL HSEM

  38.   * @{

  39.   */

  40. 

  41. /* Private types -------------------------------------------------------------*/

  42. /* Private variables ---------------------------------------------------------*/

  43. /* Private constants ---------------------------------------------------------*/

  44. /* Private macros ------------------------------------------------------------*/

  45. 

  46. /* Exported types ------------------------------------------------------------*/

  47. /* Exported constants --------------------------------------------------------*/

  48. 

  49. /** @defgroup HSEM_LL_Exported_Constants HSEM Exported Constants

  50.   * @{

  51.   */

  52. 

  53. /** @defgroup HSEM_LL_EC_COREID COREID Defines

  54.   * @{

  55.   */

  56. #define LL_HSEM_COREID_NONE             0U

  57. #define LL_HSEM_COREID_CPU1             HSEM_CR_COREID_CPU1

  58. #if defined(DUAL_CORE)

  59. #define LL_HSEM_COREID_CPU2             HSEM_CR_COREID_CPU2

  60. #endif /* DUAL_CORE */

  61. #define LL_HSEM_COREID                  HSEM_CR_COREID_CURRENT

  62. /**

  63.   * @}

  64.   */

  65. 

  66. /** @defgroup HSEM_LL_EC_GET_FLAG Get Flags Defines

  67.   * @brief    Flags defines which can be used with LL_HSEM_ReadReg function

  68.   * @{

  69.   */

  70. 

  71. #define LL_HSEM_SEMAPHORE_0                HSEM_C1IER_ISE0

  72. #define LL_HSEM_SEMAPHORE_1                HSEM_C1IER_ISE1

  73. #define LL_HSEM_SEMAPHORE_2                HSEM_C1IER_ISE2

  74. #define LL_HSEM_SEMAPHORE_3                HSEM_C1IER_ISE3

  75. #define LL_HSEM_SEMAPHORE_4                HSEM_C1IER_ISE4

  76. #define LL_HSEM_SEMAPHORE_5                HSEM_C1IER_ISE5

  77. #define LL_HSEM_SEMAPHORE_6                HSEM_C1IER_ISE6

  78. #define LL_HSEM_SEMAPHORE_7                HSEM_C1IER_ISE7

  79. #define LL_HSEM_SEMAPHORE_8                HSEM_C1IER_ISE8

  80. #define LL_HSEM_SEMAPHORE_9                HSEM_C1IER_ISE9

  81. #define LL_HSEM_SEMAPHORE_10               HSEM_C1IER_ISE10

  82. #define LL_HSEM_SEMAPHORE_11               HSEM_C1IER_ISE11

  83. #define LL_HSEM_SEMAPHORE_12               HSEM_C1IER_ISE12

  84. #define LL_HSEM_SEMAPHORE_13               HSEM_C1IER_ISE13

  85. #define LL_HSEM_SEMAPHORE_14               HSEM_C1IER_ISE14

  86. #define LL_HSEM_SEMAPHORE_15               HSEM_C1IER_ISE15

  87. #define LL_HSEM_SEMAPHORE_16               HSEM_C1IER_ISE16

  88. #define LL_HSEM_SEMAPHORE_17               HSEM_C1IER_ISE17

  89. #define LL_HSEM_SEMAPHORE_18               HSEM_C1IER_ISE18

  90. #define LL_HSEM_SEMAPHORE_19               HSEM_C1IER_ISE19

  91. #define LL_HSEM_SEMAPHORE_20               HSEM_C1IER_ISE20

  92. #define LL_HSEM_SEMAPHORE_21               HSEM_C1IER_ISE21

  93. #define LL_HSEM_SEMAPHORE_22               HSEM_C1IER_ISE22

  94. #define LL_HSEM_SEMAPHORE_23               HSEM_C1IER_ISE23

  95. #define LL_HSEM_SEMAPHORE_24               HSEM_C1IER_ISE24

  96. #define LL_HSEM_SEMAPHORE_25               HSEM_C1IER_ISE25

  97. #define LL_HSEM_SEMAPHORE_26               HSEM_C1IER_ISE26

  98. #define LL_HSEM_SEMAPHORE_27               HSEM_C1IER_ISE27

  99. #define LL_HSEM_SEMAPHORE_28               HSEM_C1IER_ISE28

  100. #define LL_HSEM_SEMAPHORE_29               HSEM_C1IER_ISE29

  101. #define LL_HSEM_SEMAPHORE_30               HSEM_C1IER_ISE30

  102. #define LL_HSEM_SEMAPHORE_31               HSEM_C1IER_ISE31

  103. #define LL_HSEM_SEMAPHORE_ALL              0xFFFFFFFFU

  104. /**

  105.   * @}

  106.   */

  107. 

  108. /**

  109.   * @}

  110.   */

  111. 

  112. /* Exported macro ------------------------------------------------------------*/

  113. /** @defgroup HSEM_LL_Exported_Macros HSEM Exported Macros

  114.   * @{

  115.   */

  116. 

  117. /** @defgroup HSEM_LL_EM_WRITE_READ Common Write and read registers Macros

  118.   * @{

  119.   */

  120. 

  121. /**

  122.   * @brief  Write a value in HSEM register

  123.   * @param  __INSTANCE__ HSEM Instance

  124.   * @param  __REG__ Register to be written

  125.   * @param  __VALUE__ Value to be written in the register

  126.   * @retval None

  127.   */

  128. #define LL_HSEM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))

  129. 

  130. /**

  131.   * @brief  Read a value in HSEM register

  132.   * @param  __INSTANCE__ HSEM Instance

  133.   * @param  __REG__ Register to be read

  134.   * @retval Register value

  135.   */

  136. #define LL_HSEM_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)

  137. /**

  138.   * @}

  139.   */

  140. 

  141. /**

  142.   * @}

  143.   */

  144. 

  145. /* Exported functions --------------------------------------------------------*/

  146. /** @defgroup HSEM_LL_Exported_Functions HSEM Exported Functions

  147.   * @{

  148.   */

  149. 

  150. /** @defgroup HSEM_LL_EF_Data_Management Data_Management

  151.   * @{

  152.   */

  153. 

  154. 

  155. /**

  156.   * @brief  Return 1 if the semaphore is locked, else return 0.

  157.   * @rmtoll R            LOCK          LL_HSEM_IsSemaphoreLocked

  158.   * @param  HSEMx HSEM Instance.

  159.   * @param  Semaphore Semaphore number. Value between Min_Data=0 and Max_Data=31

  160.   * @retval State of bit (1 or 0).

  161.   */

  162. __STATIC_INLINE uint32_t LL_HSEM_IsSemaphoreLocked(HSEM_TypeDef *HSEMx, uint32_t Semaphore)

  163. {

  164.   return ((READ_BIT(HSEMx->R[Semaphore], HSEM_R_LOCK) == (HSEM_R_LOCK_Msk)) ? 1UL : 0UL);

  165. }

  166. 

  167. /**

  168.   * @brief  Get core id.

  169.   * @rmtoll R            COREID        LL_HSEM_GetCoreId

  170.   * @param  HSEMx HSEM Instance.

  171.   * @param  Semaphore Semaphore number. Value between Min_Data=0 and Max_Data=31

  172.   * @retval Returned value can be one of the following values:

  173.   *         @arg @ref LL_HSEM_COREID_NONE

  174.   *         @arg @ref LL_HSEM_COREID_CPU1

  175.   *         @arg @ref LL_HSEM_COREID_CPU2

  176.   */

  177. __STATIC_INLINE uint32_t LL_HSEM_GetCoreId(HSEM_TypeDef *HSEMx, uint32_t Semaphore)

  178. {

  179.   return (uint32_t)(READ_BIT(HSEMx->R[Semaphore], HSEM_R_COREID_Msk));

  180. }

  181. 

  182. /**

  183.   * @brief  Get process id.

  184.   * @rmtoll R            PROCID        LL_HSEM_GetProcessId

  185.   * @param  HSEMx HSEM Instance.

  186.   * @param  Semaphore Semaphore number. Value between Min_Data=0 and Max_Data=31

  187.   * @retval Process number. Value between Min_Data=0 and Max_Data=255

  188.   */

  189. __STATIC_INLINE uint32_t LL_HSEM_GetProcessId(HSEM_TypeDef *HSEMx, uint32_t Semaphore)

  190. {

  191.   return (uint32_t)(READ_BIT(HSEMx->R[Semaphore], HSEM_R_PROCID_Msk));

  192. }

  193. 

  194. /**

  195.   * @brief  Get the lock by writing in R register.

  196.   * @note The R register has to be read to determined if the lock is taken.

  197.   * @rmtoll R            LOCK          LL_HSEM_SetLock

  198.   * @rmtoll R            COREID        LL_HSEM_SetLock

  199.   * @rmtoll R            PROCID        LL_HSEM_SetLock

  200.   * @param  HSEMx HSEM Instance.

  201.   * @param  Semaphore Semaphore number. Value between Min_Data=0 and Max_Data=31

  202.   * @param  process Process id. Value between Min_Data=0 and Max_Data=255

  203.   * @retval None

  204.   */

  205. __STATIC_INLINE void LL_HSEM_SetLock(HSEM_TypeDef *HSEMx, uint32_t Semaphore, uint32_t process)

  206. {

  207.   WRITE_REG(HSEMx->R[Semaphore], (HSEM_R_LOCK | LL_HSEM_COREID | process));

  208. }

  209. 

  210. /**

  211.   * @brief  Get the lock with 2-step lock.

  212.   * @rmtoll R            LOCK          LL_HSEM_2StepLock

  213.   * @rmtoll R            COREID        LL_HSEM_2StepLock

  214.   * @rmtoll R            PROCID        LL_HSEM_2StepLock

  215.   * @param  HSEMx HSEM Instance.

  216.   * @param  Semaphore Semaphore number. Value between Min_Data=0 and Max_Data=31

  217.   * @param  process Process id. Value between Min_Data=0 and Max_Data=255

  218.   * @retval 1 lock fail, 0 lock successful or already locked by same process and core

  219.   */

  220. __STATIC_INLINE uint32_t LL_HSEM_2StepLock(HSEM_TypeDef *HSEMx, uint32_t Semaphore, uint32_t process)

  221. {

  222.   WRITE_REG(HSEMx->R[Semaphore], (HSEM_R_LOCK | LL_HSEM_COREID | process));

  223.   return ((HSEMx->R[Semaphore] != (HSEM_R_LOCK | LL_HSEM_COREID | process)) ? 1UL : 0UL);

  224. }

  225. 

  226. /**

  227.   * @brief  Get the lock with 1-step lock.

  228.   * @rmtoll RLR          LOCK          LL_HSEM_1StepLock

  229.   * @rmtoll RLR          COREID        LL_HSEM_1StepLock

  230.   * @rmtoll RLR          PROCID        LL_HSEM_1StepLock

  231.   * @param  HSEMx HSEM Instance.

  232.   * @param  Semaphore Semaphore number. Value between Min_Data=0 and Max_Data=31

  233.   * @retval 1 lock fail, 0 lock successful or already locked by same core

  234.   */

  235. __STATIC_INLINE uint32_t LL_HSEM_1StepLock(HSEM_TypeDef *HSEMx, uint32_t Semaphore)

  236. {

  237.   return ((HSEMx->RLR[Semaphore] != (HSEM_R_LOCK | LL_HSEM_COREID)) ? 1UL : 0UL);

  238. }

  239. 

  240. /**

  241.   * @brief  Release the lock of the semaphore.

  242.   * @note In case of LL_HSEM_1StepLock usage to lock a semaphore, the process is 0.

  243.   * @rmtoll R            LOCK          LL_HSEM_ReleaseLock

  244.   * @param  HSEMx HSEM Instance.

  245.   * @param  Semaphore Semaphore number. Value between Min_Data=0 and Max_Data=31

  246.   * @param  process Process number. Value between Min_Data=0 and Max_Data=255

  247.   * @retval None

  248.   */

  249. __STATIC_INLINE void LL_HSEM_ReleaseLock(HSEM_TypeDef *HSEMx, uint32_t Semaphore, uint32_t process)

  250. {

  251.   WRITE_REG(HSEMx->R[Semaphore], (LL_HSEM_COREID | process));

  252. }

  253. 

  254. /**

  255.   * @brief  Get the lock status of the semaphore.

  256.   * @rmtoll R            LOCK          LL_HSEM_GetStatus

  257.   * @param  HSEMx HSEM Instance.

  258.   * @param  Semaphore Semaphore number. Value between Min_Data=0 and Max_Data=31

  259.   * @retval 0 semaphore is free, 1 semaphore is locked  */

  260. __STATIC_INLINE uint32_t LL_HSEM_GetStatus(HSEM_TypeDef *HSEMx, uint32_t Semaphore)

  261. {

  262.   return ((HSEMx->R[Semaphore] != 0U) ? 1UL : 0UL);

  263. }

  264. 

  265. /**

  266.   * @brief  Set the key.

  267.   * @rmtoll KEYR         KEY           LL_HSEM_SetKey

  268.   * @param  HSEMx HSEM Instance.

  269.   * @param  key Key value.

  270.   * @retval None

  271.   */

  272. __STATIC_INLINE void LL_HSEM_SetKey(HSEM_TypeDef *HSEMx, uint32_t key)

  273. {

  274.   WRITE_REG(HSEMx->KEYR, key << HSEM_KEYR_KEY_Pos);

  275. }

  276. 

  277. /**

  278.   * @brief  Get the key.

  279.   * @rmtoll KEYR         KEY           LL_HSEM_GetKey

  280.   * @param  HSEMx HSEM Instance.

  281.   * @retval key to unlock all semaphore from the same core

  282.   */

  283. __STATIC_INLINE uint32_t LL_HSEM_GetKey(HSEM_TypeDef *HSEMx)

  284. {

  285.   return (uint32_t)(READ_BIT(HSEMx->KEYR, HSEM_KEYR_KEY) >> HSEM_KEYR_KEY_Pos);

  286. }

  287. 

  288. /**

  289.   * @brief  Release all semaphore with the same core id.

  290.   * @rmtoll CR           KEY           LL_HSEM_ResetAllLock

  291.   * @param  HSEMx HSEM Instance.

  292.   * @param  key Key value.

  293.   * @param  core This parameter can be one of the following values:

  294.   *         @arg @ref LL_HSEM_COREID_CPU1

  295.   *         @arg @ref LL_HSEM_COREID_CPU2

  296.   * @retval None

  297.   */

  298. __STATIC_INLINE void LL_HSEM_ResetAllLock(HSEM_TypeDef *HSEMx, uint32_t key, uint32_t core)

  299. {

  300.   WRITE_REG(HSEMx->CR, (key << HSEM_CR_KEY_Pos) | core);

  301. }

  302. 

  303. /**

  304.   * @}

  305.   */

  306. 

  307. /** @defgroup HSEM_LL_EF_IT_Management IT_Management

  308.   * @{

  309.   */

  310. 

  311. /**

  312.   * @brief  Enable interrupt.

  313.   * @rmtoll C1IER         ISEM          LL_HSEM_EnableIT_C1IER

  314.   * @param  HSEMx HSEM Instance.

  315.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  316.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  317.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  318.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  319.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  320.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  321.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  322.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  323.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  324.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  325.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  326.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  327.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  328.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  329.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  330.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  331.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  332.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  333.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  334.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  335.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  336.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  337.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  338.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  339.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  340.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  341.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  342.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  343.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  344.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  345.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  346.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  347.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  348.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  349.   * @retval None

  350.   */

  351. __STATIC_INLINE void LL_HSEM_EnableIT_C1IER(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  352. {

  353.   SET_BIT(HSEMx->C1IER, SemaphoreMask);

  354. }

  355. 

  356. /**

  357.   * @brief  Disable interrupt.

  358.   * @rmtoll C1IER          ISEM          LL_HSEM_DisableIT_C1IER

  359.   * @param  HSEMx HSEM Instance.

  360.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  361.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  362.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  363.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  364.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  365.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  366.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  367.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  368.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  369.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  370.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  371.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  372.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  373.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  374.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  375.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  376.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  377.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  378.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  379.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  380.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  381.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  382.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  383.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  384.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  385.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  386.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  387.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  388.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  389.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  390.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  391.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  392.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  393.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  394.   * @retval None

  395.   */

  396. __STATIC_INLINE void LL_HSEM_DisableIT_C1IER(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  397. {

  398.   CLEAR_BIT(HSEMx->C1IER, SemaphoreMask);

  399. }

  400. 

  401. /**

  402.   * @brief  Check if interrupt is enabled.

  403.   * @rmtoll C1IER          ISEM          LL_HSEM_IsEnabledIT_C1IER

  404.   * @param  HSEMx HSEM Instance.

  405.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  406.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  407.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  408.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  409.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  410.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  411.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  412.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  413.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  414.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  415.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  416.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  417.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  418.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  419.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  420.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  421.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  422.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  423.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  424.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  425.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  426.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  427.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  428.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  429.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  430.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  431.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  432.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  433.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  434.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  435.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  436.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  437.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  438.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  439.   * @retval State of bit (1 or 0).

  440.   */

  441. __STATIC_INLINE uint32_t LL_HSEM_IsEnabledIT_C1IER(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  442. {

  443.   return ((READ_BIT(HSEMx->C1IER, SemaphoreMask) == (SemaphoreMask)) ? 1UL : 0UL);

  444. }

  445. 

  446. #if defined(DUAL_CORE)

  447. /**

  448.   * @brief  Enable interrupt.

  449.   * @rmtoll C2IER         ISEM          LL_HSEM_EnableIT_C2IER

  450.   * @param  HSEMx HSEM Instance.

  451.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  452.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  453.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  454.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  455.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  456.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  457.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  458.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  459.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  460.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  461.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  462.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  463.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  464.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  465.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  466.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  467.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  468.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  469.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  470.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  471.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  472.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  473.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  474.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  475.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  476.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  477.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  478.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  479.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  480.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  481.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  482.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  483.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  484.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  485.   * @retval None

  486.   */

  487. __STATIC_INLINE void LL_HSEM_EnableIT_C2IER(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  488. {

  489.   SET_BIT(HSEMx->C2IER, SemaphoreMask);

  490. }

  491. 

  492. /**

  493.   * @brief  Disable interrupt.

  494.   * @rmtoll C2IER          ISEM          LL_HSEM_DisableIT_C2IER

  495.   * @param  HSEMx HSEM Instance.

  496.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  497.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  498.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  499.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  500.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  501.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  502.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  503.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  504.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  505.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  506.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  507.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  508.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  509.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  510.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  511.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  512.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  513.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  514.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  515.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  516.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  517.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  518.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  519.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  520.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  521.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  522.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  523.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  524.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  525.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  526.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  527.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  528.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  529.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  530.   * @retval None

  531.   */

  532. __STATIC_INLINE void LL_HSEM_DisableIT_C2IER(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  533. {

  534.   CLEAR_BIT(HSEMx->C2IER, SemaphoreMask);

  535. }

  536. 

  537. /**

  538.   * @brief  Check if interrupt is enabled.

  539.   * @rmtoll C2IER          ISEM          LL_HSEM_IsEnabledIT_C2IER

  540.   * @param  HSEMx HSEM Instance.

  541.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  542.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  543.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  544.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  545.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  546.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  547.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  548.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  549.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  550.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  551.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  552.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  553.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  554.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  555.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  556.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  557.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  558.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  559.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  560.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  561.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  562.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  563.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  564.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  565.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  566.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  567.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  568.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  569.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  570.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  571.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  572.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  573.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  574.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  575.   * @retval State of bit (1 or 0).

  576.   */

  577. __STATIC_INLINE uint32_t LL_HSEM_IsEnabledIT_C2IER(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  578. {

  579.   return ((READ_BIT(HSEMx->C2IER, SemaphoreMask) == (SemaphoreMask)) ? 1UL : 0UL);

  580. }

  581. #endif /* DUAL_CORE */

  582. /**

  583.   * @}

  584.   */

  585. 

  586. /** @defgroup HSEM_LL_EF_FLAG_Management FLAG_Management

  587.   * @{

  588.   */

  589. 

  590. /**

  591.   * @brief  Clear interrupt status.

  592.   * @rmtoll C1ICR         ISEM          LL_HSEM_ClearFlag_C1ICR

  593.   * @param  HSEMx HSEM Instance.

  594.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  595.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  596.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  597.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  598.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  599.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  600.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  601.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  602.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  603.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  604.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  605.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  606.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  607.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  608.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  609.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  610.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  611.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  612.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  613.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  614.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  615.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  616.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  617.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  618.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  619.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  620.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  621.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  622.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  623.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  624.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  625.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  626.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  627.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  628.   * @retval None

  629.   */

  630. __STATIC_INLINE void LL_HSEM_ClearFlag_C1ICR(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  631. {

  632.   WRITE_REG(HSEMx->C1ICR, SemaphoreMask);

  633. }

  634. 

  635. /**

  636.   * @brief  Get interrupt status from ISR register.

  637.   * @rmtoll C1ISR         ISEM          LL_HSEM_IsActiveFlag_C1ISR

  638.   * @param  HSEMx HSEM Instance.

  639.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  640.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  641.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  642.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  643.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  644.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  645.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  646.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  647.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  648.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  649.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  650.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  651.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  652.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  653.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  654.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  655.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  656.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  657.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  658.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  659.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  660.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  661.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  662.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  663.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  664.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  665.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  666.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  667.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  668.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  669.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  670.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  671.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  672.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  673.   * @retval State of bit (1 or 0).

  674.   */

  675. __STATIC_INLINE uint32_t LL_HSEM_IsActiveFlag_C1ISR(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  676. {

  677.   return ((READ_BIT(HSEMx->C1ISR, SemaphoreMask) == (SemaphoreMask)) ? 1UL : 0UL);

  678. }

  679. 

  680. /**

  681.   * @brief  Get interrupt status from MISR register.

  682.   * @rmtoll C1MISR        ISEM          LL_HSEM_IsActiveFlag_C1MISR

  683.   * @param  HSEMx HSEM Instance.

  684.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  685.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  686.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  687.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  688.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  689.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  690.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  691.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  692.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  693.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  694.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  695.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  696.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  697.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  698.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  699.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  700.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  701.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  702.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  703.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  704.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  705.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  706.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  707.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  708.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  709.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  710.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  711.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  712.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  713.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  714.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  715.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  716.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  717.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  718.   * @retval State of bit (1 or 0).

  719.   */

  720. __STATIC_INLINE uint32_t LL_HSEM_IsActiveFlag_C1MISR(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  721. {

  722.   return ((READ_BIT(HSEMx->C1MISR, SemaphoreMask) == (SemaphoreMask)) ? 1UL : 0UL);

  723. }

  724. 

  725. #if defined(DUAL_CORE)

  726. /**

  727.   * @brief  Clear interrupt status.

  728.   * @rmtoll C2ICR         ISEM          LL_HSEM_ClearFlag_C2ICR

  729.   * @param  HSEMx HSEM Instance.

  730.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  731.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  732.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  733.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  734.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  735.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  736.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  737.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  738.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  739.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  740.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  741.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  742.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  743.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  744.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  745.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  746.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  747.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  748.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  749.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  750.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  751.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  752.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  753.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  754.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  755.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  756.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  757.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  758.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  759.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  760.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  761.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  762.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  763.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  764.   * @retval None

  765.   */

  766. __STATIC_INLINE void LL_HSEM_ClearFlag_C2ICR(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  767. {

  768.   WRITE_REG(HSEMx->C2ICR, SemaphoreMask);

  769. }

  770. 

  771. /**

  772.   * @brief  Get interrupt status from ISR register.

  773.   * @rmtoll C2ISR         ISEM          LL_HSEM_IsActiveFlag_C2ISR

  774.   * @param  HSEMx HSEM Instance.

  775.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  776.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  777.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  778.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  779.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  780.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  781.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  782.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  783.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  784.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  785.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  786.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  787.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  788.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  789.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  790.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  791.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  792.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  793.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  794.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  795.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  796.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  797.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  798.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  799.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  800.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  801.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  802.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  803.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  804.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  805.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  806.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  807.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  808.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  809.   * @retval State of bit (1 or 0).

  810.   */

  811. __STATIC_INLINE uint32_t LL_HSEM_IsActiveFlag_C2ISR(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  812. {

  813.   return ((READ_BIT(HSEMx->C2ISR, SemaphoreMask) == (SemaphoreMask)) ? 1UL : 0UL);

  814. }

  815. 

  816. /**

  817.   * @brief  Get interrupt status from MISR register.

  818.   * @rmtoll C2MISR        ISEM          LL_HSEM_IsActiveFlag_C2MISR

  819.   * @param  HSEMx HSEM Instance.

  820.   * @param  SemaphoreMask This parameter can be a combination of the following values:

  821.   *         @arg @ref LL_HSEM_SEMAPHORE_0

  822.   *         @arg @ref LL_HSEM_SEMAPHORE_1

  823.   *         @arg @ref LL_HSEM_SEMAPHORE_2

  824.   *         @arg @ref LL_HSEM_SEMAPHORE_3

  825.   *         @arg @ref LL_HSEM_SEMAPHORE_4

  826.   *         @arg @ref LL_HSEM_SEMAPHORE_5

  827.   *         @arg @ref LL_HSEM_SEMAPHORE_6

  828.   *         @arg @ref LL_HSEM_SEMAPHORE_7

  829.   *         @arg @ref LL_HSEM_SEMAPHORE_8

  830.   *         @arg @ref LL_HSEM_SEMAPHORE_9

  831.   *         @arg @ref LL_HSEM_SEMAPHORE_10

  832.   *         @arg @ref LL_HSEM_SEMAPHORE_11

  833.   *         @arg @ref LL_HSEM_SEMAPHORE_12

  834.   *         @arg @ref LL_HSEM_SEMAPHORE_13

  835.   *         @arg @ref LL_HSEM_SEMAPHORE_14

  836.   *         @arg @ref LL_HSEM_SEMAPHORE_15

  837.   *         @arg @ref LL_HSEM_SEMAPHORE_16

  838.   *         @arg @ref LL_HSEM_SEMAPHORE_17

  839.   *         @arg @ref LL_HSEM_SEMAPHORE_18

  840.   *         @arg @ref LL_HSEM_SEMAPHORE_19

  841.   *         @arg @ref LL_HSEM_SEMAPHORE_20

  842.   *         @arg @ref LL_HSEM_SEMAPHORE_21

  843.   *         @arg @ref LL_HSEM_SEMAPHORE_22

  844.   *         @arg @ref LL_HSEM_SEMAPHORE_23

  845.   *         @arg @ref LL_HSEM_SEMAPHORE_24

  846.   *         @arg @ref LL_HSEM_SEMAPHORE_25

  847.   *         @arg @ref LL_HSEM_SEMAPHORE_26

  848.   *         @arg @ref LL_HSEM_SEMAPHORE_27

  849.   *         @arg @ref LL_HSEM_SEMAPHORE_28

  850.   *         @arg @ref LL_HSEM_SEMAPHORE_29

  851.   *         @arg @ref LL_HSEM_SEMAPHORE_30

  852.   *         @arg @ref LL_HSEM_SEMAPHORE_31

  853.   *         @arg @ref LL_HSEM_SEMAPHORE_ALL

  854.   * @retval State of bit (1 or 0).

  855.   */

  856. __STATIC_INLINE uint32_t LL_HSEM_IsActiveFlag_C2MISR(HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)

  857. {

  858.   return ((READ_BIT(HSEMx->C2MISR, SemaphoreMask) == (SemaphoreMask)) ? 1UL : 0UL);

  859. }

  860. #endif /* DUAL_CORE */

  861. /**

  862.   * @}

  863.   */

  864. 

  865. /**

  866.   * @}

  867.   */

  868. 

  869. /**

  870.   * @}

  871.   */

  872. 

  873. #endif /* defined(HSEM) */

  874. 

  875. /**

  876.   * @}

  877.   */

  878. 

  879. #ifdef __cplusplus

  880. }

  881. #endif

  882. 

  883. #endif /* __STM32H7xx_LL_HSEM_H */

  884. 

  885. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/