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  1. /**
  2. ******************************************************************************
  3. * @file stm32h7xx_ll_dma2d.h
  4. * @author MCD Application Team
  5. * @brief Header file of DMA2D LL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef STM32H7xx_LL_DMA2D_H
  21. #define STM32H7xx_LL_DMA2D_H
  22. #ifdef __cplusplus
  23. extern "C" {
  24. #endif
  25. /* Includes ------------------------------------------------------------------*/
  26. #include "stm32h7xx.h"
  27. /** @addtogroup STM32H7xx_LL_Driver
  28. * @{
  29. */
  30. #if defined (DMA2D)
  31. /** @defgroup DMA2D_LL DMA2D
  32. * @{
  33. */
  34. /* Private types -------------------------------------------------------------*/
  35. /* Private variables ---------------------------------------------------------*/
  36. /* Private constants ---------------------------------------------------------*/
  37. /* Private macros ------------------------------------------------------------*/
  38. #if defined(USE_FULL_LL_DRIVER)
  39. /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros
  40. * @{
  41. */
  42. /**
  43. * @}
  44. */
  45. #endif /*USE_FULL_LL_DRIVER*/
  46. /* Exported types ------------------------------------------------------------*/
  47. #if defined(USE_FULL_LL_DRIVER)
  48. /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures
  49. * @{
  50. */
  51. /**
  52. * @brief LL DMA2D Init Structure Definition
  53. */
  54. typedef struct
  55. {
  56. uint32_t Mode; /*!< Specifies the DMA2D transfer mode.
  57. - This parameter can be one value of @ref DMA2D_LL_EC_MODE.
  58. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetMode().*/
  59. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  60. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  61. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  62. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  63. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  64. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  65. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  66. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  67. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  68. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  69. function @ref LL_DMA2D_ConfigOutputColor(). */
  70. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  71. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  72. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  73. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  74. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  75. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  76. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  77. function @ref LL_DMA2D_ConfigOutputColor(). */
  78. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  79. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  80. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  81. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  82. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  83. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  84. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  85. function @ref LL_DMA2D_ConfigOutputColor(). */
  86. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  87. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  88. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  89. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  90. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  91. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  92. function @ref LL_DMA2D_ConfigOutputColor(). */
  93. uint32_t OutputMemoryAddress; /*!< Specifies the memory address.
  94. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  95. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */
  96. uint32_t LineOffset; /*!< Specifies the output line offset value.
  97. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  98. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetLineOffset(). */
  99. uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred.
  100. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF.
  101. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfLines(). */
  102. uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transfered.
  103. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  104. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */
  105. uint32_t AlphaInversionMode; /*!< Specifies the output alpha inversion mode.
  106. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION.
  107. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputAlphaInvMode(). */
  108. uint32_t RBSwapMode; /*!< Specifies the output Red Blue swap mode.
  109. - This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP.
  110. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputRBSwapMode(). */
  111. } LL_DMA2D_InitTypeDef;
  112. /**
  113. * @brief LL DMA2D Layer Configuration Structure Definition
  114. */
  115. typedef struct
  116. {
  117. uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address.
  118. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  119. This parameter can be modified afterwards using unitary functions
  120. - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer,
  121. - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */
  122. uint32_t LineOffset; /*!< Specifies the foreground or background line offset value.
  123. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  124. This parameter can be modified afterwards using unitary functions
  125. - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer,
  126. - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */
  127. uint32_t ColorMode; /*!< Specifies the foreground or background color mode.
  128. - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE.
  129. This parameter can be modified afterwards using unitary functions
  130. - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer,
  131. - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */
  132. uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode.
  133. - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE.
  134. This parameter can be modified afterwards using unitary functions
  135. - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer,
  136. - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */
  137. uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size.
  138. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  139. This parameter can be modified afterwards using unitary functions
  140. - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer,
  141. - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */
  142. uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode.
  143. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE.
  144. This parameter can be modified afterwards using unitary functions
  145. - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer,
  146. - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */
  147. uint32_t Alpha; /*!< Specifies the foreground or background Alpha value.
  148. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  149. This parameter can be modified afterwards using unitary functions
  150. - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer,
  151. - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */
  152. uint32_t Blue; /*!< Specifies the foreground or background Blue color value.
  153. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  154. This parameter can be modified afterwards using unitary functions
  155. - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer,
  156. - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */
  157. uint32_t Green; /*!< Specifies the foreground or background Green color value.
  158. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  159. This parameter can be modified afterwards using unitary functions
  160. - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer,
  161. - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */
  162. uint32_t Red; /*!< Specifies the foreground or background Red color value.
  163. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  164. This parameter can be modified afterwards using unitary functions
  165. - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer,
  166. - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */
  167. uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address.
  168. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  169. This parameter can be modified afterwards using unitary functions
  170. - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer,
  171. - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */
  172. uint32_t AlphaInversionMode; /*!< Specifies the foreground or background alpha inversion mode.
  173. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION.
  174. This parameter can be modified afterwards using unitary functions
  175. - @ref LL_DMA2D_FGND_SetAlphaInvMode() for foreground layer,
  176. - @ref LL_DMA2D_BGND_SetAlphaInvMode() for background layer. */
  177. uint32_t RBSwapMode; /*!< Specifies the foreground or background Red Blue swap mode.
  178. This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP .
  179. This parameter can be modified afterwards using unitary functions
  180. - @ref LL_DMA2D_FGND_SetRBSwapMode() for foreground layer,
  181. - @ref LL_DMA2D_BGND_SetRBSwapMode() for background layer. */
  182. uint32_t ChromaSubSampling; /*!< Configure the chroma sub-sampling mode for the YCbCr color mode
  183. This parameter is applicable for foreground layer only.
  184. This parameter can be one value of @ref DMA2D_LL_CHROMA_SUB_SAMPLING
  185. This parameter can be modified afterwards using unitary functions
  186. - @ref LL_DMA2D_FGND_SetChrSubSampling() for foreground layer. */
  187. } LL_DMA2D_LayerCfgTypeDef;
  188. /**
  189. * @brief LL DMA2D Output Color Structure Definition
  190. */
  191. typedef struct
  192. {
  193. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  194. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  195. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  196. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  197. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  198. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  199. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  200. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  201. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  202. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  203. function @ref LL_DMA2D_ConfigOutputColor(). */
  204. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  205. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  206. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  207. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  208. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  209. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  210. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  211. function @ref LL_DMA2D_ConfigOutputColor(). */
  212. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  213. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  214. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  215. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  216. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  217. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  218. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  219. function @ref LL_DMA2D_ConfigOutputColor(). */
  220. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  221. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  222. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  223. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  224. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  225. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  226. function @ref LL_DMA2D_ConfigOutputColor(). */
  227. } LL_DMA2D_ColorTypeDef;
  228. /**
  229. * @}
  230. */
  231. #endif /* USE_FULL_LL_DRIVER */
  232. /* Exported constants --------------------------------------------------------*/
  233. /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants
  234. * @{
  235. */
  236. /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines
  237. * @brief Flags defines which can be used with LL_DMA2D_ReadReg function
  238. * @{
  239. */
  240. #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
  241. #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */
  242. #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */
  243. #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
  244. #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
  245. #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
  246. /**
  247. * @}
  248. */
  249. /** @defgroup DMA2D_LL_EC_IT IT Defines
  250. * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions
  251. * @{
  252. */
  253. #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
  254. #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */
  255. #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
  256. #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
  257. #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
  258. #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
  259. /**
  260. * @}
  261. */
  262. /** @defgroup DMA2D_LL_EC_MODE Mode
  263. * @{
  264. */
  265. #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */
  266. #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */
  267. #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */
  268. #define LL_DMA2D_MODE_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */
  269. /**
  270. * @}
  271. */
  272. /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode
  273. * @{
  274. */
  275. #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  276. #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */
  277. #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */
  278. #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */
  279. #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */
  280. /**
  281. * @}
  282. */
  283. /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode
  284. * @{
  285. */
  286. #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  287. #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */
  288. #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */
  289. #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */
  290. #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */
  291. #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */
  292. #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */
  293. #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */
  294. #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */
  295. #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */
  296. #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */
  297. #define LL_DMA2D_INPUT_MODE_YCBCR (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< YCbCr */
  298. /**
  299. * @}
  300. */
  301. /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode
  302. * @{
  303. */
  304. #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */
  305. #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by programmed alpha value */
  306. #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by programmed alpha value
  307. with original alpha channel value */
  308. /**
  309. * @}
  310. */
  311. /** @defgroup DMA2D_LL_EC_RED_BLUE_SWAP Red Blue Swap
  312. * @{
  313. */
  314. #define LL_DMA2D_RB_MODE_REGULAR 0x00000000U /*!< RGB or ARGB */
  315. #define LL_DMA2D_RB_MODE_SWAP DMA2D_FGPFCCR_RBS /*!< BGR or ABGR */
  316. /**
  317. * @}
  318. */
  319. /** @defgroup DMA2D_LL_EC_ALPHA_INVERSION Alpha Inversion
  320. * @{
  321. */
  322. #define LL_DMA2D_ALPHA_REGULAR 0x00000000U /*!< Regular alpha */
  323. #define LL_DMA2D_ALPHA_INVERTED DMA2D_FGPFCCR_AI /*!< Inverted alpha */
  324. /**
  325. * @}
  326. */
  327. /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode
  328. * @{
  329. */
  330. #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  331. #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */
  332. /**
  333. * @}
  334. */
  335. /** @defgroup DMA2D_LL_CHROMA_SUB_SAMPLING Chroma Sub Sampling
  336. * @{
  337. */
  338. #define LL_DMA2D_CSS_444 0x00000000U /*!< No chroma sub-sampling 4:4:4 */
  339. #define LL_DMA2D_CSS_422 DMA2D_FGPFCCR_CSS_0 /*!< chroma sub-sampling 4:2:2 */
  340. #define LL_DMA2D_CSS_420 DMA2D_FGPFCCR_CSS_1 /*!< chroma sub-sampling 4:2:0 */
  341. /**
  342. * @}
  343. */
  344. /**
  345. * @}
  346. */
  347. /* Exported macro ------------------------------------------------------------*/
  348. /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros
  349. * @{
  350. */
  351. /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros
  352. * @{
  353. */
  354. /**
  355. * @brief Write a value in DMA2D register.
  356. * @param __INSTANCE__ DMA2D Instance
  357. * @param __REG__ Register to be written
  358. * @param __VALUE__ Value to be written in the register
  359. * @retval None
  360. */
  361. #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
  362. /**
  363. * @brief Read a value in DMA2D register.
  364. * @param __INSTANCE__ DMA2D Instance
  365. * @param __REG__ Register to be read
  366. * @retval Register value
  367. */
  368. #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
  369. /**
  370. * @}
  371. */
  372. /**
  373. * @}
  374. */
  375. /* Exported functions --------------------------------------------------------*/
  376. /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions
  377. * @{
  378. */
  379. /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions
  380. * @{
  381. */
  382. /**
  383. * @brief Start a DMA2D transfer.
  384. * @rmtoll CR START LL_DMA2D_Start
  385. * @param DMA2Dx DMA2D Instance
  386. * @retval None
  387. */
  388. __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx)
  389. {
  390. SET_BIT(DMA2Dx->CR, DMA2D_CR_START);
  391. }
  392. /**
  393. * @brief Indicate if a DMA2D transfer is ongoing.
  394. * @rmtoll CR START LL_DMA2D_IsTransferOngoing
  395. * @param DMA2Dx DMA2D Instance
  396. * @retval State of bit (1 or 0).
  397. */
  398. __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx)
  399. {
  400. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START)) ? 1UL : 0UL);
  401. }
  402. /**
  403. * @brief Suspend DMA2D transfer.
  404. * @note This API can be used to suspend automatic foreground or background CLUT loading.
  405. * @rmtoll CR SUSP LL_DMA2D_Suspend
  406. * @param DMA2Dx DMA2D Instance
  407. * @retval None
  408. */
  409. __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx)
  410. {
  411. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP);
  412. }
  413. /**
  414. * @brief Resume DMA2D transfer.
  415. * @note This API can be used to resume automatic foreground or background CLUT loading.
  416. * @rmtoll CR SUSP LL_DMA2D_Resume
  417. * @param DMA2Dx DMA2D Instance
  418. * @retval None
  419. */
  420. __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx)
  421. {
  422. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START);
  423. }
  424. /**
  425. * @brief Indicate if DMA2D transfer is suspended.
  426. * @note This API can be used to indicate whether or not automatic foreground or
  427. * background CLUT loading is suspended.
  428. * @rmtoll CR SUSP LL_DMA2D_IsSuspended
  429. * @param DMA2Dx DMA2D Instance
  430. * @retval State of bit (1 or 0).
  431. */
  432. __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx)
  433. {
  434. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP)) ? 1UL : 0UL);
  435. }
  436. /**
  437. * @brief Abort DMA2D transfer.
  438. * @note This API can be used to abort automatic foreground or background CLUT loading.
  439. * @rmtoll CR ABORT LL_DMA2D_Abort
  440. * @param DMA2Dx DMA2D Instance
  441. * @retval None
  442. */
  443. __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx)
  444. {
  445. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT);
  446. }
  447. /**
  448. * @brief Indicate if DMA2D transfer is aborted.
  449. * @note This API can be used to indicate whether or not automatic foreground or
  450. * background CLUT loading is aborted.
  451. * @rmtoll CR ABORT LL_DMA2D_IsAborted
  452. * @param DMA2Dx DMA2D Instance
  453. * @retval State of bit (1 or 0).
  454. */
  455. __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx)
  456. {
  457. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT)) ? 1UL : 0UL);
  458. }
  459. /**
  460. * @brief Set DMA2D mode.
  461. * @rmtoll CR MODE LL_DMA2D_SetMode
  462. * @param DMA2Dx DMA2D Instance
  463. * @param Mode This parameter can be one of the following values:
  464. * @arg @ref LL_DMA2D_MODE_M2M
  465. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  466. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  467. * @arg @ref LL_DMA2D_MODE_R2M
  468. * @retval None
  469. */
  470. __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
  471. {
  472. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode);
  473. }
  474. /**
  475. * @brief Return DMA2D mode
  476. * @rmtoll CR MODE LL_DMA2D_GetMode
  477. * @param DMA2Dx DMA2D Instance
  478. * @retval Returned value can be one of the following values:
  479. * @arg @ref LL_DMA2D_MODE_M2M
  480. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  481. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  482. * @arg @ref LL_DMA2D_MODE_R2M
  483. */
  484. __STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx)
  485. {
  486. return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE));
  487. }
  488. /**
  489. * @brief Set DMA2D output color mode.
  490. * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode
  491. * @param DMA2Dx DMA2D Instance
  492. * @param ColorMode This parameter can be one of the following values:
  493. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  494. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  495. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  496. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  497. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  498. * @retval None
  499. */
  500. __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  501. {
  502. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode);
  503. }
  504. /**
  505. * @brief Return DMA2D output color mode.
  506. * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode
  507. * @param DMA2Dx DMA2D Instance
  508. * @retval Returned value can be one of the following values:
  509. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  510. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  511. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  512. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  513. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  514. */
  515. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx)
  516. {
  517. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM));
  518. }
  519. /**
  520. * @brief Set DMA2D output Red Blue swap mode.
  521. * @rmtoll OPFCCR RBS LL_DMA2D_SetOutputRBSwapMode
  522. * @param DMA2Dx DMA2D Instance
  523. * @param RBSwapMode This parameter can be one of the following values:
  524. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  525. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  526. * @retval None
  527. */
  528. __STATIC_INLINE void LL_DMA2D_SetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
  529. {
  530. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS, RBSwapMode);
  531. }
  532. /**
  533. * @brief Return DMA2D output Red Blue swap mode.
  534. * @rmtoll OPFCCR RBS LL_DMA2D_GetOutputRBSwapMode
  535. * @param DMA2Dx DMA2D Instance
  536. * @retval Returned value can be one of the following values:
  537. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  538. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  539. */
  540. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx)
  541. {
  542. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS));
  543. }
  544. /**
  545. * @brief Set DMA2D output alpha inversion mode.
  546. * @rmtoll OPFCCR AI LL_DMA2D_SetOutputAlphaInvMode
  547. * @param DMA2Dx DMA2D Instance
  548. * @param AlphaInversionMode This parameter can be one of the following values:
  549. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  550. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  551. * @retval None
  552. */
  553. __STATIC_INLINE void LL_DMA2D_SetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
  554. {
  555. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI, AlphaInversionMode);
  556. }
  557. /**
  558. * @brief Return DMA2D output alpha inversion mode.
  559. * @rmtoll OPFCCR AI LL_DMA2D_GetOutputAlphaInvMode
  560. * @param DMA2Dx DMA2D Instance
  561. * @retval Returned value can be one of the following values:
  562. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  563. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  564. */
  565. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
  566. {
  567. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI));
  568. }
  569. /**
  570. * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits).
  571. * @rmtoll OOR LO LL_DMA2D_SetLineOffset
  572. * @param DMA2Dx DMA2D Instance
  573. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF
  574. * @retval None
  575. */
  576. __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  577. {
  578. MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset);
  579. }
  580. /**
  581. * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits).
  582. * @rmtoll OOR LO LL_DMA2D_GetLineOffset
  583. * @param DMA2Dx DMA2D Instance
  584. * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF
  585. */
  586. __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  587. {
  588. return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO));
  589. }
  590. /**
  591. * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits).
  592. * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines
  593. * @param DMA2Dx DMA2D Instance
  594. * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF
  595. * @retval None
  596. */
  597. __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
  598. {
  599. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos));
  600. }
  601. /**
  602. * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits)
  603. * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines
  604. * @param DMA2Dx DMA2D Instance
  605. * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF
  606. */
  607. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx)
  608. {
  609. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos);
  610. }
  611. /**
  612. * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  613. * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines
  614. * @param DMA2Dx DMA2D Instance
  615. * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF
  616. * @retval None
  617. */
  618. __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
  619. {
  620. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines);
  621. }
  622. /**
  623. * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  624. * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines
  625. * @param DMA2Dx DMA2D Instance
  626. * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF
  627. */
  628. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx)
  629. {
  630. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL));
  631. }
  632. /**
  633. * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  634. * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr
  635. * @param DMA2Dx DMA2D Instance
  636. * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  637. * @retval None
  638. */
  639. __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
  640. {
  641. LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress);
  642. }
  643. /**
  644. * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  645. * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr
  646. * @param DMA2Dx DMA2D Instance
  647. * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  648. */
  649. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx)
  650. {
  651. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR));
  652. }
  653. /**
  654. * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits).
  655. * @note Output color format depends on output color mode, ARGB8888, RGB888,
  656. * RGB565, ARGB1555 or ARGB4444.
  657. * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting
  658. * with respect to color mode is not done by the user code.
  659. * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n
  660. * OCOLR GREEN LL_DMA2D_SetOutputColor\n
  661. * OCOLR RED LL_DMA2D_SetOutputColor\n
  662. * OCOLR ALPHA LL_DMA2D_SetOutputColor
  663. * @param DMA2Dx DMA2D Instance
  664. * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  665. * @retval None
  666. */
  667. __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
  668. {
  669. MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \
  670. OutputColor);
  671. }
  672. /**
  673. * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits).
  674. * @note Alpha channel and red, green, blue color values must be retrieved from the returned
  675. * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444)
  676. * as set by @ref LL_DMA2D_SetOutputColorMode.
  677. * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n
  678. * OCOLR GREEN LL_DMA2D_GetOutputColor\n
  679. * OCOLR RED LL_DMA2D_GetOutputColor\n
  680. * OCOLR ALPHA LL_DMA2D_GetOutputColor
  681. * @param DMA2Dx DMA2D Instance
  682. * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF
  683. */
  684. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx)
  685. {
  686. return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \
  687. (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1)));
  688. }
  689. /**
  690. * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  691. * @rmtoll LWR LW LL_DMA2D_SetLineWatermark
  692. * @param DMA2Dx DMA2D Instance
  693. * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF
  694. * @retval None
  695. */
  696. __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
  697. {
  698. MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark);
  699. }
  700. /**
  701. * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  702. * @rmtoll LWR LW LL_DMA2D_GetLineWatermark
  703. * @param DMA2Dx DMA2D Instance
  704. * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF
  705. */
  706. __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx)
  707. {
  708. return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW));
  709. }
  710. /**
  711. * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits).
  712. * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime
  713. * @param DMA2Dx DMA2D Instance
  714. * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF
  715. * @retval None
  716. */
  717. __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
  718. {
  719. MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos));
  720. }
  721. /**
  722. * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits).
  723. * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime
  724. * @param DMA2Dx DMA2D Instance
  725. * @retval Dead time value between Min_Data=0 and Max_Data=0xFF
  726. */
  727. __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx)
  728. {
  729. return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos);
  730. }
  731. /**
  732. * @brief Enable DMA2D dead time functionality.
  733. * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime
  734. * @param DMA2Dx DMA2D Instance
  735. * @retval None
  736. */
  737. __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx)
  738. {
  739. SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  740. }
  741. /**
  742. * @brief Disable DMA2D dead time functionality.
  743. * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime
  744. * @param DMA2Dx DMA2D Instance
  745. * @retval None
  746. */
  747. __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx)
  748. {
  749. CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  750. }
  751. /**
  752. * @brief Indicate if DMA2D dead time functionality is enabled.
  753. * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime
  754. * @param DMA2Dx DMA2D Instance
  755. * @retval State of bit (1 or 0).
  756. */
  757. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx)
  758. {
  759. return ((READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN)) ? 1UL : 0UL);
  760. }
  761. /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions
  762. * @{
  763. */
  764. /**
  765. * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  766. * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr
  767. * @param DMA2Dx DMA2D Instance
  768. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  769. * @retval None
  770. */
  771. __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  772. {
  773. LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress);
  774. }
  775. /**
  776. * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  777. * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr
  778. * @param DMA2Dx DMA2D Instance
  779. * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  780. */
  781. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
  782. {
  783. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR));
  784. }
  785. /**
  786. * @brief Enable DMA2D foreground CLUT loading.
  787. * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad
  788. * @param DMA2Dx DMA2D Instance
  789. * @retval None
  790. */
  791. __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  792. {
  793. SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START);
  794. }
  795. /**
  796. * @brief Indicate if DMA2D foreground CLUT loading is enabled.
  797. * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad
  798. * @param DMA2Dx DMA2D Instance
  799. * @retval State of bit (1 or 0).
  800. */
  801. __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  802. {
  803. return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL);
  804. }
  805. /**
  806. * @brief Set DMA2D foreground color mode.
  807. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode
  808. * @param DMA2Dx DMA2D Instance
  809. * @param ColorMode This parameter can be one of the following values:
  810. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  811. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  812. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  813. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  814. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  815. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  816. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  817. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  818. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  819. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  820. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  821. * @retval None
  822. */
  823. __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  824. {
  825. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode);
  826. }
  827. /**
  828. * @brief Return DMA2D foreground color mode.
  829. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode
  830. * @param DMA2Dx DMA2D Instance
  831. * @retval Returned value can be one of the following values:
  832. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  833. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  834. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  835. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  836. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  837. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  838. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  839. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  840. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  841. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  842. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  843. */
  844. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
  845. {
  846. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM));
  847. }
  848. /**
  849. * @brief Set DMA2D foreground alpha mode.
  850. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode
  851. * @param DMA2Dx DMA2D Instance
  852. * @param AphaMode This parameter can be one of the following values:
  853. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  854. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  855. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  856. * @retval None
  857. */
  858. __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  859. {
  860. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode);
  861. }
  862. /**
  863. * @brief Return DMA2D foreground alpha mode.
  864. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode
  865. * @param DMA2Dx DMA2D Instance
  866. * @retval Returned value can be one of the following values:
  867. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  868. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  869. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  870. */
  871. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
  872. {
  873. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM));
  874. }
  875. /**
  876. * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  877. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha
  878. * @param DMA2Dx DMA2D Instance
  879. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  880. * @retval None
  881. */
  882. __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  883. {
  884. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos));
  885. }
  886. /**
  887. * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  888. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha
  889. * @param DMA2Dx DMA2D Instance
  890. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  891. */
  892. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
  893. {
  894. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos);
  895. }
  896. /**
  897. * @brief Set DMA2D foreground Red Blue swap mode.
  898. * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_SetRBSwapMode
  899. * @param DMA2Dx DMA2D Instance
  900. * @param RBSwapMode This parameter can be one of the following values:
  901. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  902. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  903. * @retval None
  904. */
  905. __STATIC_INLINE void LL_DMA2D_FGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
  906. {
  907. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS, RBSwapMode);
  908. }
  909. /**
  910. * @brief Return DMA2D foreground Red Blue swap mode.
  911. * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_GetRBSwapMode
  912. * @param DMA2Dx DMA2D Instance
  913. * @retval Returned value can be one of the following values:
  914. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  915. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  916. */
  917. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx)
  918. {
  919. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS));
  920. }
  921. /**
  922. * @brief Set DMA2D foreground alpha inversion mode.
  923. * @rmtoll FGPFCCR AI LL_DMA2D_FGND_SetAlphaInvMode
  924. * @param DMA2Dx DMA2D Instance
  925. * @param AlphaInversionMode This parameter can be one of the following values:
  926. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  927. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  928. * @retval None
  929. */
  930. __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
  931. {
  932. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI, AlphaInversionMode);
  933. }
  934. /**
  935. * @brief Return DMA2D foreground alpha inversion mode.
  936. * @rmtoll FGPFCCR AI LL_DMA2D_FGND_GetAlphaInvMode
  937. * @param DMA2Dx DMA2D Instance
  938. * @retval Returned value can be one of the following values:
  939. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  940. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  941. */
  942. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
  943. {
  944. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI));
  945. }
  946. /**
  947. * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  948. * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset
  949. * @param DMA2Dx DMA2D Instance
  950. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  951. * @retval None
  952. */
  953. __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  954. {
  955. MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset);
  956. }
  957. /**
  958. * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  959. * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset
  960. * @param DMA2Dx DMA2D Instance
  961. * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF
  962. */
  963. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  964. {
  965. return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO));
  966. }
  967. /**
  968. * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits).
  969. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor
  970. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor
  971. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor
  972. * @param DMA2Dx DMA2D Instance
  973. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  974. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  975. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  976. * @retval None
  977. */
  978. __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  979. {
  980. MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \
  981. ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue));
  982. }
  983. /**
  984. * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  985. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor
  986. * @param DMA2Dx DMA2D Instance
  987. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  988. * @retval None
  989. */
  990. __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  991. {
  992. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos));
  993. }
  994. /**
  995. * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  996. * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor
  997. * @param DMA2Dx DMA2D Instance
  998. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  999. */
  1000. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
  1001. {
  1002. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos);
  1003. }
  1004. /**
  1005. * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  1006. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor
  1007. * @param DMA2Dx DMA2D Instance
  1008. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1009. * @retval None
  1010. */
  1011. __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  1012. {
  1013. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos));
  1014. }
  1015. /**
  1016. * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  1017. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor
  1018. * @param DMA2Dx DMA2D Instance
  1019. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  1020. */
  1021. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
  1022. {
  1023. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos);
  1024. }
  1025. /**
  1026. * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  1027. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor
  1028. * @param DMA2Dx DMA2D Instance
  1029. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1030. * @retval None
  1031. */
  1032. __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  1033. {
  1034. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue);
  1035. }
  1036. /**
  1037. * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  1038. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor
  1039. * @param DMA2Dx DMA2D Instance
  1040. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  1041. */
  1042. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
  1043. {
  1044. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE));
  1045. }
  1046. /**
  1047. * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  1048. * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr
  1049. * @param DMA2Dx DMA2D Instance
  1050. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1051. * @retval None
  1052. */
  1053. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  1054. {
  1055. LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress);
  1056. }
  1057. /**
  1058. * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  1059. * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr
  1060. * @param DMA2Dx DMA2D Instance
  1061. * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1062. */
  1063. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
  1064. {
  1065. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR));
  1066. }
  1067. /**
  1068. * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  1069. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize
  1070. * @param DMA2Dx DMA2D Instance
  1071. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  1072. * @retval None
  1073. */
  1074. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  1075. {
  1076. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos));
  1077. }
  1078. /**
  1079. * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  1080. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize
  1081. * @param DMA2Dx DMA2D Instance
  1082. * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF
  1083. */
  1084. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
  1085. {
  1086. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos);
  1087. }
  1088. /**
  1089. * @brief Set DMA2D foreground CLUT color mode.
  1090. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode
  1091. * @param DMA2Dx DMA2D Instance
  1092. * @param CLUTColorMode This parameter can be one of the following values:
  1093. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1094. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1095. * @retval None
  1096. */
  1097. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1098. {
  1099. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode);
  1100. }
  1101. /**
  1102. * @brief Return DMA2D foreground CLUT color mode.
  1103. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode
  1104. * @param DMA2Dx DMA2D Instance
  1105. * @retval Returned value can be one of the following values:
  1106. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1107. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1108. */
  1109. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
  1110. {
  1111. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM));
  1112. }
  1113. /**
  1114. * @brief Set DMA2D foreground Chroma Sub Sampling (for YCbCr input color mode).
  1115. * @rmtoll FGPFCCR CSS LL_DMA2D_FGND_SetChrSubSampling
  1116. * @param DMA2Dx DMA2D Instance
  1117. * @param ChromaSubSampling This parameter can be one of the following values:
  1118. * @arg @ref LL_DMA2D_CSS_444
  1119. * @arg @ref LL_DMA2D_CSS_422
  1120. * @arg @ref LL_DMA2D_CSS_420
  1121. * @retval None
  1122. */
  1123. __STATIC_INLINE void LL_DMA2D_FGND_SetChrSubSampling(DMA2D_TypeDef *DMA2Dx, uint32_t ChromaSubSampling)
  1124. {
  1125. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CSS, ChromaSubSampling);
  1126. }
  1127. /**
  1128. * @brief Return DMA2D foreground Chroma Sub Sampling (for YCbCr input color mode).
  1129. * @rmtoll FGPFCCR CSS LL_DMA2D_FGND_GetChrSubSampling
  1130. * @param DMA2Dx DMA2D Instance
  1131. * @retval Returned value can be one of the following values:
  1132. * @arg @ref LL_DMA2D_CSS_444
  1133. * @arg @ref LL_DMA2D_CSS_422
  1134. * @arg @ref LL_DMA2D_CSS_420
  1135. */
  1136. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetChrSubSampling(DMA2D_TypeDef *DMA2Dx)
  1137. {
  1138. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CSS));
  1139. }
  1140. /**
  1141. * @}
  1142. */
  1143. /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions
  1144. * @{
  1145. */
  1146. /**
  1147. * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  1148. * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr
  1149. * @param DMA2Dx DMA2D Instance
  1150. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1151. * @retval None
  1152. */
  1153. __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  1154. {
  1155. LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress);
  1156. }
  1157. /**
  1158. * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  1159. * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr
  1160. * @param DMA2Dx DMA2D Instance
  1161. * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1162. */
  1163. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
  1164. {
  1165. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR));
  1166. }
  1167. /**
  1168. * @brief Enable DMA2D background CLUT loading.
  1169. * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad
  1170. * @param DMA2Dx DMA2D Instance
  1171. * @retval None
  1172. */
  1173. __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1174. {
  1175. SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START);
  1176. }
  1177. /**
  1178. * @brief Indicate if DMA2D background CLUT loading is enabled.
  1179. * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad
  1180. * @param DMA2Dx DMA2D Instance
  1181. * @retval State of bit (1 or 0).
  1182. */
  1183. __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1184. {
  1185. return ((READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START)) ? 1UL : 0UL);
  1186. }
  1187. /**
  1188. * @brief Set DMA2D background color mode.
  1189. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode
  1190. * @param DMA2Dx DMA2D Instance
  1191. * @param ColorMode This parameter can be one of the following values:
  1192. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1193. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1194. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1195. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1196. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1197. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1198. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1199. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1200. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1201. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1202. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1203. * @retval None
  1204. */
  1205. __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  1206. {
  1207. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode);
  1208. }
  1209. /**
  1210. * @brief Return DMA2D background color mode.
  1211. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode
  1212. * @param DMA2Dx DMA2D Instance
  1213. * @retval Returned value can be one of the following values:
  1214. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1215. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1216. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1217. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1218. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1219. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1220. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1221. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1222. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1223. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1224. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1225. */
  1226. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
  1227. {
  1228. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM));
  1229. }
  1230. /**
  1231. * @brief Set DMA2D background alpha mode.
  1232. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode
  1233. * @param DMA2Dx DMA2D Instance
  1234. * @param AphaMode This parameter can be one of the following values:
  1235. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1236. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1237. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1238. * @retval None
  1239. */
  1240. __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  1241. {
  1242. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode);
  1243. }
  1244. /**
  1245. * @brief Return DMA2D background alpha mode.
  1246. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode
  1247. * @param DMA2Dx DMA2D Instance
  1248. * @retval Returned value can be one of the following values:
  1249. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1250. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1251. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1252. */
  1253. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
  1254. {
  1255. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM));
  1256. }
  1257. /**
  1258. * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1259. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha
  1260. * @param DMA2Dx DMA2D Instance
  1261. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  1262. * @retval None
  1263. */
  1264. __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  1265. {
  1266. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos));
  1267. }
  1268. /**
  1269. * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1270. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha
  1271. * @param DMA2Dx DMA2D Instance
  1272. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  1273. */
  1274. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
  1275. {
  1276. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos);
  1277. }
  1278. /**
  1279. * @brief Set DMA2D background Red Blue swap mode.
  1280. * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_SetRBSwapMode
  1281. * @param DMA2Dx DMA2D Instance
  1282. * @param RBSwapMode This parameter can be one of the following values:
  1283. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  1284. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  1285. * @retval None
  1286. */
  1287. __STATIC_INLINE void LL_DMA2D_BGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
  1288. {
  1289. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS, RBSwapMode);
  1290. }
  1291. /**
  1292. * @brief Return DMA2D background Red Blue swap mode.
  1293. * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_GetRBSwapMode
  1294. * @param DMA2Dx DMA2D Instance
  1295. * @retval Returned value can be one of the following values:
  1296. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  1297. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  1298. */
  1299. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx)
  1300. {
  1301. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS));
  1302. }
  1303. /**
  1304. * @brief Set DMA2D background alpha inversion mode.
  1305. * @rmtoll BGPFCCR AI LL_DMA2D_BGND_SetAlphaInvMode
  1306. * @param DMA2Dx DMA2D Instance
  1307. * @param AlphaInversionMode This parameter can be one of the following values:
  1308. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  1309. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  1310. * @retval None
  1311. */
  1312. __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
  1313. {
  1314. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI, AlphaInversionMode);
  1315. }
  1316. /**
  1317. * @brief Return DMA2D background alpha inversion mode.
  1318. * @rmtoll BGPFCCR AI LL_DMA2D_BGND_GetAlphaInvMode
  1319. * @param DMA2Dx DMA2D Instance
  1320. * @retval Returned value can be one of the following values:
  1321. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  1322. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  1323. */
  1324. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
  1325. {
  1326. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI));
  1327. }
  1328. /**
  1329. * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1330. * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset
  1331. * @param DMA2Dx DMA2D Instance
  1332. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  1333. * @retval None
  1334. */
  1335. __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  1336. {
  1337. MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset);
  1338. }
  1339. /**
  1340. * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1341. * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset
  1342. * @param DMA2Dx DMA2D Instance
  1343. * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF
  1344. */
  1345. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  1346. {
  1347. return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO));
  1348. }
  1349. /**
  1350. * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits).
  1351. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor
  1352. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor
  1353. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor
  1354. * @param DMA2Dx DMA2D Instance
  1355. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1356. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1357. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1358. * @retval None
  1359. */
  1360. __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  1361. {
  1362. MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \
  1363. ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue));
  1364. }
  1365. /**
  1366. * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1367. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor
  1368. * @param DMA2Dx DMA2D Instance
  1369. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1370. * @retval None
  1371. */
  1372. __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  1373. {
  1374. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos));
  1375. }
  1376. /**
  1377. * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1378. * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor
  1379. * @param DMA2Dx DMA2D Instance
  1380. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  1381. */
  1382. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
  1383. {
  1384. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos);
  1385. }
  1386. /**
  1387. * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1388. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor
  1389. * @param DMA2Dx DMA2D Instance
  1390. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1391. * @retval None
  1392. */
  1393. __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  1394. {
  1395. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos));
  1396. }
  1397. /**
  1398. * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1399. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor
  1400. * @param DMA2Dx DMA2D Instance
  1401. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  1402. */
  1403. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
  1404. {
  1405. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos);
  1406. }
  1407. /**
  1408. * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1409. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor
  1410. * @param DMA2Dx DMA2D Instance
  1411. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1412. * @retval None
  1413. */
  1414. __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  1415. {
  1416. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue);
  1417. }
  1418. /**
  1419. * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1420. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor
  1421. * @param DMA2Dx DMA2D Instance
  1422. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  1423. */
  1424. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
  1425. {
  1426. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE));
  1427. }
  1428. /**
  1429. * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1430. * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr
  1431. * @param DMA2Dx DMA2D Instance
  1432. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1433. * @retval None
  1434. */
  1435. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  1436. {
  1437. LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress);
  1438. }
  1439. /**
  1440. * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1441. * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr
  1442. * @param DMA2Dx DMA2D Instance
  1443. * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1444. */
  1445. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
  1446. {
  1447. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR));
  1448. }
  1449. /**
  1450. * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1451. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize
  1452. * @param DMA2Dx DMA2D Instance
  1453. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  1454. * @retval None
  1455. */
  1456. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  1457. {
  1458. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos));
  1459. }
  1460. /**
  1461. * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1462. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize
  1463. * @param DMA2Dx DMA2D Instance
  1464. * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF
  1465. */
  1466. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
  1467. {
  1468. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos);
  1469. }
  1470. /**
  1471. * @brief Set DMA2D background CLUT color mode.
  1472. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode
  1473. * @param DMA2Dx DMA2D Instance
  1474. * @param CLUTColorMode This parameter can be one of the following values:
  1475. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1476. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1477. * @retval None
  1478. */
  1479. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1480. {
  1481. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode);
  1482. }
  1483. /**
  1484. * @brief Return DMA2D background CLUT color mode.
  1485. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode
  1486. * @param DMA2Dx DMA2D Instance
  1487. * @retval Returned value can be one of the following values:
  1488. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1489. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1490. */
  1491. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
  1492. {
  1493. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM));
  1494. }
  1495. /**
  1496. * @}
  1497. */
  1498. /**
  1499. * @}
  1500. */
  1501. /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management
  1502. * @{
  1503. */
  1504. /**
  1505. * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not
  1506. * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE
  1507. * @param DMA2Dx DMA2D Instance
  1508. * @retval State of bit (1 or 0).
  1509. */
  1510. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1511. {
  1512. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF)) ? 1UL : 0UL);
  1513. }
  1514. /**
  1515. * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not
  1516. * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC
  1517. * @param DMA2Dx DMA2D Instance
  1518. * @retval State of bit (1 or 0).
  1519. */
  1520. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1521. {
  1522. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF)) ? 1UL : 0UL);
  1523. }
  1524. /**
  1525. * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not
  1526. * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE
  1527. * @param DMA2Dx DMA2D Instance
  1528. * @retval State of bit (1 or 0).
  1529. */
  1530. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1531. {
  1532. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF)) ? 1UL : 0UL);
  1533. }
  1534. /**
  1535. * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not
  1536. * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW
  1537. * @param DMA2Dx DMA2D Instance
  1538. * @retval State of bit (1 or 0).
  1539. */
  1540. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1541. {
  1542. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF)) ? 1UL : 0UL);
  1543. }
  1544. /**
  1545. * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not
  1546. * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC
  1547. * @param DMA2Dx DMA2D Instance
  1548. * @retval State of bit (1 or 0).
  1549. */
  1550. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1551. {
  1552. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF)) ? 1UL : 0UL);
  1553. }
  1554. /**
  1555. * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not
  1556. * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE
  1557. * @param DMA2Dx DMA2D Instance
  1558. * @retval State of bit (1 or 0).
  1559. */
  1560. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1561. {
  1562. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF)) ? 1UL : 0UL);
  1563. }
  1564. /**
  1565. * @brief Clear DMA2D Configuration Error Interrupt Flag
  1566. * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE
  1567. * @param DMA2Dx DMA2D Instance
  1568. * @retval None
  1569. */
  1570. __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1571. {
  1572. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF);
  1573. }
  1574. /**
  1575. * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag
  1576. * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC
  1577. * @param DMA2Dx DMA2D Instance
  1578. * @retval None
  1579. */
  1580. __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1581. {
  1582. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF);
  1583. }
  1584. /**
  1585. * @brief Clear DMA2D CLUT Access Error Interrupt Flag
  1586. * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE
  1587. * @param DMA2Dx DMA2D Instance
  1588. * @retval None
  1589. */
  1590. __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1591. {
  1592. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF);
  1593. }
  1594. /**
  1595. * @brief Clear DMA2D Transfer Watermark Interrupt Flag
  1596. * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW
  1597. * @param DMA2Dx DMA2D Instance
  1598. * @retval None
  1599. */
  1600. __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1601. {
  1602. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF);
  1603. }
  1604. /**
  1605. * @brief Clear DMA2D Transfer Complete Interrupt Flag
  1606. * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC
  1607. * @param DMA2Dx DMA2D Instance
  1608. * @retval None
  1609. */
  1610. __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1611. {
  1612. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF);
  1613. }
  1614. /**
  1615. * @brief Clear DMA2D Transfer Error Interrupt Flag
  1616. * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE
  1617. * @param DMA2Dx DMA2D Instance
  1618. * @retval None
  1619. */
  1620. __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1621. {
  1622. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF);
  1623. }
  1624. /**
  1625. * @}
  1626. */
  1627. /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management
  1628. * @{
  1629. */
  1630. /**
  1631. * @brief Enable Configuration Error Interrupt
  1632. * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE
  1633. * @param DMA2Dx DMA2D Instance
  1634. * @retval None
  1635. */
  1636. __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1637. {
  1638. SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1639. }
  1640. /**
  1641. * @brief Enable CLUT Transfer Complete Interrupt
  1642. * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC
  1643. * @param DMA2Dx DMA2D Instance
  1644. * @retval None
  1645. */
  1646. __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1647. {
  1648. SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1649. }
  1650. /**
  1651. * @brief Enable CLUT Access Error Interrupt
  1652. * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE
  1653. * @param DMA2Dx DMA2D Instance
  1654. * @retval None
  1655. */
  1656. __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1657. {
  1658. SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1659. }
  1660. /**
  1661. * @brief Enable Transfer Watermark Interrupt
  1662. * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW
  1663. * @param DMA2Dx DMA2D Instance
  1664. * @retval None
  1665. */
  1666. __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1667. {
  1668. SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1669. }
  1670. /**
  1671. * @brief Enable Transfer Complete Interrupt
  1672. * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC
  1673. * @param DMA2Dx DMA2D Instance
  1674. * @retval None
  1675. */
  1676. __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1677. {
  1678. SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1679. }
  1680. /**
  1681. * @brief Enable Transfer Error Interrupt
  1682. * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE
  1683. * @param DMA2Dx DMA2D Instance
  1684. * @retval None
  1685. */
  1686. __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1687. {
  1688. SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1689. }
  1690. /**
  1691. * @brief Disable Configuration Error Interrupt
  1692. * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE
  1693. * @param DMA2Dx DMA2D Instance
  1694. * @retval None
  1695. */
  1696. __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1697. {
  1698. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1699. }
  1700. /**
  1701. * @brief Disable CLUT Transfer Complete Interrupt
  1702. * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC
  1703. * @param DMA2Dx DMA2D Instance
  1704. * @retval None
  1705. */
  1706. __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1707. {
  1708. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1709. }
  1710. /**
  1711. * @brief Disable CLUT Access Error Interrupt
  1712. * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE
  1713. * @param DMA2Dx DMA2D Instance
  1714. * @retval None
  1715. */
  1716. __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1717. {
  1718. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1719. }
  1720. /**
  1721. * @brief Disable Transfer Watermark Interrupt
  1722. * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW
  1723. * @param DMA2Dx DMA2D Instance
  1724. * @retval None
  1725. */
  1726. __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1727. {
  1728. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1729. }
  1730. /**
  1731. * @brief Disable Transfer Complete Interrupt
  1732. * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC
  1733. * @param DMA2Dx DMA2D Instance
  1734. * @retval None
  1735. */
  1736. __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1737. {
  1738. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1739. }
  1740. /**
  1741. * @brief Disable Transfer Error Interrupt
  1742. * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE
  1743. * @param DMA2Dx DMA2D Instance
  1744. * @retval None
  1745. */
  1746. __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1747. {
  1748. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1749. }
  1750. /**
  1751. * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled.
  1752. * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE
  1753. * @param DMA2Dx DMA2D Instance
  1754. * @retval State of bit (1 or 0).
  1755. */
  1756. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx)
  1757. {
  1758. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE)) ? 1UL : 0UL);
  1759. }
  1760. /**
  1761. * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled.
  1762. * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC
  1763. * @param DMA2Dx DMA2D Instance
  1764. * @retval State of bit (1 or 0).
  1765. */
  1766. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1767. {
  1768. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE)) ? 1UL : 0UL);
  1769. }
  1770. /**
  1771. * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled.
  1772. * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE
  1773. * @param DMA2Dx DMA2D Instance
  1774. * @retval State of bit (1 or 0).
  1775. */
  1776. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1777. {
  1778. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)) ? 1UL : 0UL);
  1779. }
  1780. /**
  1781. * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled.
  1782. * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW
  1783. * @param DMA2Dx DMA2D Instance
  1784. * @retval State of bit (1 or 0).
  1785. */
  1786. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx)
  1787. {
  1788. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)) ? 1UL : 0UL);
  1789. }
  1790. /**
  1791. * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled.
  1792. * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC
  1793. * @param DMA2Dx DMA2D Instance
  1794. * @retval State of bit (1 or 0).
  1795. */
  1796. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx)
  1797. {
  1798. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE)) ? 1UL : 0UL);
  1799. }
  1800. /**
  1801. * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled.
  1802. * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE
  1803. * @param DMA2Dx DMA2D Instance
  1804. * @retval State of bit (1 or 0).
  1805. */
  1806. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx)
  1807. {
  1808. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)) ? 1UL : 0UL);
  1809. }
  1810. /**
  1811. * @}
  1812. */
  1813. #if defined(USE_FULL_LL_DRIVER)
  1814. /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions
  1815. * @{
  1816. */
  1817. ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx);
  1818. ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1819. void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1820. void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx);
  1821. void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg);
  1822. void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct);
  1823. uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1824. uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1825. uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1826. uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1827. void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines);
  1828. /**
  1829. * @}
  1830. */
  1831. #endif /* USE_FULL_LL_DRIVER */
  1832. /**
  1833. * @}
  1834. */
  1835. /**
  1836. * @}
  1837. */
  1838. #endif /* defined (DMA2D) */
  1839. /**
  1840. * @}
  1841. */
  1842. #ifdef __cplusplus
  1843. }
  1844. #endif
  1845. #endif /* STM32H7xx_LL_DMA2D_H */
  1846. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/