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  1. /**
  2. ******************************************************************************
  3. * @file stm32f7xx_ll_sdmmc.c
  4. * @author MCD Application Team
  5. * @version V1.2.2
  6. * @date 14-April-2017
  7. * @brief SDMMC Low Layer HAL module driver.
  8. *
  9. * This file provides firmware functions to manage the following
  10. * functionalities of the SDMMC peripheral:
  11. * + Initialization/de-initialization functions
  12. * + I/O operation functions
  13. * + Peripheral Control functions
  14. * + Peripheral State functions
  15. *
  16. @verbatim
  17. ==============================================================================
  18. ##### SDMMC peripheral features #####
  19. ==============================================================================
  20. [..] The SD/SDMMC MMC card host interface (SDMMC) provides an interface between the APB2
  21. peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDMMC cards and CE-ATA
  22. devices.
  23. [..] The SDMMC features include the following:
  24. (+) Full compliance with MultiMedia Card System Specification Version 4.2. Card support
  25. for three different databus modes: 1-bit (default), 4-bit and 8-bit
  26. (+) Full compatibility with previous versions of MultiMedia Cards (forward compatibility)
  27. (+) Full compliance with SD Memory Card Specifications Version 2.0
  28. (+) Full compliance with SD I/O Card Specification Version 2.0: card support for two
  29. different data bus modes: 1-bit (default) and 4-bit
  30. (+) Full support of the CE-ATA features (full compliance with CE-ATA digital protocol
  31. Rev1.1)
  32. (+) Data transfer up to 48 MHz for the 8 bit mode
  33. (+) Data and command output enable signals to control external bidirectional drivers.
  34. ##### How to use this driver #####
  35. ==============================================================================
  36. [..]
  37. This driver is a considered as a driver of service for external devices drivers
  38. that interfaces with the SDMMC peripheral.
  39. According to the device used (SD card/ MMC card / SDMMC card ...), a set of APIs
  40. is used in the device's driver to perform SDMMC operations and functionalities.
  41. This driver is almost transparent for the final user, it is only used to implement other
  42. functionalities of the external device.
  43. [..]
  44. (+) The SDMMC clock (SDMMCCLK = 48 MHz) is coming from a specific output of PLL
  45. (PLL48CLK). Before start working with SDMMC peripheral make sure that the
  46. PLL is well configured.
  47. The SDMMC peripheral uses two clock signals:
  48. (++) SDMMC adapter clock (SDMMCCLK = 48 MHz)
  49. (++) APB2 bus clock (PCLK2)
  50. -@@- PCLK2 and SDMMC_CK clock frequencies must respect the following condition:
  51. Frequency(PCLK2) >= (3 / 8 x Frequency(SDMMC_CK))
  52. (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDMMC
  53. peripheral.
  54. (+) Enable the Power ON State using the SDMMC_PowerState_ON(SDMMCx)
  55. function and disable it using the function SDMMC_PowerState_OFF(SDMMCx).
  56. (+) Enable/Disable the clock using the __SDMMC_ENABLE()/__SDMMC_DISABLE() macros.
  57. (+) Enable/Disable the peripheral interrupts using the macros __SDMMC_ENABLE_IT(hSDMMC, IT)
  58. and __SDMMC_DISABLE_IT(hSDMMC, IT) if you need to use interrupt mode.
  59. (+) When using the DMA mode
  60. (++) Configure the DMA in the MSP layer of the external device
  61. (++) Active the needed channel Request
  62. (++) Enable the DMA using __SDMMC_DMA_ENABLE() macro or Disable it using the macro
  63. __SDMMC_DMA_DISABLE().
  64. (+) To control the CPSM (Command Path State Machine) and send
  65. commands to the card use the SDMMC_SendCommand(SDMMCx),
  66. SDMMC_GetCommandResponse() and SDMMC_GetResponse() functions. First, user has
  67. to fill the command structure (pointer to SDMMC_CmdInitTypeDef) according
  68. to the selected command to be sent.
  69. The parameters that should be filled are:
  70. (++) Command Argument
  71. (++) Command Index
  72. (++) Command Response type
  73. (++) Command Wait
  74. (++) CPSM Status (Enable or Disable).
  75. -@@- To check if the command is well received, read the SDMMC_CMDRESP
  76. register using the SDMMC_GetCommandResponse().
  77. The SDMMC responses registers (SDMMC_RESP1 to SDMMC_RESP2), use the
  78. SDMMC_GetResponse() function.
  79. (+) To control the DPSM (Data Path State Machine) and send/receive
  80. data to/from the card use the SDMMC_DataConfig(), SDMMC_GetDataCounter(),
  81. SDMMC_ReadFIFO(), SDMMC_WriteFIFO() and SDMMC_GetFIFOCount() functions.
  82. *** Read Operations ***
  83. =======================
  84. [..]
  85. (#) First, user has to fill the data structure (pointer to
  86. SDMMC_DataInitTypeDef) according to the selected data type to be received.
  87. The parameters that should be filled are:
  88. (++) Data TimeOut
  89. (++) Data Length
  90. (++) Data Block size
  91. (++) Data Transfer direction: should be from card (To SDMMC)
  92. (++) Data Transfer mode
  93. (++) DPSM Status (Enable or Disable)
  94. (#) Configure the SDMMC resources to receive the data from the card
  95. according to selected transfer mode (Refer to Step 8, 9 and 10).
  96. (#) Send the selected Read command (refer to step 11).
  97. (#) Use the SDMMC flags/interrupts to check the transfer status.
  98. *** Write Operations ***
  99. ========================
  100. [..]
  101. (#) First, user has to fill the data structure (pointer to
  102. SDMMC_DataInitTypeDef) according to the selected data type to be received.
  103. The parameters that should be filled are:
  104. (++) Data TimeOut
  105. (++) Data Length
  106. (++) Data Block size
  107. (++) Data Transfer direction: should be to card (To CARD)
  108. (++) Data Transfer mode
  109. (++) DPSM Status (Enable or Disable)
  110. (#) Configure the SDMMC resources to send the data to the card according to
  111. selected transfer mode.
  112. (#) Send the selected Write command.
  113. (#) Use the SDMMC flags/interrupts to check the transfer status.
  114. *** Command management operations ***
  115. =====================================
  116. [..]
  117. (#) The commands used for Read/Write//Erase operations are managed in
  118. separate functions.
  119. Each function allows to send the needed command with the related argument,
  120. then check the response.
  121. By the same approach, you could implement a command and check the response.
  122. @endverbatim
  123. ******************************************************************************
  124. * @attention
  125. *
  126. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  127. *
  128. * Redistribution and use in source and binary forms, with or without modification,
  129. * are permitted provided that the following conditions are met:
  130. * 1. Redistributions of source code must retain the above copyright notice,
  131. * this list of conditions and the following disclaimer.
  132. * 2. Redistributions in binary form must reproduce the above copyright notice,
  133. * this list of conditions and the following disclaimer in the documentation
  134. * and/or other materials provided with the distribution.
  135. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  136. * may be used to endorse or promote products derived from this software
  137. * without specific prior written permission.
  138. *
  139. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  140. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  141. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  142. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  143. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  144. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  145. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  146. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  147. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  148. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  149. *
  150. ******************************************************************************
  151. */
  152. /* Includes ------------------------------------------------------------------*/
  153. #include "stm32f7xx_hal.h"
  154. /** @addtogroup STM32F7xx_HAL_Driver
  155. * @{
  156. */
  157. /** @defgroup SDMMC_LL SDMMC Low Layer
  158. * @brief Low layer module for SD
  159. * @{
  160. */
  161. #if defined (HAL_SD_MODULE_ENABLED) || defined(HAL_MMC_MODULE_ENABLED)
  162. /* Private typedef -----------------------------------------------------------*/
  163. /* Private define ------------------------------------------------------------*/
  164. /* Private macro -------------------------------------------------------------*/
  165. /* Private variables ---------------------------------------------------------*/
  166. /* Private function prototypes -----------------------------------------------*/
  167. static uint32_t SDMMC_GetCmdError(SDMMC_TypeDef *SDMMCx);
  168. static uint32_t SDMMC_GetCmdResp1(SDMMC_TypeDef *SDMMCx, uint8_t SD_CMD, uint32_t Timeout);
  169. static uint32_t SDMMC_GetCmdResp2(SDMMC_TypeDef *SDMMCx);
  170. static uint32_t SDMMC_GetCmdResp3(SDMMC_TypeDef *SDMMCx);
  171. static uint32_t SDMMC_GetCmdResp7(SDMMC_TypeDef *SDMMCx);
  172. static uint32_t SDMMC_GetCmdResp6(SDMMC_TypeDef *SDMMCx, uint8_t SD_CMD, uint16_t *pRCA);
  173. /* Exported functions --------------------------------------------------------*/
  174. /** @defgroup SDMMC_LL_Exported_Functions SDMMC Low Layer Exported Functions
  175. * @{
  176. */
  177. /** @defgroup HAL_SDMMC_LL_Group1 Initialization de-initialization functions
  178. * @brief Initialization and Configuration functions
  179. *
  180. @verbatim
  181. ===============================================================================
  182. ##### Initialization/de-initialization functions #####
  183. ===============================================================================
  184. [..] This section provides functions allowing to:
  185. @endverbatim
  186. * @{
  187. */
  188. /**
  189. * @brief Initializes the SDMMC according to the specified
  190. * parameters in the SDMMC_InitTypeDef and create the associated handle.
  191. * @param SDMMCx: Pointer to SDMMC register base
  192. * @param Init: SDMMC initialization structure
  193. * @retval HAL status
  194. */
  195. HAL_StatusTypeDef SDMMC_Init(SDMMC_TypeDef *SDMMCx, SDMMC_InitTypeDef Init)
  196. {
  197. uint32_t tmpreg = 0;
  198. /* Check the parameters */
  199. assert_param(IS_SDMMC_ALL_INSTANCE(SDMMCx));
  200. assert_param(IS_SDMMC_CLOCK_EDGE(Init.ClockEdge));
  201. assert_param(IS_SDMMC_CLOCK_BYPASS(Init.ClockBypass));
  202. assert_param(IS_SDMMC_CLOCK_POWER_SAVE(Init.ClockPowerSave));
  203. assert_param(IS_SDMMC_BUS_WIDE(Init.BusWide));
  204. assert_param(IS_SDMMC_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl));
  205. assert_param(IS_SDMMC_CLKDIV(Init.ClockDiv));
  206. /* Set SDMMC configuration parameters */
  207. tmpreg |= (Init.ClockEdge |\
  208. Init.ClockBypass |\
  209. Init.ClockPowerSave |\
  210. Init.BusWide |\
  211. Init.HardwareFlowControl |\
  212. Init.ClockDiv
  213. );
  214. /* Write to SDMMC CLKCR */
  215. MODIFY_REG(SDMMCx->CLKCR, CLKCR_CLEAR_MASK, tmpreg);
  216. return HAL_OK;
  217. }
  218. /**
  219. * @}
  220. */
  221. /** @defgroup HAL_SDMMC_LL_Group2 IO operation functions
  222. * @brief Data transfers functions
  223. *
  224. @verbatim
  225. ===============================================================================
  226. ##### I/O operation functions #####
  227. ===============================================================================
  228. [..]
  229. This subsection provides a set of functions allowing to manage the SDMMC data
  230. transfers.
  231. @endverbatim
  232. * @{
  233. */
  234. /**
  235. * @brief Read data (word) from Rx FIFO in blocking mode (polling)
  236. * @param SDMMCx: Pointer to SDMMC register base
  237. * @retval HAL status
  238. */
  239. uint32_t SDMMC_ReadFIFO(SDMMC_TypeDef *SDMMCx)
  240. {
  241. /* Read data from Rx FIFO */
  242. return (SDMMCx->FIFO);
  243. }
  244. /**
  245. * @brief Write data (word) to Tx FIFO in blocking mode (polling)
  246. * @param SDMMCx: Pointer to SDMMC register base
  247. * @param pWriteData: pointer to data to write
  248. * @retval HAL status
  249. */
  250. HAL_StatusTypeDef SDMMC_WriteFIFO(SDMMC_TypeDef *SDMMCx, uint32_t *pWriteData)
  251. {
  252. /* Write data to FIFO */
  253. SDMMCx->FIFO = *pWriteData;
  254. return HAL_OK;
  255. }
  256. /**
  257. * @}
  258. */
  259. /** @defgroup HAL_SDMMC_LL_Group3 Peripheral Control functions
  260. * @brief management functions
  261. *
  262. @verbatim
  263. ===============================================================================
  264. ##### Peripheral Control functions #####
  265. ===============================================================================
  266. [..]
  267. This subsection provides a set of functions allowing to control the SDMMC data
  268. transfers.
  269. @endverbatim
  270. * @{
  271. */
  272. /**
  273. * @brief Set SDMMC Power state to ON.
  274. * @param SDMMCx: Pointer to SDMMC register base
  275. * @retval HAL status
  276. */
  277. HAL_StatusTypeDef SDMMC_PowerState_ON(SDMMC_TypeDef *SDMMCx)
  278. {
  279. /* Set power state to ON */
  280. SDMMCx->POWER = SDMMC_POWER_PWRCTRL;
  281. return HAL_OK;
  282. }
  283. /**
  284. * @brief Set SDMMC Power state to OFF.
  285. * @param SDMMCx: Pointer to SDMMC register base
  286. * @retval HAL status
  287. */
  288. HAL_StatusTypeDef SDMMC_PowerState_OFF(SDMMC_TypeDef *SDMMCx)
  289. {
  290. /* Set power state to OFF */
  291. SDMMCx->POWER = (uint32_t)0x00000000;
  292. return HAL_OK;
  293. }
  294. /**
  295. * @brief Get SDMMC Power state.
  296. * @param SDMMCx: Pointer to SDMMC register base
  297. * @retval Power status of the controller. The returned value can be one of the
  298. * following values:
  299. * - 0x00: Power OFF
  300. * - 0x02: Power UP
  301. * - 0x03: Power ON
  302. */
  303. uint32_t SDMMC_GetPowerState(SDMMC_TypeDef *SDMMCx)
  304. {
  305. return (SDMMCx->POWER & SDMMC_POWER_PWRCTRL);
  306. }
  307. /**
  308. * @brief Configure the SDMMC command path according to the specified parameters in
  309. * SDMMC_CmdInitTypeDef structure and send the command
  310. * @param SDMMCx: Pointer to SDMMC register base
  311. * @param Command: pointer to a SDMMC_CmdInitTypeDef structure that contains
  312. * the configuration information for the SDMMC command
  313. * @retval HAL status
  314. */
  315. HAL_StatusTypeDef SDMMC_SendCommand(SDMMC_TypeDef *SDMMCx, SDMMC_CmdInitTypeDef *Command)
  316. {
  317. uint32_t tmpreg = 0;
  318. /* Check the parameters */
  319. assert_param(IS_SDMMC_CMD_INDEX(Command->CmdIndex));
  320. assert_param(IS_SDMMC_RESPONSE(Command->Response));
  321. assert_param(IS_SDMMC_WAIT(Command->WaitForInterrupt));
  322. assert_param(IS_SDMMC_CPSM(Command->CPSM));
  323. /* Set the SDMMC Argument value */
  324. SDMMCx->ARG = Command->Argument;
  325. /* Set SDMMC command parameters */
  326. tmpreg |= (uint32_t)(Command->CmdIndex |\
  327. Command->Response |\
  328. Command->WaitForInterrupt |\
  329. Command->CPSM);
  330. /* Write to SDMMC CMD register */
  331. MODIFY_REG(SDMMCx->CMD, CMD_CLEAR_MASK, tmpreg);
  332. return HAL_OK;
  333. }
  334. /**
  335. * @brief Return the command index of last command for which response received
  336. * @param SDMMCx: Pointer to SDMMC register base
  337. * @retval Command index of the last command response received
  338. */
  339. uint8_t SDMMC_GetCommandResponse(SDMMC_TypeDef *SDMMCx)
  340. {
  341. return (uint8_t)(SDMMCx->RESPCMD);
  342. }
  343. /**
  344. * @brief Return the response received from the card for the last command
  345. * @param SDMMCx: Pointer to SDMMC register base
  346. * @param Response: Specifies the SDMMC response register.
  347. * This parameter can be one of the following values:
  348. * @arg SDMMC_RESP1: Response Register 1
  349. * @arg SDMMC_RESP2: Response Register 2
  350. * @arg SDMMC_RESP3: Response Register 3
  351. * @arg SDMMC_RESP4: Response Register 4
  352. * @retval The Corresponding response register value
  353. */
  354. uint32_t SDMMC_GetResponse(SDMMC_TypeDef *SDMMCx, uint32_t Response)
  355. {
  356. __IO uint32_t tmp = 0;
  357. /* Check the parameters */
  358. assert_param(IS_SDMMC_RESP(Response));
  359. /* Get the response */
  360. tmp = (uint32_t)&(SDMMCx->RESP1) + Response;
  361. return (*(__IO uint32_t *) tmp);
  362. }
  363. /**
  364. * @brief Configure the SDMMC data path according to the specified
  365. * parameters in the SDMMC_DataInitTypeDef.
  366. * @param SDMMCx: Pointer to SDMMC register base
  367. * @param Data : pointer to a SDMMC_DataInitTypeDef structure
  368. * that contains the configuration information for the SDMMC data.
  369. * @retval HAL status
  370. */
  371. HAL_StatusTypeDef SDMMC_ConfigData(SDMMC_TypeDef *SDMMCx, SDMMC_DataInitTypeDef* Data)
  372. {
  373. uint32_t tmpreg = 0;
  374. /* Check the parameters */
  375. assert_param(IS_SDMMC_DATA_LENGTH(Data->DataLength));
  376. assert_param(IS_SDMMC_BLOCK_SIZE(Data->DataBlockSize));
  377. assert_param(IS_SDMMC_TRANSFER_DIR(Data->TransferDir));
  378. assert_param(IS_SDMMC_TRANSFER_MODE(Data->TransferMode));
  379. assert_param(IS_SDMMC_DPSM(Data->DPSM));
  380. /* Set the SDMMC Data TimeOut value */
  381. SDMMCx->DTIMER = Data->DataTimeOut;
  382. /* Set the SDMMC DataLength value */
  383. SDMMCx->DLEN = Data->DataLength;
  384. /* Set the SDMMC data configuration parameters */
  385. tmpreg |= (uint32_t)(Data->DataBlockSize |\
  386. Data->TransferDir |\
  387. Data->TransferMode |\
  388. Data->DPSM);
  389. /* Write to SDMMC DCTRL */
  390. MODIFY_REG(SDMMCx->DCTRL, DCTRL_CLEAR_MASK, tmpreg);
  391. return HAL_OK;
  392. }
  393. /**
  394. * @brief Returns number of remaining data bytes to be transferred.
  395. * @param SDMMCx: Pointer to SDMMC register base
  396. * @retval Number of remaining data bytes to be transferred
  397. */
  398. uint32_t SDMMC_GetDataCounter(SDMMC_TypeDef *SDMMCx)
  399. {
  400. return (SDMMCx->DCOUNT);
  401. }
  402. /**
  403. * @brief Get the FIFO data
  404. * @param SDMMCx: Pointer to SDMMC register base
  405. * @retval Data received
  406. */
  407. uint32_t SDMMC_GetFIFOCount(SDMMC_TypeDef *SDMMCx)
  408. {
  409. return (SDMMCx->FIFO);
  410. }
  411. /**
  412. * @brief Sets one of the two options of inserting read wait interval.
  413. * @param SDMMCx: Pointer to SDMMC register base
  414. * @param SDMMC_ReadWaitMode: SDMMC Read Wait operation mode.
  415. * This parameter can be:
  416. * @arg SDMMC_READ_WAIT_MODE_CLK: Read Wait control by stopping SDMMCCLK
  417. * @arg SDMMC_READ_WAIT_MODE_DATA2: Read Wait control using SDMMC_DATA2
  418. * @retval None
  419. */
  420. HAL_StatusTypeDef SDMMC_SetSDMMCReadWaitMode(SDMMC_TypeDef *SDMMCx, uint32_t SDMMC_ReadWaitMode)
  421. {
  422. /* Check the parameters */
  423. assert_param(IS_SDMMC_READWAIT_MODE(SDMMC_ReadWaitMode));
  424. /* Set SDMMC read wait mode */
  425. MODIFY_REG(SDMMCx->DCTRL, SDMMC_DCTRL_RWMOD, SDMMC_ReadWaitMode);
  426. return HAL_OK;
  427. }
  428. /**
  429. * @}
  430. */
  431. /** @defgroup HAL_SDMMC_LL_Group4 Command management functions
  432. * @brief Data transfers functions
  433. *
  434. @verbatim
  435. ===============================================================================
  436. ##### Commands management functions #####
  437. ===============================================================================
  438. [..]
  439. This subsection provides a set of functions allowing to manage the needed commands.
  440. @endverbatim
  441. * @{
  442. */
  443. /**
  444. * @brief Send the Data Block Lenght command and check the response
  445. * @param SDMMCx: Pointer to SDMMC register base
  446. * @retval HAL status
  447. */
  448. uint32_t SDMMC_CmdBlockLength(SDMMC_TypeDef *SDMMCx, uint32_t BlockSize)
  449. {
  450. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  451. uint32_t errorstate = SDMMC_ERROR_NONE;
  452. /* Set Block Size for Card */
  453. sdmmc_cmdinit.Argument = (uint32_t)BlockSize;
  454. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_BLOCKLEN;
  455. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  456. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  457. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  458. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  459. /* Check for error conditions */
  460. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SET_BLOCKLEN, SDMMC_CMDTIMEOUT);
  461. return errorstate;
  462. }
  463. /**
  464. * @brief Send the Read Single Block command and check the response
  465. * @param SDMMCx: Pointer to SDMMC register base
  466. * @retval HAL status
  467. */
  468. uint32_t SDMMC_CmdReadSingleBlock(SDMMC_TypeDef *SDMMCx, uint32_t ReadAdd)
  469. {
  470. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  471. uint32_t errorstate = SDMMC_ERROR_NONE;
  472. /* Set Block Size for Card */
  473. sdmmc_cmdinit.Argument = (uint32_t)ReadAdd;
  474. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_SINGLE_BLOCK;
  475. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  476. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  477. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  478. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  479. /* Check for error conditions */
  480. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_READ_SINGLE_BLOCK, SDMMC_CMDTIMEOUT);
  481. return errorstate;
  482. }
  483. /**
  484. * @brief Send the Read Multi Block command and check the response
  485. * @param SDMMCx: Pointer to SDMMC register base
  486. * @retval HAL status
  487. */
  488. uint32_t SDMMC_CmdReadMultiBlock(SDMMC_TypeDef *SDMMCx, uint32_t ReadAdd)
  489. {
  490. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  491. uint32_t errorstate = SDMMC_ERROR_NONE;
  492. /* Set Block Size for Card */
  493. sdmmc_cmdinit.Argument = (uint32_t)ReadAdd;
  494. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_MULT_BLOCK;
  495. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  496. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  497. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  498. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  499. /* Check for error conditions */
  500. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_READ_MULT_BLOCK, SDMMC_CMDTIMEOUT);
  501. return errorstate;
  502. }
  503. /**
  504. * @brief Send the Write Single Block command and check the response
  505. * @param SDMMCx: Pointer to SDMMC register base
  506. * @retval HAL status
  507. */
  508. uint32_t SDMMC_CmdWriteSingleBlock(SDMMC_TypeDef *SDMMCx, uint32_t WriteAdd)
  509. {
  510. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  511. uint32_t errorstate = SDMMC_ERROR_NONE;
  512. /* Set Block Size for Card */
  513. sdmmc_cmdinit.Argument = (uint32_t)WriteAdd;
  514. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_SINGLE_BLOCK;
  515. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  516. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  517. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  518. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  519. /* Check for error conditions */
  520. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_WRITE_SINGLE_BLOCK, SDMMC_CMDTIMEOUT);
  521. return errorstate;
  522. }
  523. /**
  524. * @brief Send the Write Multi Block command and check the response
  525. * @param SDMMCx: Pointer to SDMMC register base
  526. * @retval HAL status
  527. */
  528. uint32_t SDMMC_CmdWriteMultiBlock(SDMMC_TypeDef *SDMMCx, uint32_t WriteAdd)
  529. {
  530. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  531. uint32_t errorstate = SDMMC_ERROR_NONE;
  532. /* Set Block Size for Card */
  533. sdmmc_cmdinit.Argument = (uint32_t)WriteAdd;
  534. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_MULT_BLOCK;
  535. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  536. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  537. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  538. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  539. /* Check for error conditions */
  540. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_WRITE_MULT_BLOCK, SDMMC_CMDTIMEOUT);
  541. return errorstate;
  542. }
  543. /**
  544. * @brief Send the Start Address Erase command for SD and check the response
  545. * @param SDMMCx: Pointer to SDMMC register base
  546. * @retval HAL status
  547. */
  548. uint32_t SDMMC_CmdSDEraseStartAdd(SDMMC_TypeDef *SDMMCx, uint32_t StartAdd)
  549. {
  550. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  551. uint32_t errorstate = SDMMC_ERROR_NONE;
  552. /* Set Block Size for Card */
  553. sdmmc_cmdinit.Argument = (uint32_t)StartAdd;
  554. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_ERASE_GRP_START;
  555. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  556. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  557. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  558. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  559. /* Check for error conditions */
  560. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SD_ERASE_GRP_START, SDMMC_CMDTIMEOUT);
  561. return errorstate;
  562. }
  563. /**
  564. * @brief Send the End Address Erase command for SD and check the response
  565. * @param SDMMCx: Pointer to SDMMC register base
  566. * @retval HAL status
  567. */
  568. uint32_t SDMMC_CmdSDEraseEndAdd(SDMMC_TypeDef *SDMMCx, uint32_t EndAdd)
  569. {
  570. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  571. uint32_t errorstate = SDMMC_ERROR_NONE;
  572. /* Set Block Size for Card */
  573. sdmmc_cmdinit.Argument = (uint32_t)EndAdd;
  574. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_ERASE_GRP_END;
  575. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  576. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  577. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  578. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  579. /* Check for error conditions */
  580. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SD_ERASE_GRP_END, SDMMC_CMDTIMEOUT);
  581. return errorstate;
  582. }
  583. /**
  584. * @brief Send the Start Address Erase command and check the response
  585. * @param SDMMCx: Pointer to SDMMC register base
  586. * @retval HAL status
  587. */
  588. uint32_t SDMMC_CmdEraseStartAdd(SDMMC_TypeDef *SDMMCx, uint32_t StartAdd)
  589. {
  590. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  591. uint32_t errorstate = SDMMC_ERROR_NONE;
  592. /* Set Block Size for Card */
  593. sdmmc_cmdinit.Argument = (uint32_t)StartAdd;
  594. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE_GRP_START;
  595. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  596. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  597. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  598. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  599. /* Check for error conditions */
  600. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_ERASE_GRP_START, SDMMC_CMDTIMEOUT);
  601. return errorstate;
  602. }
  603. /**
  604. * @brief Send the End Address Erase command and check the response
  605. * @param SDMMCx: Pointer to SDMMC register base
  606. * @retval HAL status
  607. */
  608. uint32_t SDMMC_CmdEraseEndAdd(SDMMC_TypeDef *SDMMCx, uint32_t EndAdd)
  609. {
  610. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  611. uint32_t errorstate = SDMMC_ERROR_NONE;
  612. /* Set Block Size for Card */
  613. sdmmc_cmdinit.Argument = (uint32_t)EndAdd;
  614. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE_GRP_END;
  615. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  616. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  617. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  618. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  619. /* Check for error conditions */
  620. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_ERASE_GRP_END, SDMMC_CMDTIMEOUT);
  621. return errorstate;
  622. }
  623. /**
  624. * @brief Send the Erase command and check the response
  625. * @param SDMMCx: Pointer to SDMMC register base
  626. * @retval HAL status
  627. */
  628. uint32_t SDMMC_CmdErase(SDMMC_TypeDef *SDMMCx)
  629. {
  630. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  631. uint32_t errorstate = SDMMC_ERROR_NONE;
  632. /* Set Block Size for Card */
  633. sdmmc_cmdinit.Argument = 0;
  634. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE;
  635. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  636. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  637. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  638. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  639. /* Check for error conditions */
  640. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_ERASE, SDMMC_MAXERASETIMEOUT);
  641. return errorstate;
  642. }
  643. /**
  644. * @brief Send the Stop Transfer command and check the response.
  645. * @param SDMMCx: Pointer to SDMMC register base
  646. * @retval HAL status
  647. */
  648. uint32_t SDMMC_CmdStopTransfer(SDMMC_TypeDef *SDMMCx)
  649. {
  650. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  651. uint32_t errorstate = SDMMC_ERROR_NONE;
  652. /* Send CMD12 STOP_TRANSMISSION */
  653. sdmmc_cmdinit.Argument = 0;
  654. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_STOP_TRANSMISSION;
  655. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  656. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  657. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  658. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  659. /* Check for error conditions */
  660. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_STOP_TRANSMISSION, 100000000/*SDMMC_CMDTIMEOUT*/);
  661. return errorstate;
  662. }
  663. /**
  664. * @brief Send the Select Deselect command and check the response.
  665. * @param SDMMCx: Pointer to SDMMC register base
  666. * @param addr: Address of the card to be selected
  667. * @retval HAL status
  668. */
  669. uint32_t SDMMC_CmdSelDesel(SDMMC_TypeDef *SDMMCx, uint64_t Addr)
  670. {
  671. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  672. uint32_t errorstate = SDMMC_ERROR_NONE;
  673. /* Send CMD7 SDMMC_SEL_DESEL_CARD */
  674. sdmmc_cmdinit.Argument = (uint32_t)Addr;
  675. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEL_DESEL_CARD;
  676. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  677. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  678. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  679. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  680. /* Check for error conditions */
  681. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SEL_DESEL_CARD, SDMMC_CMDTIMEOUT);
  682. return errorstate;
  683. }
  684. /**
  685. * @brief Send the Go Idle State command and check the response.
  686. * @param SDMMCx: Pointer to SDMMC register base
  687. * @retval HAL status
  688. */
  689. uint32_t SDMMC_CmdGoIdleState(SDMMC_TypeDef *SDMMCx)
  690. {
  691. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  692. uint32_t errorstate = SDMMC_ERROR_NONE;
  693. sdmmc_cmdinit.Argument = 0;
  694. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_GO_IDLE_STATE;
  695. sdmmc_cmdinit.Response = SDMMC_RESPONSE_NO;
  696. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  697. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  698. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  699. /* Check for error conditions */
  700. errorstate = SDMMC_GetCmdError(SDMMCx);
  701. return errorstate;
  702. }
  703. /**
  704. * @brief Send the Operating Condition command and check the response.
  705. * @param SDMMCx: Pointer to SDMMC register base
  706. * @retval HAL status
  707. */
  708. uint32_t SDMMC_CmdOperCond(SDMMC_TypeDef *SDMMCx)
  709. {
  710. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  711. uint32_t errorstate = SDMMC_ERROR_NONE;
  712. /* Send CMD8 to verify SD card interface operating condition */
  713. /* Argument: - [31:12]: Reserved (shall be set to '0')
  714. - [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V)
  715. - [7:0]: Check Pattern (recommended 0xAA) */
  716. /* CMD Response: R7 */
  717. sdmmc_cmdinit.Argument = SDMMC_CHECK_PATTERN;
  718. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SEND_EXT_CSD;
  719. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  720. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  721. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  722. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  723. /* Check for error conditions */
  724. errorstate = SDMMC_GetCmdResp7(SDMMCx);
  725. return errorstate;
  726. }
  727. /**
  728. * @brief Send the Application command to verify that that the next command
  729. * is an application specific com-mand rather than a standard command
  730. * and check the response.
  731. * @param SDMMCx: Pointer to SDMMC register base
  732. * @retval HAL status
  733. */
  734. uint32_t SDMMC_CmdAppCommand(SDMMC_TypeDef *SDMMCx, uint32_t Argument)
  735. {
  736. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  737. uint32_t errorstate = SDMMC_ERROR_NONE;
  738. sdmmc_cmdinit.Argument = (uint32_t)Argument;
  739. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_CMD;
  740. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  741. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  742. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  743. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  744. /* Check for error conditions */
  745. /* If there is a HAL_ERROR, it is a MMC card, else
  746. it is a SD card: SD card 2.0 (voltage range mismatch)
  747. or SD card 1.x */
  748. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_APP_CMD, SDMMC_CMDTIMEOUT);
  749. return errorstate;
  750. }
  751. /**
  752. * @brief Send the command asking the accessed card to send its operating
  753. * condition register (OCR)
  754. * @param SDMMCx: Pointer to SDMMC register base
  755. * @retval HAL status
  756. */
  757. uint32_t SDMMC_CmdAppOperCommand(SDMMC_TypeDef *SDMMCx, uint32_t SdType)
  758. {
  759. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  760. uint32_t errorstate = SDMMC_ERROR_NONE;
  761. sdmmc_cmdinit.Argument = SDMMC_VOLTAGE_WINDOW_SD | SdType;
  762. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_OP_COND;
  763. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  764. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  765. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  766. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  767. /* Check for error conditions */
  768. errorstate = SDMMC_GetCmdResp3(SDMMCx);
  769. return errorstate;
  770. }
  771. /**
  772. * @brief Send the Bus Width command and check the response.
  773. * @param SDMMCx: Pointer to SDMMC register base
  774. * @retval HAL status
  775. */
  776. uint32_t SDMMC_CmdBusWidth(SDMMC_TypeDef *SDMMCx, uint32_t BusWidth)
  777. {
  778. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  779. uint32_t errorstate = SDMMC_ERROR_NONE;
  780. sdmmc_cmdinit.Argument = (uint32_t)BusWidth;
  781. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_SD_SET_BUSWIDTH;
  782. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  783. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  784. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  785. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  786. /* Check for error conditions */
  787. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_APP_SD_SET_BUSWIDTH, SDMMC_CMDTIMEOUT);
  788. return errorstate;
  789. }
  790. /**
  791. * @brief Send the Send SCR command and check the response.
  792. * @param SDMMCx: Pointer to SDMMC register base
  793. * @retval HAL status
  794. */
  795. uint32_t SDMMC_CmdSendSCR(SDMMC_TypeDef *SDMMCx)
  796. {
  797. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  798. uint32_t errorstate = SDMMC_ERROR_NONE;
  799. /* Send CMD51 SD_APP_SEND_SCR */
  800. sdmmc_cmdinit.Argument = 0;
  801. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_SEND_SCR;
  802. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  803. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  804. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  805. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  806. /* Check for error conditions */
  807. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SD_APP_SEND_SCR, SDMMC_CMDTIMEOUT);
  808. return errorstate;
  809. }
  810. /**
  811. * @brief Send the Send CID command and check the response.
  812. * @param SDMMCx: Pointer to SDMMC register base
  813. * @retval HAL status
  814. */
  815. uint32_t SDMMC_CmdSendCID(SDMMC_TypeDef *SDMMCx)
  816. {
  817. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  818. uint32_t errorstate = SDMMC_ERROR_NONE;
  819. /* Send CMD2 ALL_SEND_CID */
  820. sdmmc_cmdinit.Argument = 0;
  821. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ALL_SEND_CID;
  822. sdmmc_cmdinit.Response = SDMMC_RESPONSE_LONG;
  823. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  824. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  825. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  826. /* Check for error conditions */
  827. errorstate = SDMMC_GetCmdResp2(SDMMCx);
  828. return errorstate;
  829. }
  830. /**
  831. * @brief Send the Send CSD command and check the response.
  832. * @param SDMMCx: Pointer to SDMMC register base
  833. * @retval HAL status
  834. */
  835. uint32_t SDMMC_CmdSendCSD(SDMMC_TypeDef *SDMMCx, uint32_t Argument)
  836. {
  837. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  838. uint32_t errorstate = SDMMC_ERROR_NONE;
  839. /* Send CMD9 SEND_CSD */
  840. sdmmc_cmdinit.Argument = (uint32_t)Argument;
  841. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_CSD;
  842. sdmmc_cmdinit.Response = SDMMC_RESPONSE_LONG;
  843. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  844. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  845. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  846. /* Check for error conditions */
  847. errorstate = SDMMC_GetCmdResp2(SDMMCx);
  848. return errorstate;
  849. }
  850. /**
  851. * @brief Send the Send CSD command and check the response.
  852. * @param SDMMCx: Pointer to SDMMC register base
  853. * @retval HAL status
  854. */
  855. uint32_t SDMMC_CmdSetRelAdd(SDMMC_TypeDef *SDMMCx, uint16_t *pRCA)
  856. {
  857. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  858. uint32_t errorstate = SDMMC_ERROR_NONE;
  859. /* Send CMD3 SD_CMD_SET_REL_ADDR */
  860. sdmmc_cmdinit.Argument = 0;
  861. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_REL_ADDR;
  862. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  863. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  864. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  865. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  866. /* Check for error conditions */
  867. errorstate = SDMMC_GetCmdResp6(SDMMCx, SDMMC_CMD_SET_REL_ADDR, pRCA);
  868. return errorstate;
  869. }
  870. /**
  871. * @brief Send the Status command and check the response.
  872. * @param SDMMCx: Pointer to SDMMC register base
  873. * @retval HAL status
  874. */
  875. uint32_t SDMMC_CmdSendStatus(SDMMC_TypeDef *SDMMCx, uint32_t Argument)
  876. {
  877. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  878. uint32_t errorstate = SDMMC_ERROR_NONE;
  879. sdmmc_cmdinit.Argument = (uint32_t)Argument;
  880. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_STATUS;
  881. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  882. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  883. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  884. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  885. /* Check for error conditions */
  886. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SEND_STATUS, SDMMC_CMDTIMEOUT);
  887. return errorstate;
  888. }
  889. /**
  890. * @brief Send the Status register command and check the response.
  891. * @param SDMMCx: Pointer to SDMMC register base
  892. * @retval HAL status
  893. */
  894. uint32_t SDMMC_CmdStatusRegister(SDMMC_TypeDef *SDMMCx)
  895. {
  896. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  897. uint32_t errorstate = SDMMC_ERROR_NONE;
  898. sdmmc_cmdinit.Argument = 0;
  899. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_STATUS;
  900. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  901. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  902. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  903. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  904. /* Check for error conditions */
  905. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SD_APP_STATUS, SDMMC_CMDTIMEOUT);
  906. return errorstate;
  907. }
  908. /**
  909. * @brief Sends host capacity support information and activates the card's
  910. * initialization process. Send SDMMC_CMD_SEND_OP_COND command
  911. * @param SDIOx: Pointer to SDIO register base
  912. * @parame Argument: Argument used for the command
  913. * @retval HAL status
  914. */
  915. uint32_t SDMMC_CmdOpCondition(SDMMC_TypeDef *SDMMCx, uint32_t Argument)
  916. {
  917. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  918. uint32_t errorstate = SDMMC_ERROR_NONE;
  919. sdmmc_cmdinit.Argument = Argument;
  920. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_OP_COND;
  921. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  922. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  923. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  924. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  925. /* Check for error conditions */
  926. errorstate = SDMMC_GetCmdResp3(SDMMCx);
  927. return errorstate;
  928. }
  929. /**
  930. * @brief Checks switchable function and switch card function. SDMMC_CMD_HS_SWITCH comand
  931. * @param SDIOx: Pointer to SDIO register base
  932. * @parame Argument: Argument used for the command
  933. * @retval HAL status
  934. */
  935. uint32_t SDMMC_CmdSwitch(SDMMC_TypeDef *SDMMCx, uint32_t Argument)
  936. {
  937. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  938. uint32_t errorstate = SDMMC_ERROR_NONE;
  939. sdmmc_cmdinit.Argument = Argument;
  940. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SWITCH;
  941. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  942. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  943. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  944. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  945. /* Check for error conditions */
  946. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_HS_SWITCH, SDMMC_CMDTIMEOUT);
  947. return errorstate;
  948. }
  949. /**
  950. * @}
  951. */
  952. /* Private function ----------------------------------------------------------*/
  953. /** @addtogroup SD_Private_Functions
  954. * @{
  955. */
  956. /**
  957. * @brief Checks for error conditions for CMD0.
  958. * @param hsd: SD handle
  959. * @retval SD Card error state
  960. */
  961. static uint32_t SDMMC_GetCmdError(SDMMC_TypeDef *SDMMCx)
  962. {
  963. /* 8 is the number of required instructions cycles for the below loop statement.
  964. The SDMMC_CMDTIMEOUT is expressed in ms */
  965. register uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8 /1000);
  966. do
  967. {
  968. if (count-- == 0)
  969. {
  970. return SDMMC_ERROR_TIMEOUT;
  971. }
  972. }while(!__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CMDSENT));
  973. /* Clear all the static flags */
  974. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_FLAGS);
  975. return SDMMC_ERROR_NONE;
  976. }
  977. /**
  978. * @brief Checks for error conditions for R1 response.
  979. * @param hsd: SD handle
  980. * @param SD_CMD: The sent command index
  981. * @retval SD Card error state
  982. */
  983. static uint32_t SDMMC_GetCmdResp1(SDMMC_TypeDef *SDMMCx, uint8_t SD_CMD, uint32_t Timeout)
  984. {
  985. uint32_t response_r1;
  986. /* 8 is the number of required instructions cycles for the below loop statement.
  987. The Timeout is expressed in ms */
  988. register uint32_t count = Timeout * (SystemCoreClock / 8 /1000);
  989. do
  990. {
  991. if (count-- == 0)
  992. {
  993. return SDMMC_ERROR_TIMEOUT;
  994. }
  995. }while(!__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT));
  996. if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT))
  997. {
  998. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT);
  999. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1000. }
  1001. else if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL))
  1002. {
  1003. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL);
  1004. return SDMMC_ERROR_CMD_CRC_FAIL;
  1005. }
  1006. /* Check response received is of desired command */
  1007. if(SDMMC_GetCommandResponse(SDMMCx) != SD_CMD)
  1008. {
  1009. return SDMMC_ERROR_CMD_CRC_FAIL;
  1010. }
  1011. /* Clear all the static flags */
  1012. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_FLAGS);
  1013. /* We have received response, retrieve it for analysis */
  1014. response_r1 = SDMMC_GetResponse(SDMMCx, SDMMC_RESP1);
  1015. if((response_r1 & SDMMC_OCR_ERRORBITS) == SDMMC_ALLZERO)
  1016. {
  1017. return SDMMC_ERROR_NONE;
  1018. }
  1019. else if((response_r1 & SDMMC_OCR_ADDR_OUT_OF_RANGE) == SDMMC_OCR_ADDR_OUT_OF_RANGE)
  1020. {
  1021. return SDMMC_ERROR_ADDR_OUT_OF_RANGE;
  1022. }
  1023. else if((response_r1 & SDMMC_OCR_ADDR_MISALIGNED) == SDMMC_OCR_ADDR_MISALIGNED)
  1024. {
  1025. return SDMMC_ERROR_ADDR_MISALIGNED;
  1026. }
  1027. else if((response_r1 & SDMMC_OCR_BLOCK_LEN_ERR) == SDMMC_OCR_BLOCK_LEN_ERR)
  1028. {
  1029. return SDMMC_ERROR_BLOCK_LEN_ERR;
  1030. }
  1031. else if((response_r1 & SDMMC_OCR_ERASE_SEQ_ERR) == SDMMC_OCR_ERASE_SEQ_ERR)
  1032. {
  1033. return SDMMC_ERROR_ERASE_SEQ_ERR;
  1034. }
  1035. else if((response_r1 & SDMMC_OCR_BAD_ERASE_PARAM) == SDMMC_OCR_BAD_ERASE_PARAM)
  1036. {
  1037. return SDMMC_ERROR_BAD_ERASE_PARAM;
  1038. }
  1039. else if((response_r1 & SDMMC_OCR_WRITE_PROT_VIOLATION) == SDMMC_OCR_WRITE_PROT_VIOLATION)
  1040. {
  1041. return SDMMC_ERROR_WRITE_PROT_VIOLATION;
  1042. }
  1043. else if((response_r1 & SDMMC_OCR_LOCK_UNLOCK_FAILED) == SDMMC_OCR_LOCK_UNLOCK_FAILED)
  1044. {
  1045. return SDMMC_ERROR_LOCK_UNLOCK_FAILED;
  1046. }
  1047. else if((response_r1 & SDMMC_OCR_COM_CRC_FAILED) == SDMMC_OCR_COM_CRC_FAILED)
  1048. {
  1049. return SDMMC_ERROR_COM_CRC_FAILED;
  1050. }
  1051. else if((response_r1 & SDMMC_OCR_ILLEGAL_CMD) == SDMMC_OCR_ILLEGAL_CMD)
  1052. {
  1053. return SDMMC_ERROR_ILLEGAL_CMD;
  1054. }
  1055. else if((response_r1 & SDMMC_OCR_CARD_ECC_FAILED) == SDMMC_OCR_CARD_ECC_FAILED)
  1056. {
  1057. return SDMMC_ERROR_CARD_ECC_FAILED;
  1058. }
  1059. else if((response_r1 & SDMMC_OCR_CC_ERROR) == SDMMC_OCR_CC_ERROR)
  1060. {
  1061. return SDMMC_ERROR_CC_ERR;
  1062. }
  1063. else if((response_r1 & SDMMC_OCR_STREAM_READ_UNDERRUN) == SDMMC_OCR_STREAM_READ_UNDERRUN)
  1064. {
  1065. return SDMMC_ERROR_STREAM_READ_UNDERRUN;
  1066. }
  1067. else if((response_r1 & SDMMC_OCR_STREAM_WRITE_OVERRUN) == SDMMC_OCR_STREAM_WRITE_OVERRUN)
  1068. {
  1069. return SDMMC_ERROR_STREAM_WRITE_OVERRUN;
  1070. }
  1071. else if((response_r1 & SDMMC_OCR_CID_CSD_OVERWRITE) == SDMMC_OCR_CID_CSD_OVERWRITE)
  1072. {
  1073. return SDMMC_ERROR_CID_CSD_OVERWRITE;
  1074. }
  1075. else if((response_r1 & SDMMC_OCR_WP_ERASE_SKIP) == SDMMC_OCR_WP_ERASE_SKIP)
  1076. {
  1077. return SDMMC_ERROR_WP_ERASE_SKIP;
  1078. }
  1079. else if((response_r1 & SDMMC_OCR_CARD_ECC_DISABLED) == SDMMC_OCR_CARD_ECC_DISABLED)
  1080. {
  1081. return SDMMC_ERROR_CARD_ECC_DISABLED;
  1082. }
  1083. else if((response_r1 & SDMMC_OCR_ERASE_RESET) == SDMMC_OCR_ERASE_RESET)
  1084. {
  1085. return SDMMC_ERROR_ERASE_RESET;
  1086. }
  1087. else if((response_r1 & SDMMC_OCR_AKE_SEQ_ERROR) == SDMMC_OCR_AKE_SEQ_ERROR)
  1088. {
  1089. return SDMMC_ERROR_AKE_SEQ_ERR;
  1090. }
  1091. else
  1092. {
  1093. return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
  1094. }
  1095. }
  1096. /**
  1097. * @brief Checks for error conditions for R2 (CID or CSD) response.
  1098. * @param hsd: SD handle
  1099. * @retval SD Card error state
  1100. */
  1101. static uint32_t SDMMC_GetCmdResp2(SDMMC_TypeDef *SDMMCx)
  1102. {
  1103. /* 8 is the number of required instructions cycles for the below loop statement.
  1104. The SDMMC_CMDTIMEOUT is expressed in ms */
  1105. register uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8 /1000);
  1106. do
  1107. {
  1108. if (count-- == 0)
  1109. {
  1110. return SDMMC_ERROR_TIMEOUT;
  1111. }
  1112. }while(!__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT));
  1113. if (__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT))
  1114. {
  1115. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT);
  1116. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1117. }
  1118. else if (__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL))
  1119. {
  1120. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL);
  1121. return SDMMC_ERROR_CMD_CRC_FAIL;
  1122. }
  1123. else
  1124. {
  1125. /* No error flag set */
  1126. /* Clear all the static flags */
  1127. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_FLAGS);
  1128. }
  1129. return SDMMC_ERROR_NONE;
  1130. }
  1131. /**
  1132. * @brief Checks for error conditions for R3 (OCR) response.
  1133. * @param hsd: SD handle
  1134. * @retval SD Card error state
  1135. */
  1136. static uint32_t SDMMC_GetCmdResp3(SDMMC_TypeDef *SDMMCx)
  1137. {
  1138. /* 8 is the number of required instructions cycles for the below loop statement.
  1139. The SDMMC_CMDTIMEOUT is expressed in ms */
  1140. register uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8 /1000);
  1141. do
  1142. {
  1143. if (count-- == 0)
  1144. {
  1145. return SDMMC_ERROR_TIMEOUT;
  1146. }
  1147. }while(!__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT));
  1148. if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT))
  1149. {
  1150. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT);
  1151. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1152. }
  1153. else
  1154. {
  1155. /* Clear all the static flags */
  1156. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_FLAGS);
  1157. }
  1158. return SDMMC_ERROR_NONE;
  1159. }
  1160. /**
  1161. * @brief Checks for error conditions for R6 (RCA) response.
  1162. * @param hsd: SD handle
  1163. * @param SD_CMD: The sent command index
  1164. * @param pRCA: Pointer to the variable that will contain the SD card relative
  1165. * address RCA
  1166. * @retval SD Card error state
  1167. */
  1168. static uint32_t SDMMC_GetCmdResp6(SDMMC_TypeDef *SDMMCx, uint8_t SD_CMD, uint16_t *pRCA)
  1169. {
  1170. uint32_t response_r1;
  1171. /* 8 is the number of required instructions cycles for the below loop statement.
  1172. The SDMMC_CMDTIMEOUT is expressed in ms */
  1173. register uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8 /1000);
  1174. do
  1175. {
  1176. if (count-- == 0)
  1177. {
  1178. return SDMMC_ERROR_TIMEOUT;
  1179. }
  1180. }while(!__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT));
  1181. if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT))
  1182. {
  1183. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT);
  1184. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1185. }
  1186. else if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL))
  1187. {
  1188. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL);
  1189. return SDMMC_ERROR_CMD_CRC_FAIL;
  1190. }
  1191. /* Check response received is of desired command */
  1192. if(SDMMC_GetCommandResponse(SDMMCx) != SD_CMD)
  1193. {
  1194. return SDMMC_ERROR_CMD_CRC_FAIL;
  1195. }
  1196. /* Clear all the static flags */
  1197. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_FLAGS);
  1198. /* We have received response, retrieve it. */
  1199. response_r1 = SDMMC_GetResponse(SDMMCx, SDMMC_RESP1);
  1200. if((response_r1 & (SDMMC_R6_GENERAL_UNKNOWN_ERROR | SDMMC_R6_ILLEGAL_CMD | SDMMC_R6_COM_CRC_FAILED)) == SDMMC_ALLZERO)
  1201. {
  1202. *pRCA = (uint16_t) (response_r1 >> 16);
  1203. return SDMMC_ERROR_NONE;
  1204. }
  1205. else if((response_r1 & SDMMC_R6_ILLEGAL_CMD) == SDMMC_R6_ILLEGAL_CMD)
  1206. {
  1207. return SDMMC_ERROR_ILLEGAL_CMD;
  1208. }
  1209. else if((response_r1 & SDMMC_R6_COM_CRC_FAILED) == SDMMC_R6_COM_CRC_FAILED)
  1210. {
  1211. return SDMMC_ERROR_COM_CRC_FAILED;
  1212. }
  1213. else
  1214. {
  1215. return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
  1216. }
  1217. }
  1218. /**
  1219. * @brief Checks for error conditions for R7 response.
  1220. * @param hsd: SD handle
  1221. * @retval SD Card error state
  1222. */
  1223. static uint32_t SDMMC_GetCmdResp7(SDMMC_TypeDef *SDMMCx)
  1224. {
  1225. /* 8 is the number of required instructions cycles for the below loop statement.
  1226. The SDMMC_CMDTIMEOUT is expressed in ms */
  1227. register uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8 /1000);
  1228. do
  1229. {
  1230. if (count-- == 0)
  1231. {
  1232. return SDMMC_ERROR_TIMEOUT;
  1233. }
  1234. }while(!__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT));
  1235. if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT))
  1236. {
  1237. /* Card is SD V2.0 compliant */
  1238. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CMDREND);
  1239. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1240. }
  1241. if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CMDREND))
  1242. {
  1243. /* Card is SD V2.0 compliant */
  1244. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CMDREND);
  1245. }
  1246. return SDMMC_ERROR_NONE;
  1247. }
  1248. /**
  1249. * @}
  1250. */
  1251. /**
  1252. * @}
  1253. */
  1254. #endif /* (HAL_SD_MODULE_ENABLED) */
  1255. /**
  1256. * @}
  1257. */
  1258. /**
  1259. * @}
  1260. */
  1261. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/