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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_ll_dma2d.h
  4. * @author MCD Application Team
  5. * @version V1.7.1
  6. * @date 14-April-2017
  7. * @brief Header file of DMA2D LL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32F4xx_LL_DMA2D_H
  39. #define __STM32F4xx_LL_DMA2D_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. /* Includes ------------------------------------------------------------------*/
  44. #include "stm32f4xx.h"
  45. /** @addtogroup STM32F4xx_LL_Driver
  46. * @{
  47. */
  48. #if defined (DMA2D)
  49. /** @defgroup DMA2D_LL DMA2D
  50. * @{
  51. */
  52. /* Private types -------------------------------------------------------------*/
  53. /* Private variables ---------------------------------------------------------*/
  54. /* Private constants ---------------------------------------------------------*/
  55. /* Private macros ------------------------------------------------------------*/
  56. #if defined(USE_FULL_LL_DRIVER)
  57. /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros
  58. * @{
  59. */
  60. /**
  61. * @}
  62. */
  63. #endif /*USE_FULL_LL_DRIVER*/
  64. /* Exported types ------------------------------------------------------------*/
  65. #if defined(USE_FULL_LL_DRIVER)
  66. /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures
  67. * @{
  68. */
  69. /**
  70. * @brief LL DMA2D Init Structure Definition
  71. */
  72. typedef struct
  73. {
  74. uint32_t Mode; /*!< Specifies the DMA2D transfer mode.
  75. - This parameter can be one value of @ref DMA2D_LL_EC_MODE.
  76. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetMode().*/
  77. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  78. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  79. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  80. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  81. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  82. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  83. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  84. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  85. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  86. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  87. function @ref LL_DMA2D_ConfigOutputColor(). */
  88. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  89. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  90. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  91. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  92. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  93. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  94. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  95. function @ref LL_DMA2D_ConfigOutputColor(). */
  96. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  97. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  98. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  99. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  100. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  101. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  102. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  103. function @ref LL_DMA2D_ConfigOutputColor(). */
  104. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  105. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  106. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  107. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  108. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  109. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  110. function @ref LL_DMA2D_ConfigOutputColor(). */
  111. uint32_t OutputMemoryAddress; /*!< Specifies the memory address.
  112. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  113. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */
  114. uint32_t LineOffset; /*!< Specifies the output line offset value.
  115. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  116. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetLineOffset(). */
  117. uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred.
  118. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF.
  119. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfLines(). */
  120. uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transfered.
  121. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  122. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */
  123. } LL_DMA2D_InitTypeDef;
  124. /**
  125. * @brief LL DMA2D Layer Configuration Structure Definition
  126. */
  127. typedef struct
  128. {
  129. uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address.
  130. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  131. This parameter can be modified afterwards using unitary functions
  132. - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer,
  133. - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */
  134. uint32_t LineOffset; /*!< Specifies the foreground or background line offset value.
  135. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  136. This parameter can be modified afterwards using unitary functions
  137. - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer,
  138. - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */
  139. uint32_t ColorMode; /*!< Specifies the foreground or background color mode.
  140. - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE.
  141. This parameter can be modified afterwards using unitary functions
  142. - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer,
  143. - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */
  144. uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode.
  145. - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE.
  146. This parameter can be modified afterwards using unitary functions
  147. - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer,
  148. - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */
  149. uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size.
  150. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  151. This parameter can be modified afterwards using unitary functions
  152. - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer,
  153. - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */
  154. uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode.
  155. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE.
  156. This parameter can be modified afterwards using unitary functions
  157. - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer,
  158. - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */
  159. uint32_t Alpha; /*!< Specifies the foreground or background Alpha value.
  160. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  161. This parameter can be modified afterwards using unitary functions
  162. - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer,
  163. - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */
  164. uint32_t Blue; /*!< Specifies the foreground or background Blue color value.
  165. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  166. This parameter can be modified afterwards using unitary functions
  167. - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer,
  168. - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */
  169. uint32_t Green; /*!< Specifies the foreground or background Green color value.
  170. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  171. This parameter can be modified afterwards using unitary functions
  172. - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer,
  173. - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */
  174. uint32_t Red; /*!< Specifies the foreground or background Red color value.
  175. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  176. This parameter can be modified afterwards using unitary functions
  177. - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer,
  178. - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */
  179. uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address.
  180. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  181. This parameter can be modified afterwards using unitary functions
  182. - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer,
  183. - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */
  184. } LL_DMA2D_LayerCfgTypeDef;
  185. /**
  186. * @brief LL DMA2D Output Color Structure Definition
  187. */
  188. typedef struct
  189. {
  190. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  191. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  192. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  193. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  194. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  195. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  196. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  197. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  198. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  199. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  200. function @ref LL_DMA2D_ConfigOutputColor(). */
  201. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  202. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  203. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  204. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  205. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  206. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  207. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  208. function @ref LL_DMA2D_ConfigOutputColor(). */
  209. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  210. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  211. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  212. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  213. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  214. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  215. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  216. function @ref LL_DMA2D_ConfigOutputColor(). */
  217. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  218. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  219. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  220. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  221. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  222. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  223. function @ref LL_DMA2D_ConfigOutputColor(). */
  224. } LL_DMA2D_ColorTypeDef;
  225. /**
  226. * @}
  227. */
  228. #endif /* USE_FULL_LL_DRIVER */
  229. /* Exported constants --------------------------------------------------------*/
  230. /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants
  231. * @{
  232. */
  233. /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines
  234. * @brief Flags defines which can be used with LL_DMA2D_ReadReg function
  235. * @{
  236. */
  237. #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
  238. #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */
  239. #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */
  240. #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
  241. #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
  242. #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
  243. /**
  244. * @}
  245. */
  246. /** @defgroup DMA2D_LL_EC_IT IT Defines
  247. * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions
  248. * @{
  249. */
  250. #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
  251. #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */
  252. #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
  253. #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
  254. #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
  255. #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
  256. /**
  257. * @}
  258. */
  259. /** @defgroup DMA2D_LL_EC_MODE Mode
  260. * @{
  261. */
  262. #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */
  263. #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */
  264. #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */
  265. #define LL_DMA2D_MODE_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */
  266. /**
  267. * @}
  268. */
  269. /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode
  270. * @{
  271. */
  272. #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  273. #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */
  274. #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */
  275. #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */
  276. #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */
  277. /**
  278. * @}
  279. */
  280. /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode
  281. * @{
  282. */
  283. #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  284. #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */
  285. #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */
  286. #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */
  287. #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */
  288. #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */
  289. #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */
  290. #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */
  291. #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */
  292. #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */
  293. #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */
  294. /**
  295. * @}
  296. */
  297. /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode
  298. * @{
  299. */
  300. #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */
  301. #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by programmed alpha value */
  302. #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by programmed alpha value
  303. with original alpha channel value */
  304. /**
  305. * @}
  306. */
  307. /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode
  308. * @{
  309. */
  310. #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  311. #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */
  312. /**
  313. * @}
  314. */
  315. /**
  316. * @}
  317. */
  318. /* Exported macro ------------------------------------------------------------*/
  319. /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros
  320. * @{
  321. */
  322. /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros
  323. * @{
  324. */
  325. /**
  326. * @brief Write a value in DMA2D register.
  327. * @param __INSTANCE__ DMA2D Instance
  328. * @param __REG__ Register to be written
  329. * @param __VALUE__ Value to be written in the register
  330. * @retval None
  331. */
  332. #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
  333. /**
  334. * @brief Read a value in DMA2D register.
  335. * @param __INSTANCE__ DMA2D Instance
  336. * @param __REG__ Register to be read
  337. * @retval Register value
  338. */
  339. #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
  340. /**
  341. * @}
  342. */
  343. /**
  344. * @}
  345. */
  346. /* Exported functions --------------------------------------------------------*/
  347. /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions
  348. * @{
  349. */
  350. /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions
  351. * @{
  352. */
  353. /**
  354. * @brief Start a DMA2D transfer.
  355. * @rmtoll CR START LL_DMA2D_Start
  356. * @param DMA2Dx DMA2D Instance
  357. * @retval None
  358. */
  359. __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx)
  360. {
  361. SET_BIT(DMA2Dx->CR, DMA2D_CR_START);
  362. }
  363. /**
  364. * @brief Indicate if a DMA2D transfer is ongoing.
  365. * @rmtoll CR START LL_DMA2D_IsTransferOngoing
  366. * @param DMA2Dx DMA2D Instance
  367. * @retval State of bit (1 or 0).
  368. */
  369. __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx)
  370. {
  371. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START));
  372. }
  373. /**
  374. * @brief Suspend DMA2D transfer.
  375. * @note This API can be used to suspend automatic foreground or background CLUT loading.
  376. * @rmtoll CR SUSP LL_DMA2D_Suspend
  377. * @param DMA2Dx DMA2D Instance
  378. * @retval None
  379. */
  380. __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx)
  381. {
  382. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP);
  383. }
  384. /**
  385. * @brief Resume DMA2D transfer.
  386. * @note This API can be used to resume automatic foreground or background CLUT loading.
  387. * @rmtoll CR SUSP LL_DMA2D_Resume
  388. * @param DMA2Dx DMA2D Instance
  389. * @retval None
  390. */
  391. __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx)
  392. {
  393. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START);
  394. }
  395. /**
  396. * @brief Indicate if DMA2D transfer is suspended.
  397. * @note This API can be used to indicate whether or not automatic foreground or
  398. * background CLUT loading is suspended.
  399. * @rmtoll CR SUSP LL_DMA2D_IsSuspended
  400. * @param DMA2Dx DMA2D Instance
  401. * @retval State of bit (1 or 0).
  402. */
  403. __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx)
  404. {
  405. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP));
  406. }
  407. /**
  408. * @brief Abort DMA2D transfer.
  409. * @note This API can be used to abort automatic foreground or background CLUT loading.
  410. * @rmtoll CR ABORT LL_DMA2D_Abort
  411. * @param DMA2Dx DMA2D Instance
  412. * @retval None
  413. */
  414. __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx)
  415. {
  416. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT);
  417. }
  418. /**
  419. * @brief Indicate if DMA2D transfer is aborted.
  420. * @note This API can be used to indicate whether or not automatic foreground or
  421. * background CLUT loading is aborted.
  422. * @rmtoll CR ABORT LL_DMA2D_IsAborted
  423. * @param DMA2Dx DMA2D Instance
  424. * @retval State of bit (1 or 0).
  425. */
  426. __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx)
  427. {
  428. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT));
  429. }
  430. /**
  431. * @brief Set DMA2D mode.
  432. * @rmtoll CR MODE LL_DMA2D_SetMode
  433. * @param DMA2Dx DMA2D Instance
  434. * @param Mode This parameter can be one of the following values:
  435. * @arg @ref LL_DMA2D_MODE_M2M
  436. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  437. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  438. * @arg @ref LL_DMA2D_MODE_R2M
  439. * @retval None
  440. */
  441. __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
  442. {
  443. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode);
  444. }
  445. /**
  446. * @brief Return DMA2D mode
  447. * @rmtoll CR MODE LL_DMA2D_GetMode
  448. * @param DMA2Dx DMA2D Instance
  449. * @retval Returned value can be one of the following values:
  450. * @arg @ref LL_DMA2D_MODE_M2M
  451. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  452. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  453. * @arg @ref LL_DMA2D_MODE_R2M
  454. */
  455. __STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx)
  456. {
  457. return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE));
  458. }
  459. /**
  460. * @brief Set DMA2D output color mode.
  461. * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode
  462. * @param DMA2Dx DMA2D Instance
  463. * @param ColorMode This parameter can be one of the following values:
  464. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  465. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  466. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  467. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  468. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  469. * @retval None
  470. */
  471. __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  472. {
  473. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode);
  474. }
  475. /**
  476. * @brief Return DMA2D output color mode.
  477. * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode
  478. * @param DMA2Dx DMA2D Instance
  479. * @retval Returned value can be one of the following values:
  480. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  481. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  482. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  483. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  484. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  485. */
  486. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx)
  487. {
  488. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM));
  489. }
  490. /**
  491. * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits).
  492. * @rmtoll OOR LO LL_DMA2D_SetLineOffset
  493. * @param DMA2Dx DMA2D Instance
  494. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF
  495. * @retval None
  496. */
  497. __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  498. {
  499. MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset);
  500. }
  501. /**
  502. * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits).
  503. * @rmtoll OOR LO LL_DMA2D_GetLineOffset
  504. * @param DMA2Dx DMA2D Instance
  505. * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF
  506. */
  507. __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  508. {
  509. return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO));
  510. }
  511. /**
  512. * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits).
  513. * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines
  514. * @param DMA2Dx DMA2D Instance
  515. * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF
  516. * @retval None
  517. */
  518. __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
  519. {
  520. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos));
  521. }
  522. /**
  523. * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits)
  524. * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines
  525. * @param DMA2Dx DMA2D Instance
  526. * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF
  527. */
  528. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx)
  529. {
  530. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos);
  531. }
  532. /**
  533. * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  534. * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines
  535. * @param DMA2Dx DMA2D Instance
  536. * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF
  537. * @retval None
  538. */
  539. __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
  540. {
  541. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines);
  542. }
  543. /**
  544. * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  545. * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines
  546. * @param DMA2Dx DMA2D Instance
  547. * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF
  548. */
  549. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx)
  550. {
  551. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL));
  552. }
  553. /**
  554. * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  555. * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr
  556. * @param DMA2Dx DMA2D Instance
  557. * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  558. * @retval None
  559. */
  560. __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
  561. {
  562. LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress);
  563. }
  564. /**
  565. * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  566. * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr
  567. * @param DMA2Dx DMA2D Instance
  568. * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  569. */
  570. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx)
  571. {
  572. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR));
  573. }
  574. /**
  575. * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits).
  576. * @note Output color format depends on output color mode, ARGB8888, RGB888,
  577. * RGB565, ARGB1555 or ARGB4444.
  578. * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting
  579. * with respect to color mode is not done by the user code.
  580. * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n
  581. * OCOLR GREEN LL_DMA2D_SetOutputColor\n
  582. * OCOLR RED LL_DMA2D_SetOutputColor\n
  583. * OCOLR ALPHA LL_DMA2D_SetOutputColor
  584. * @param DMA2Dx DMA2D Instance
  585. * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  586. * @retval None
  587. */
  588. __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
  589. {
  590. MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \
  591. OutputColor);
  592. }
  593. /**
  594. * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits).
  595. * @note Alpha channel and red, green, blue color values must be retrieved from the returned
  596. * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444)
  597. * as set by @ref LL_DMA2D_SetOutputColorMode.
  598. * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n
  599. * OCOLR GREEN LL_DMA2D_GetOutputColor\n
  600. * OCOLR RED LL_DMA2D_GetOutputColor\n
  601. * OCOLR ALPHA LL_DMA2D_GetOutputColor
  602. * @param DMA2Dx DMA2D Instance
  603. * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF
  604. */
  605. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx)
  606. {
  607. return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \
  608. (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1)));
  609. }
  610. /**
  611. * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  612. * @rmtoll LWR LW LL_DMA2D_SetLineWatermark
  613. * @param DMA2Dx DMA2D Instance
  614. * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF
  615. * @retval None
  616. */
  617. __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
  618. {
  619. MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark);
  620. }
  621. /**
  622. * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  623. * @rmtoll LWR LW LL_DMA2D_GetLineWatermark
  624. * @param DMA2Dx DMA2D Instance
  625. * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF
  626. */
  627. __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx)
  628. {
  629. return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW));
  630. }
  631. /**
  632. * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits).
  633. * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime
  634. * @param DMA2Dx DMA2D Instance
  635. * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF
  636. * @retval None
  637. */
  638. __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
  639. {
  640. MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos));
  641. }
  642. /**
  643. * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits).
  644. * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime
  645. * @param DMA2Dx DMA2D Instance
  646. * @retval Dead time value between Min_Data=0 and Max_Data=0xFF
  647. */
  648. __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx)
  649. {
  650. return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos);
  651. }
  652. /**
  653. * @brief Enable DMA2D dead time functionality.
  654. * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime
  655. * @param DMA2Dx DMA2D Instance
  656. * @retval None
  657. */
  658. __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx)
  659. {
  660. SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  661. }
  662. /**
  663. * @brief Disable DMA2D dead time functionality.
  664. * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime
  665. * @param DMA2Dx DMA2D Instance
  666. * @retval None
  667. */
  668. __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx)
  669. {
  670. CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  671. }
  672. /**
  673. * @brief Indicate if DMA2D dead time functionality is enabled.
  674. * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime
  675. * @param DMA2Dx DMA2D Instance
  676. * @retval State of bit (1 or 0).
  677. */
  678. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx)
  679. {
  680. return (READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN));
  681. }
  682. /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions
  683. * @{
  684. */
  685. /**
  686. * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  687. * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr
  688. * @param DMA2Dx DMA2D Instance
  689. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  690. * @retval None
  691. */
  692. __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  693. {
  694. LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress);
  695. }
  696. /**
  697. * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  698. * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr
  699. * @param DMA2Dx DMA2D Instance
  700. * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  701. */
  702. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
  703. {
  704. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR));
  705. }
  706. /**
  707. * @brief Enable DMA2D foreground CLUT loading.
  708. * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad
  709. * @param DMA2Dx DMA2D Instance
  710. * @retval None
  711. */
  712. __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  713. {
  714. SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START);
  715. }
  716. /**
  717. * @brief Indicate if DMA2D foreground CLUT loading is enabled.
  718. * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad
  719. * @param DMA2Dx DMA2D Instance
  720. * @retval State of bit (1 or 0).
  721. */
  722. __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  723. {
  724. return (READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START));
  725. }
  726. /**
  727. * @brief Set DMA2D foreground color mode.
  728. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode
  729. * @param DMA2Dx DMA2D Instance
  730. * @param ColorMode This parameter can be one of the following values:
  731. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  732. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  733. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  734. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  735. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  736. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  737. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  738. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  739. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  740. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  741. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  742. * @retval None
  743. */
  744. __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  745. {
  746. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode);
  747. }
  748. /**
  749. * @brief Return DMA2D foreground color mode.
  750. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode
  751. * @param DMA2Dx DMA2D Instance
  752. * @retval Returned value can be one of the following values:
  753. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  754. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  755. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  756. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  757. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  758. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  759. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  760. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  761. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  762. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  763. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  764. */
  765. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
  766. {
  767. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM));
  768. }
  769. /**
  770. * @brief Set DMA2D foreground alpha mode.
  771. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode
  772. * @param DMA2Dx DMA2D Instance
  773. * @param AphaMode This parameter can be one of the following values:
  774. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  775. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  776. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  777. * @retval None
  778. */
  779. __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  780. {
  781. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode);
  782. }
  783. /**
  784. * @brief Return DMA2D foreground alpha mode.
  785. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode
  786. * @param DMA2Dx DMA2D Instance
  787. * @retval Returned value can be one of the following values:
  788. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  789. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  790. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  791. */
  792. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
  793. {
  794. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM));
  795. }
  796. /**
  797. * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  798. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha
  799. * @param DMA2Dx DMA2D Instance
  800. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  801. * @retval None
  802. */
  803. __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  804. {
  805. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos));
  806. }
  807. /**
  808. * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  809. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha
  810. * @param DMA2Dx DMA2D Instance
  811. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  812. */
  813. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
  814. {
  815. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos);
  816. }
  817. /**
  818. * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  819. * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset
  820. * @param DMA2Dx DMA2D Instance
  821. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  822. * @retval None
  823. */
  824. __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  825. {
  826. MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset);
  827. }
  828. /**
  829. * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  830. * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset
  831. * @param DMA2Dx DMA2D Instance
  832. * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF
  833. */
  834. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  835. {
  836. return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO));
  837. }
  838. /**
  839. * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits).
  840. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor
  841. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor
  842. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor
  843. * @param DMA2Dx DMA2D Instance
  844. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  845. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  846. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  847. * @retval None
  848. */
  849. __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  850. {
  851. MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \
  852. ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue));
  853. }
  854. /**
  855. * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  856. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor
  857. * @param DMA2Dx DMA2D Instance
  858. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  859. * @retval None
  860. */
  861. __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  862. {
  863. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos));
  864. }
  865. /**
  866. * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  867. * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor
  868. * @param DMA2Dx DMA2D Instance
  869. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  870. */
  871. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
  872. {
  873. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos);
  874. }
  875. /**
  876. * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  877. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor
  878. * @param DMA2Dx DMA2D Instance
  879. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  880. * @retval None
  881. */
  882. __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  883. {
  884. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos));
  885. }
  886. /**
  887. * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  888. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor
  889. * @param DMA2Dx DMA2D Instance
  890. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  891. */
  892. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
  893. {
  894. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos);
  895. }
  896. /**
  897. * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  898. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor
  899. * @param DMA2Dx DMA2D Instance
  900. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  901. * @retval None
  902. */
  903. __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  904. {
  905. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue);
  906. }
  907. /**
  908. * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  909. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor
  910. * @param DMA2Dx DMA2D Instance
  911. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  912. */
  913. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
  914. {
  915. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE));
  916. }
  917. /**
  918. * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  919. * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr
  920. * @param DMA2Dx DMA2D Instance
  921. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  922. * @retval None
  923. */
  924. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  925. {
  926. LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress);
  927. }
  928. /**
  929. * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  930. * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr
  931. * @param DMA2Dx DMA2D Instance
  932. * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  933. */
  934. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
  935. {
  936. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR));
  937. }
  938. /**
  939. * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  940. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize
  941. * @param DMA2Dx DMA2D Instance
  942. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  943. * @retval None
  944. */
  945. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  946. {
  947. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos));
  948. }
  949. /**
  950. * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  951. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize
  952. * @param DMA2Dx DMA2D Instance
  953. * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF
  954. */
  955. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
  956. {
  957. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos);
  958. }
  959. /**
  960. * @brief Set DMA2D foreground CLUT color mode.
  961. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode
  962. * @param DMA2Dx DMA2D Instance
  963. * @param CLUTColorMode This parameter can be one of the following values:
  964. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  965. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  966. * @retval None
  967. */
  968. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  969. {
  970. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode);
  971. }
  972. /**
  973. * @brief Return DMA2D foreground CLUT color mode.
  974. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode
  975. * @param DMA2Dx DMA2D Instance
  976. * @retval Returned value can be one of the following values:
  977. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  978. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  979. */
  980. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
  981. {
  982. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM));
  983. }
  984. /**
  985. * @}
  986. */
  987. /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions
  988. * @{
  989. */
  990. /**
  991. * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  992. * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr
  993. * @param DMA2Dx DMA2D Instance
  994. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  995. * @retval None
  996. */
  997. __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  998. {
  999. LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress);
  1000. }
  1001. /**
  1002. * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  1003. * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr
  1004. * @param DMA2Dx DMA2D Instance
  1005. * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1006. */
  1007. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
  1008. {
  1009. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR));
  1010. }
  1011. /**
  1012. * @brief Enable DMA2D background CLUT loading.
  1013. * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad
  1014. * @param DMA2Dx DMA2D Instance
  1015. * @retval None
  1016. */
  1017. __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1018. {
  1019. SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START);
  1020. }
  1021. /**
  1022. * @brief Indicate if DMA2D background CLUT loading is enabled.
  1023. * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad
  1024. * @param DMA2Dx DMA2D Instance
  1025. * @retval State of bit (1 or 0).
  1026. */
  1027. __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1028. {
  1029. return (READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START));
  1030. }
  1031. /**
  1032. * @brief Set DMA2D background color mode.
  1033. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode
  1034. * @param DMA2Dx DMA2D Instance
  1035. * @param ColorMode This parameter can be one of the following values:
  1036. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1037. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1038. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1039. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1040. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1041. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1042. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1043. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1044. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1045. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1046. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1047. * @retval None
  1048. */
  1049. __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  1050. {
  1051. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode);
  1052. }
  1053. /**
  1054. * @brief Return DMA2D background color mode.
  1055. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode
  1056. * @param DMA2Dx DMA2D Instance
  1057. * @retval Returned value can be one of the following values:
  1058. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1059. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1060. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1061. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1062. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1063. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1064. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1065. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1066. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1067. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1068. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1069. */
  1070. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
  1071. {
  1072. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM));
  1073. }
  1074. /**
  1075. * @brief Set DMA2D background alpha mode.
  1076. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode
  1077. * @param DMA2Dx DMA2D Instance
  1078. * @param AphaMode This parameter can be one of the following values:
  1079. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1080. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1081. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1082. * @retval None
  1083. */
  1084. __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  1085. {
  1086. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode);
  1087. }
  1088. /**
  1089. * @brief Return DMA2D background alpha mode.
  1090. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode
  1091. * @param DMA2Dx DMA2D Instance
  1092. * @retval Returned value can be one of the following values:
  1093. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1094. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1095. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1096. */
  1097. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
  1098. {
  1099. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM));
  1100. }
  1101. /**
  1102. * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1103. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha
  1104. * @param DMA2Dx DMA2D Instance
  1105. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  1106. * @retval None
  1107. */
  1108. __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  1109. {
  1110. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos));
  1111. }
  1112. /**
  1113. * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1114. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha
  1115. * @param DMA2Dx DMA2D Instance
  1116. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  1117. */
  1118. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
  1119. {
  1120. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos);
  1121. }
  1122. /**
  1123. * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1124. * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset
  1125. * @param DMA2Dx DMA2D Instance
  1126. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  1127. * @retval None
  1128. */
  1129. __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  1130. {
  1131. MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset);
  1132. }
  1133. /**
  1134. * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1135. * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset
  1136. * @param DMA2Dx DMA2D Instance
  1137. * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF
  1138. */
  1139. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  1140. {
  1141. return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO));
  1142. }
  1143. /**
  1144. * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits).
  1145. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor
  1146. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor
  1147. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor
  1148. * @param DMA2Dx DMA2D Instance
  1149. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1150. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1151. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1152. * @retval None
  1153. */
  1154. __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  1155. {
  1156. MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \
  1157. ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue));
  1158. }
  1159. /**
  1160. * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1161. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor
  1162. * @param DMA2Dx DMA2D Instance
  1163. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1164. * @retval None
  1165. */
  1166. __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  1167. {
  1168. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos));
  1169. }
  1170. /**
  1171. * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1172. * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor
  1173. * @param DMA2Dx DMA2D Instance
  1174. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  1175. */
  1176. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
  1177. {
  1178. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos);
  1179. }
  1180. /**
  1181. * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1182. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor
  1183. * @param DMA2Dx DMA2D Instance
  1184. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1185. * @retval None
  1186. */
  1187. __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  1188. {
  1189. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos));
  1190. }
  1191. /**
  1192. * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1193. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor
  1194. * @param DMA2Dx DMA2D Instance
  1195. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  1196. */
  1197. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
  1198. {
  1199. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos);
  1200. }
  1201. /**
  1202. * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1203. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor
  1204. * @param DMA2Dx DMA2D Instance
  1205. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1206. * @retval None
  1207. */
  1208. __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  1209. {
  1210. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue);
  1211. }
  1212. /**
  1213. * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1214. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor
  1215. * @param DMA2Dx DMA2D Instance
  1216. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  1217. */
  1218. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
  1219. {
  1220. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE));
  1221. }
  1222. /**
  1223. * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1224. * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr
  1225. * @param DMA2Dx DMA2D Instance
  1226. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1227. * @retval None
  1228. */
  1229. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  1230. {
  1231. LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress);
  1232. }
  1233. /**
  1234. * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1235. * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr
  1236. * @param DMA2Dx DMA2D Instance
  1237. * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1238. */
  1239. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
  1240. {
  1241. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR));
  1242. }
  1243. /**
  1244. * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1245. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize
  1246. * @param DMA2Dx DMA2D Instance
  1247. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  1248. * @retval None
  1249. */
  1250. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  1251. {
  1252. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos));
  1253. }
  1254. /**
  1255. * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1256. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize
  1257. * @param DMA2Dx DMA2D Instance
  1258. * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF
  1259. */
  1260. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
  1261. {
  1262. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos);
  1263. }
  1264. /**
  1265. * @brief Set DMA2D background CLUT color mode.
  1266. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode
  1267. * @param DMA2Dx DMA2D Instance
  1268. * @param CLUTColorMode This parameter can be one of the following values:
  1269. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1270. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1271. * @retval None
  1272. */
  1273. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1274. {
  1275. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode);
  1276. }
  1277. /**
  1278. * @brief Return DMA2D background CLUT color mode.
  1279. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode
  1280. * @param DMA2Dx DMA2D Instance
  1281. * @retval Returned value can be one of the following values:
  1282. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1283. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1284. */
  1285. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
  1286. {
  1287. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM));
  1288. }
  1289. /**
  1290. * @}
  1291. */
  1292. /**
  1293. * @}
  1294. */
  1295. /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management
  1296. * @{
  1297. */
  1298. /**
  1299. * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not
  1300. * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE
  1301. * @param DMA2Dx DMA2D Instance
  1302. * @retval State of bit (1 or 0).
  1303. */
  1304. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1305. {
  1306. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF));
  1307. }
  1308. /**
  1309. * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not
  1310. * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC
  1311. * @param DMA2Dx DMA2D Instance
  1312. * @retval State of bit (1 or 0).
  1313. */
  1314. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1315. {
  1316. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF));
  1317. }
  1318. /**
  1319. * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not
  1320. * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE
  1321. * @param DMA2Dx DMA2D Instance
  1322. * @retval State of bit (1 or 0).
  1323. */
  1324. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1325. {
  1326. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF));
  1327. }
  1328. /**
  1329. * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not
  1330. * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW
  1331. * @param DMA2Dx DMA2D Instance
  1332. * @retval State of bit (1 or 0).
  1333. */
  1334. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1335. {
  1336. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF));
  1337. }
  1338. /**
  1339. * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not
  1340. * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC
  1341. * @param DMA2Dx DMA2D Instance
  1342. * @retval State of bit (1 or 0).
  1343. */
  1344. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1345. {
  1346. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF));
  1347. }
  1348. /**
  1349. * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not
  1350. * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE
  1351. * @param DMA2Dx DMA2D Instance
  1352. * @retval State of bit (1 or 0).
  1353. */
  1354. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1355. {
  1356. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF));
  1357. }
  1358. /**
  1359. * @brief Clear DMA2D Configuration Error Interrupt Flag
  1360. * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE
  1361. * @param DMA2Dx DMA2D Instance
  1362. * @retval None
  1363. */
  1364. __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1365. {
  1366. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF);
  1367. }
  1368. /**
  1369. * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag
  1370. * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC
  1371. * @param DMA2Dx DMA2D Instance
  1372. * @retval None
  1373. */
  1374. __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1375. {
  1376. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF);
  1377. }
  1378. /**
  1379. * @brief Clear DMA2D CLUT Access Error Interrupt Flag
  1380. * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE
  1381. * @param DMA2Dx DMA2D Instance
  1382. * @retval None
  1383. */
  1384. __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1385. {
  1386. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF);
  1387. }
  1388. /**
  1389. * @brief Clear DMA2D Transfer Watermark Interrupt Flag
  1390. * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW
  1391. * @param DMA2Dx DMA2D Instance
  1392. * @retval None
  1393. */
  1394. __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1395. {
  1396. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF);
  1397. }
  1398. /**
  1399. * @brief Clear DMA2D Transfer Complete Interrupt Flag
  1400. * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC
  1401. * @param DMA2Dx DMA2D Instance
  1402. * @retval None
  1403. */
  1404. __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1405. {
  1406. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF);
  1407. }
  1408. /**
  1409. * @brief Clear DMA2D Transfer Error Interrupt Flag
  1410. * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE
  1411. * @param DMA2Dx DMA2D Instance
  1412. * @retval None
  1413. */
  1414. __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1415. {
  1416. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF);
  1417. }
  1418. /**
  1419. * @}
  1420. */
  1421. /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management
  1422. * @{
  1423. */
  1424. /**
  1425. * @brief Enable Configuration Error Interrupt
  1426. * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE
  1427. * @param DMA2Dx DMA2D Instance
  1428. * @retval None
  1429. */
  1430. __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1431. {
  1432. SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1433. }
  1434. /**
  1435. * @brief Enable CLUT Transfer Complete Interrupt
  1436. * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC
  1437. * @param DMA2Dx DMA2D Instance
  1438. * @retval None
  1439. */
  1440. __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1441. {
  1442. SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1443. }
  1444. /**
  1445. * @brief Enable CLUT Access Error Interrupt
  1446. * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE
  1447. * @param DMA2Dx DMA2D Instance
  1448. * @retval None
  1449. */
  1450. __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1451. {
  1452. SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1453. }
  1454. /**
  1455. * @brief Enable Transfer Watermark Interrupt
  1456. * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW
  1457. * @param DMA2Dx DMA2D Instance
  1458. * @retval None
  1459. */
  1460. __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1461. {
  1462. SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1463. }
  1464. /**
  1465. * @brief Enable Transfer Complete Interrupt
  1466. * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC
  1467. * @param DMA2Dx DMA2D Instance
  1468. * @retval None
  1469. */
  1470. __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1471. {
  1472. SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1473. }
  1474. /**
  1475. * @brief Enable Transfer Error Interrupt
  1476. * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE
  1477. * @param DMA2Dx DMA2D Instance
  1478. * @retval None
  1479. */
  1480. __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1481. {
  1482. SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1483. }
  1484. /**
  1485. * @brief Disable Configuration Error Interrupt
  1486. * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE
  1487. * @param DMA2Dx DMA2D Instance
  1488. * @retval None
  1489. */
  1490. __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1491. {
  1492. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1493. }
  1494. /**
  1495. * @brief Disable CLUT Transfer Complete Interrupt
  1496. * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC
  1497. * @param DMA2Dx DMA2D Instance
  1498. * @retval None
  1499. */
  1500. __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1501. {
  1502. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1503. }
  1504. /**
  1505. * @brief Disable CLUT Access Error Interrupt
  1506. * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE
  1507. * @param DMA2Dx DMA2D Instance
  1508. * @retval None
  1509. */
  1510. __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1511. {
  1512. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1513. }
  1514. /**
  1515. * @brief Disable Transfer Watermark Interrupt
  1516. * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW
  1517. * @param DMA2Dx DMA2D Instance
  1518. * @retval None
  1519. */
  1520. __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1521. {
  1522. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1523. }
  1524. /**
  1525. * @brief Disable Transfer Complete Interrupt
  1526. * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC
  1527. * @param DMA2Dx DMA2D Instance
  1528. * @retval None
  1529. */
  1530. __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1531. {
  1532. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1533. }
  1534. /**
  1535. * @brief Disable Transfer Error Interrupt
  1536. * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE
  1537. * @param DMA2Dx DMA2D Instance
  1538. * @retval None
  1539. */
  1540. __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1541. {
  1542. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1543. }
  1544. /**
  1545. * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled.
  1546. * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE
  1547. * @param DMA2Dx DMA2D Instance
  1548. * @retval State of bit (1 or 0).
  1549. */
  1550. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx)
  1551. {
  1552. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE));
  1553. }
  1554. /**
  1555. * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled.
  1556. * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC
  1557. * @param DMA2Dx DMA2D Instance
  1558. * @retval State of bit (1 or 0).
  1559. */
  1560. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1561. {
  1562. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE));
  1563. }
  1564. /**
  1565. * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled.
  1566. * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE
  1567. * @param DMA2Dx DMA2D Instance
  1568. * @retval State of bit (1 or 0).
  1569. */
  1570. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1571. {
  1572. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE));
  1573. }
  1574. /**
  1575. * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled.
  1576. * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW
  1577. * @param DMA2Dx DMA2D Instance
  1578. * @retval State of bit (1 or 0).
  1579. */
  1580. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx)
  1581. {
  1582. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE));
  1583. }
  1584. /**
  1585. * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled.
  1586. * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC
  1587. * @param DMA2Dx DMA2D Instance
  1588. * @retval State of bit (1 or 0).
  1589. */
  1590. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx)
  1591. {
  1592. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE));
  1593. }
  1594. /**
  1595. * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled.
  1596. * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE
  1597. * @param DMA2Dx DMA2D Instance
  1598. * @retval State of bit (1 or 0).
  1599. */
  1600. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx)
  1601. {
  1602. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE));
  1603. }
  1604. /**
  1605. * @}
  1606. */
  1607. #if defined(USE_FULL_LL_DRIVER)
  1608. /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions
  1609. * @{
  1610. */
  1611. ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx);
  1612. ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1613. void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1614. void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx);
  1615. void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg);
  1616. void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct);
  1617. uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1618. uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1619. uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1620. uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1621. void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines);
  1622. /**
  1623. * @}
  1624. */
  1625. #endif /* USE_FULL_LL_DRIVER */
  1626. /**
  1627. * @}
  1628. */
  1629. /**
  1630. * @}
  1631. */
  1632. #endif /* defined (DMA2D) */
  1633. /**
  1634. * @}
  1635. */
  1636. #ifdef __cplusplus
  1637. }
  1638. #endif
  1639. #endif /* __STM32F4xx_LL_DMA2D_H */
  1640. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/