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stm32lib/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_fmpi2c.h

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  1. /**

  2.   ******************************************************************************

  3.   * @file    stm32f4xx_hal_fmpi2c.h

  4.   * @author  MCD Application Team

  5.   * @version V1.7.1

  6.   * @date    14-April-2017

  7.   * @brief   Header file of FMPI2C HAL module.

  8.   ******************************************************************************

  9.   * @attention

  10.   *

  11.   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>

  12.   *

  13.   * Redistribution and use in source and binary forms, with or without modification,

  14.   * are permitted provided that the following conditions are met:

  15.   *   1. Redistributions of source code must retain the above copyright notice,

  16.   *      this list of conditions and the following disclaimer.

  17.   *   2. Redistributions in binary form must reproduce the above copyright notice,

  18.   *      this list of conditions and the following disclaimer in the documentation

  19.   *      and/or other materials provided with the distribution.

  20.   *   3. Neither the name of STMicroelectronics nor the names of its contributors

  21.   *      may be used to endorse or promote products derived from this software

  22.   *      without specific prior written permission.

  23.   *

  24.   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"

  25.   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

  26.   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE

  27.   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE

  28.   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

  29.   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR

  30.   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER

  31.   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,

  32.   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE

  33.   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

  34.   *

  35.   ******************************************************************************

  36.   */

  37. 

  38. /* Define to prevent recursive inclusion -------------------------------------*/

  39. #ifndef __STM32F4xx_HAL_FMPI2C_H

  40. #define __STM32F4xx_HAL_FMPI2C_H

  41. 

  42. #ifdef __cplusplus

  43.  extern "C" {

  44. #endif

  45. 

  46. #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) || defined(STM32F412Zx) ||\

  47.     defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)

  48. 

  49. /* Includes ------------------------------------------------------------------*/

  50. #include "stm32f4xx_hal_def.h"

  51. 

  52. /** @addtogroup STM32F4xx_HAL_Driver

  53.   * @{

  54.   */

  55. 

  56. /** @addtogroup FMPI2C

  57.   * @{

  58.   */

  59. 

  60. /* Exported types ------------------------------------------------------------*/

  61. /** @defgroup FMPI2C_Exported_Types FMPI2C Exported Types

  62.   * @{

  63.   */

  64. 

  65. /** @defgroup FMPI2C_Configuration_Structure_definition FMPI2C Configuration Structure definition

  66.   * @brief  FMPI2C Configuration Structure definition

  67.   * @{

  68.   */

  69. typedef struct

  70. {

  71.   uint32_t Timing;              /*!< Specifies the FMPI2C_TIMINGR_register value.

  72.                                   This parameter calculated by referring to FMPI2C initialization

  73.                                          section in Reference manual */

  74. 

  75.   uint32_t OwnAddress1;         /*!< Specifies the first device own address.

  76.                                   This parameter can be a 7-bit or 10-bit address. */

  77. 

  78.   uint32_t AddressingMode;      /*!< Specifies if 7-bit or 10-bit addressing mode is selected.

  79.                                   This parameter can be a value of @ref FMPI2C_ADDRESSING_MODE */

  80. 

  81.   uint32_t DualAddressMode;     /*!< Specifies if dual addressing mode is selected.

  82.                                   This parameter can be a value of @ref FMPI2C_DUAL_ADDRESSING_MODE */

  83. 

  84.   uint32_t OwnAddress2;         /*!< Specifies the second device own address if dual addressing mode is selected

  85.                                   This parameter can be a 7-bit address. */

  86. 

  87.   uint32_t OwnAddress2Masks;    /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected

  88.                                   This parameter can be a value of @ref FMPI2C_OWN_ADDRESS2_MASKS */

  89. 

  90.   uint32_t GeneralCallMode;     /*!< Specifies if general call mode is selected.

  91.                                   This parameter can be a value of @ref FMPI2C_GENERAL_CALL_ADDRESSING_MODE */

  92. 

  93.   uint32_t NoStretchMode;       /*!< Specifies if nostretch mode is selected.

  94.                                   This parameter can be a value of @ref FMPI2C_NOSTRETCH_MODE */

  95. 

  96. }FMPI2C_InitTypeDef;

  97. 

  98. /**

  99.   * @}

  100.   */

  101. 

  102. /** @defgroup HAL_state_structure_definition HAL state structure definition

  103.   * @brief  HAL State structure definition

  104.   * @note  HAL FMPI2C State value coding follow below described bitmap :

  105.   *          b7-b6  Error information

  106.   *             00 : No Error

  107.   *             01 : Abort (Abort user request on going)

  108.   *             10 : Timeout

  109.   *             11 : Error

  110.   *          b5     IP initilisation status

  111.   *             0  : Reset (IP not initialized)

  112.   *             1  : Init done (IP initialized and ready to use. HAL FMPI2C Init function called)

  113.   *          b4     (not used)

  114.   *             x  : Should be set to 0

  115.   *          b3

  116.   *             0  : Ready or Busy (No Listen mode ongoing)

  117.   *             1  : Listen (IP in Address Listen Mode)

  118.   *          b2     Intrinsic process state

  119.   *             0  : Ready

  120.   *             1  : Busy (IP busy with some configuration or internal operations)

  121.   *          b1     Rx state

  122.   *             0  : Ready (no Rx operation ongoing)

  123.   *             1  : Busy (Rx operation ongoing)

  124.   *          b0     Tx state

  125.   *             0  : Ready (no Tx operation ongoing)

  126.   *             1  : Busy (Tx operation ongoing)

  127.   * @{

  128.   */

  129. typedef enum

  130. {

  131.   HAL_FMPI2C_STATE_RESET             = 0x00U,   /*!< Peripheral is not yet Initialized         */

  132.   HAL_FMPI2C_STATE_READY             = 0x20U,   /*!< Peripheral Initialized and ready for use  */

  133.   HAL_FMPI2C_STATE_BUSY              = 0x24U,   /*!< An internal process is ongoing            */

  134.   HAL_FMPI2C_STATE_BUSY_TX           = 0x21U,   /*!< Data Transmission process is ongoing      */

  135.   HAL_FMPI2C_STATE_BUSY_RX           = 0x22U,   /*!< Data Reception process is ongoing         */

  136.   HAL_FMPI2C_STATE_LISTEN            = 0x28U,   /*!< Address Listen Mode is ongoing            */

  137.   HAL_FMPI2C_STATE_BUSY_TX_LISTEN    = 0x29U,   /*!< Address Listen Mode and Data Transmission

  138.                                                  process is ongoing                        */

  139.   HAL_FMPI2C_STATE_BUSY_RX_LISTEN    = 0x2AU,   /*!< Address Listen Mode and Data Reception

  140.                                                  process is ongoing                        */

  141.   HAL_FMPI2C_STATE_ABORT             = 0x60U,   /*!< Abort user request ongoing                */

  142.   HAL_FMPI2C_STATE_TIMEOUT           = 0xA0U,   /*!< Timeout state                             */

  143.   HAL_FMPI2C_STATE_ERROR             = 0xE0U    /*!< Error                                     */

  144. 

  145. }HAL_FMPI2C_StateTypeDef;

  146. 

  147. /**

  148.   * @}

  149.   */

  150. 

  151. /** @defgroup HAL_mode_structure_definition HAL mode structure definition

  152.   * @brief  HAL Mode structure definition

  153.   * @note  HAL FMPI2C Mode value coding follow below described bitmap :

  154.   *          b7     (not used)

  155.   *             x  : Should be set to 0

  156.   *          b6

  157.   *             0  : None

  158.   *             1  : Memory (HAL FMPI2C communication is in Memory Mode)

  159.   *          b5

  160.   *             0  : None

  161.   *             1  : Slave (HAL FMPI2C communication is in Slave Mode)

  162.   *          b4

  163.   *             0  : None

  164.   *             1  : Master (HAL FMPI2C communication is in Master Mode)

  165.   *          b3-b2-b1-b0  (not used)

  166.   *             xxxx : Should be set to 0000

  167.   * @{

  168.   */

  169. typedef enum

  170. {

  171.   HAL_FMPI2C_MODE_NONE               = 0x00U,   /*!< No FMPI2C communication on going             */

  172.   HAL_FMPI2C_MODE_MASTER             = 0x10U,   /*!< FMPI2C communication is in Master Mode       */

  173.   HAL_FMPI2C_MODE_SLAVE              = 0x20U,   /*!< FMPI2C communication is in Slave Mode        */

  174.   HAL_FMPI2C_MODE_MEM                = 0x40U    /*!< FMPI2C communication is in Memory Mode       */

  175. 

  176. }HAL_FMPI2C_ModeTypeDef;

  177. 

  178. /**

  179.   * @}

  180.   */

  181. 

  182. /** @defgroup FMPI2C_Error_Code_definition FMPI2C Error Code definition

  183.   * @brief  FMPI2C Error Code definition

  184.   * @{

  185.   */

  186. #define HAL_FMPI2C_ERROR_NONE      0x00000000U    /*!< No error              */

  187. #define HAL_FMPI2C_ERROR_BERR      0x00000001U    /*!< BERR error            */

  188. #define HAL_FMPI2C_ERROR_ARLO      0x00000002U    /*!< ARLO error            */

  189. #define HAL_FMPI2C_ERROR_AF        0x00000004U    /*!< ACKF error            */

  190. #define HAL_FMPI2C_ERROR_OVR       0x00000008U    /*!< OVR error             */

  191. #define HAL_FMPI2C_ERROR_DMA       0x00000010U    /*!< DMA transfer error    */

  192. #define HAL_FMPI2C_ERROR_TIMEOUT   0x00000020U    /*!< Timeout error         */

  193. #define HAL_FMPI2C_ERROR_SIZE      0x00000040U    /*!< Size Management error */

  194. /**

  195.   * @}

  196.   */

  197. 

  198. /** @defgroup FMPI2C_handle_Structure_definition FMPI2C handle Structure definition

  199.   * @brief  FMPI2C handle Structure definition

  200.   * @{

  201.   */

  202. typedef struct __FMPI2C_HandleTypeDef

  203. {

  204.   FMPI2C_TypeDef                *Instance;      /*!< FMPI2C registers base address                */

  205. 

  206.   FMPI2C_InitTypeDef            Init;           /*!< FMPI2C communication parameters              */

  207. 

  208.   uint8_t                    *pBuffPtr;         /*!< Pointer to FMPI2C transfer buffer            */

  209. 

  210.   uint16_t                   XferSize;          /*!< FMPI2C transfer size                         */

  211. 

  212.   __IO uint16_t              XferCount;         /*!< FMPI2C transfer counter                      */

  213. 

  214.   __IO uint32_t              XferOptions;       /*!< FMPI2C sequantial transfer options, this parameter can

  215.                                                   be a value of @ref FMPI2C_XFEROPTIONS */

  216. 

  217.   __IO uint32_t              PreviousState;     /*!< FMPI2C communication Previous state          */

  218. 

  219.   HAL_StatusTypeDef (*XferISR)(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags, uint32_t ITSources); /*!< FMPI2C transfer IRQ handler function pointer */

  220. 

  221.   DMA_HandleTypeDef          *hdmatx;           /*!< FMPI2C Tx DMA handle parameters              */

  222. 

  223.   DMA_HandleTypeDef          *hdmarx;           /*!< FMPI2C Rx DMA handle parameters              */

  224. 

  225.   HAL_LockTypeDef            Lock;              /*!< FMPI2C locking object                        */

  226. 

  227.   __IO HAL_FMPI2C_StateTypeDef  State;          /*!< FMPI2C communication state                   */

  228. 

  229.   __IO HAL_FMPI2C_ModeTypeDef   Mode;           /*!< FMPI2C communication mode                    */

  230. 

  231.   __IO uint32_t              ErrorCode;         /*!< FMPI2C Error code                            */

  232. 

  233.   __IO uint32_t              AddrEventCount;    /*!< FMPI2C Address Event counter                 */

  234. }FMPI2C_HandleTypeDef;

  235. /**

  236.   * @}

  237.   */

  238. 

  239. /**

  240.   * @}

  241.   */

  242. /* Exported constants --------------------------------------------------------*/

  243. 

  244. /** @defgroup FMPI2C_Exported_Constants FMPI2C Exported Constants

  245.   * @{

  246.   */

  247. 

  248. /** @defgroup FMPI2C_XFEROPTIONS  FMPI2C Sequential Transfer Options

  249.   * @{

  250.   */

  251. #define FMPI2C_FIRST_FRAME                 ((uint32_t)FMPI2C_SOFTEND_MODE)

  252. #define FMPI2C_FIRST_AND_NEXT_FRAME        ((uint32_t)(FMPI2C_RELOAD_MODE | FMPI2C_SOFTEND_MODE))

  253. #define FMPI2C_NEXT_FRAME                  ((uint32_t)(FMPI2C_RELOAD_MODE | FMPI2C_SOFTEND_MODE))

  254. #define FMPI2C_FIRST_AND_LAST_FRAME        ((uint32_t)FMPI2C_AUTOEND_MODE)

  255. #define FMPI2C_LAST_FRAME                  ((uint32_t)FMPI2C_AUTOEND_MODE)

  256. /**

  257.   * @}

  258.   */

  259. 

  260. /** @defgroup FMPI2C_ADDRESSING_MODE FMPI2C Addressing Mode

  261.   * @{

  262.   */

  263. #define FMPI2C_ADDRESSINGMODE_7BIT         0x00000001U

  264. #define FMPI2C_ADDRESSINGMODE_10BIT        0x00000002U

  265. /**

  266.   * @}

  267.   */

  268. 

  269. /** @defgroup FMPI2C_DUAL_ADDRESSING_MODE FMPI2C Dual Addressing Mode

  270.   * @{

  271.   */

  272. #define FMPI2C_DUALADDRESS_DISABLE         0x00000000U

  273. #define FMPI2C_DUALADDRESS_ENABLE          FMPI2C_OAR2_OA2EN

  274. /**

  275.   * @}

  276.   */

  277. 

  278. /** @defgroup FMPI2C_OWN_ADDRESS2_MASKS FMPI2C Own Address2 Masks

  279.   * @{

  280.   */

  281. 

  282. #define FMPI2C_OA2_NOMASK                  ((uint8_t)0x00)

  283. #define FMPI2C_OA2_MASK01                  ((uint8_t)0x01)

  284. #define FMPI2C_OA2_MASK02                  ((uint8_t)0x02)

  285. #define FMPI2C_OA2_MASK03                  ((uint8_t)0x03)

  286. #define FMPI2C_OA2_MASK04                  ((uint8_t)0x04)

  287. #define FMPI2C_OA2_MASK05                  ((uint8_t)0x05)

  288. #define FMPI2C_OA2_MASK06                  ((uint8_t)0x06)

  289. #define FMPI2C_OA2_MASK07                  ((uint8_t)0x07)

  290. 

  291. /**

  292.   * @}

  293.   */

  294. 

  295. /** @defgroup FMPI2C_GENERAL_CALL_ADDRESSING_MODE FMPI2C General Call Addressing Mode

  296.   * @{

  297.   */

  298. #define FMPI2C_GENERALCALL_DISABLE         0x00000000U

  299. #define FMPI2C_GENERALCALL_ENABLE          FMPI2C_CR1_GCEN

  300. /**

  301.   * @}

  302.   */

  303. 

  304. /** @defgroup FMPI2C_NOSTRETCH_MODE FMPI2C No-Stretch Mode

  305.   * @{

  306.   */

  307. #define FMPI2C_NOSTRETCH_DISABLE           0x00000000U

  308. #define FMPI2C_NOSTRETCH_ENABLE            FMPI2C_CR1_NOSTRETCH

  309. /**

  310.   * @}

  311.   */

  312. 

  313. /** @defgroup FMPI2C_MEMORY_ADDRESS_SIZE FMPI2C Memory Address Size

  314.   * @{

  315.   */

  316. #define FMPI2C_MEMADD_SIZE_8BIT            0x00000001U

  317. #define FMPI2C_MEMADD_SIZE_16BIT           0x00000002U

  318. 

  319. /**

  320.   * @}

  321.   */

  322. 

  323. /** @defgroup FMPI2C_XferDirection FMPI2C Transfer Direction

  324.   * @{

  325.   */

  326. #define FMPI2C_DIRECTION_RECEIVE           0x00000000U

  327. #define FMPI2C_DIRECTION_TRANSMIT          0x00000001U

  328. 

  329. /**

  330.   * @}

  331.   */

  332. 

  333. /** @defgroup FMPI2C_RELOAD_END_MODE FMPI2C Reload End Mode

  334.   * @{

  335.   */

  336. #define  FMPI2C_RELOAD_MODE                FMPI2C_CR2_RELOAD

  337. #define  FMPI2C_AUTOEND_MODE               FMPI2C_CR2_AUTOEND

  338. #define  FMPI2C_SOFTEND_MODE               0x00000000U

  339. 

  340. /**

  341.   * @}

  342.   */

  343. 

  344. /** @defgroup FMPI2C_START_STOP_MODE FMPI2C Start or Stop Mode

  345.   * @{

  346.   */

  347. 

  348. #define  FMPI2C_NO_STARTSTOP               0x00000000U

  349. #define  FMPI2C_GENERATE_STOP              FMPI2C_CR2_STOP

  350. #define  FMPI2C_GENERATE_START_READ        (uint32_t)(FMPI2C_CR2_START | FMPI2C_CR2_RD_WRN)

  351. #define  FMPI2C_GENERATE_START_WRITE       FMPI2C_CR2_START

  352. 

  353. /**

  354.   * @}

  355.   */

  356. 

  357. /** @defgroup FMPI2C_Interrupt_configuration_definition FMPI2C Interrupt configuration definition

  358.   * @brief FMPI2C Interrupt definition

  359.   *        Elements values convention: 0xXXXXXXXX

  360.   *           - XXXXXXXX  : Interrupt control mask

  361.   * @{

  362.   */

  363. #define FMPI2C_IT_ERRI                     FMPI2C_CR1_ERRIE

  364. #define FMPI2C_IT_TCI                      FMPI2C_CR1_TCIE

  365. #define FMPI2C_IT_STOPI                    FMPI2C_CR1_STOPIE

  366. #define FMPI2C_IT_NACKI                    FMPI2C_CR1_NACKIE

  367. #define FMPI2C_IT_ADDRI                    FMPI2C_CR1_ADDRIE

  368. #define FMPI2C_IT_RXI                      FMPI2C_CR1_RXIE

  369. #define FMPI2C_IT_TXI                      FMPI2C_CR1_TXIE

  370. /**

  371.   * @}

  372.   */

  373. 

  374. /** @defgroup FMPI2C_Flag_definition FMPI2C Flag definition

  375.   * @{

  376.   */

  377. #define FMPI2C_FLAG_TXE                    FMPI2C_ISR_TXE

  378. #define FMPI2C_FLAG_TXIS                   FMPI2C_ISR_TXIS

  379. #define FMPI2C_FLAG_RXNE                   FMPI2C_ISR_RXNE

  380. #define FMPI2C_FLAG_ADDR                   FMPI2C_ISR_ADDR

  381. #define FMPI2C_FLAG_AF                     FMPI2C_ISR_NACKF

  382. #define FMPI2C_FLAG_STOPF                  FMPI2C_ISR_STOPF

  383. #define FMPI2C_FLAG_TC                     FMPI2C_ISR_TC

  384. #define FMPI2C_FLAG_TCR                    FMPI2C_ISR_TCR

  385. #define FMPI2C_FLAG_BERR                   FMPI2C_ISR_BERR

  386. #define FMPI2C_FLAG_ARLO                   FMPI2C_ISR_ARLO

  387. #define FMPI2C_FLAG_OVR                    FMPI2C_ISR_OVR

  388. #define FMPI2C_FLAG_PECERR                 FMPI2C_ISR_PECERR

  389. #define FMPI2C_FLAG_TIMEOUT                FMPI2C_ISR_TIMEOUT

  390. #define FMPI2C_FLAG_ALERT                  FMPI2C_ISR_ALERT

  391. #define FMPI2C_FLAG_BUSY                   FMPI2C_ISR_BUSY

  392. #define FMPI2C_FLAG_DIR                    FMPI2C_ISR_DIR

  393. /**

  394.   * @}

  395.   */

  396. 

  397. /**

  398.   * @}

  399.   */

  400. 

  401. /* Exported macros -----------------------------------------------------------*/

  402. 

  403. /** @defgroup FMPI2C_Exported_Macros FMPI2C Exported Macros

  404.   * @{

  405.   */

  406. 

  407. /** @brief Reset FMPI2C handle state.

  408.   * @param  __HANDLE__ specifies the FMPI2C Handle.

  409.   * @retval None

  410.   */

  411. #define __HAL_FMPI2C_RESET_HANDLE_STATE(__HANDLE__)                ((__HANDLE__)->State = HAL_FMPI2C_STATE_RESET)

  412. 

  413. /** @brief  Enable the specified FMPI2C interrupt.

  414.   * @param  __HANDLE__ specifies the FMPI2C Handle.

  415.   * @param  __INTERRUPT__ specifies the interrupt source to enable.

  416.   *        This parameter can be one of the following values:

  417.   *            @arg @ref FMPI2C_IT_ERRI  Errors interrupt enable

  418.   *            @arg @ref FMPI2C_IT_TCI   Transfer complete interrupt enable

  419.   *            @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable

  420.   *            @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable

  421.   *            @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable

  422.   *            @arg @ref FMPI2C_IT_RXI   RX interrupt enable

  423.   *            @arg @ref FMPI2C_IT_TXI   TX interrupt enable

  424.   *

  425.   * @retval None

  426.   */

  427. #define __HAL_FMPI2C_ENABLE_IT(__HANDLE__, __INTERRUPT__)          ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))

  428. 

  429. /** @brief  Disable the specified FMPI2C interrupt.

  430.   * @param  __HANDLE__ specifies the FMPI2C Handle.

  431.   * @param  __INTERRUPT__ specifies the interrupt source to disable.

  432.   *        This parameter can be one of the following values:

  433.   *            @arg @ref FMPI2C_IT_ERRI  Errors interrupt enable

  434.   *            @arg @ref FMPI2C_IT_TCI   Transfer complete interrupt enable

  435.   *            @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable

  436.   *            @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable

  437.   *            @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable

  438.   *            @arg @ref FMPI2C_IT_RXI   RX interrupt enable

  439.   *            @arg @ref FMPI2C_IT_TXI   TX interrupt enable

  440.   *

  441.   * @retval None

  442.   */

  443. #define __HAL_FMPI2C_DISABLE_IT(__HANDLE__, __INTERRUPT__)         ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))

  444. 

  445. /** @brief  Check whether the specified FMPI2C interrupt source is enabled or not.

  446.   * @param  __HANDLE__ specifies the FMPI2C Handle.

  447.   * @param  __INTERRUPT__ specifies the FMPI2C interrupt source to check.

  448.   *          This parameter can be one of the following values:

  449.   *            @arg @ref FMPI2C_IT_ERRI  Errors interrupt enable

  450.   *            @arg @ref FMPI2C_IT_TCI   Transfer complete interrupt enable

  451.   *            @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable

  452.   *            @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable

  453.   *            @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable

  454.   *            @arg @ref FMPI2C_IT_RXI   RX interrupt enable

  455.   *            @arg @ref FMPI2C_IT_TXI   TX interrupt enable

  456.   *

  457.   * @retval The new state of __INTERRUPT__ (SET or RESET).

  458.   */

  459. #define __HAL_FMPI2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)      ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)

  460. 

  461. /** @brief  Check whether the specified FMPI2C flag is set or not.

  462.   * @param  __HANDLE__ specifies the FMPI2C Handle.

  463.   * @param  __FLAG__ specifies the flag to check.

  464.   *        This parameter can be one of the following values:

  465.   *            @arg @ref FMPI2C_FLAG_TXE     Transmit data register empty

  466.   *            @arg @ref FMPI2C_FLAG_TXIS    Transmit interrupt status

  467.   *            @arg @ref FMPI2C_FLAG_RXNE    Receive data register not empty

  468.   *            @arg @ref FMPI2C_FLAG_ADDR    Address matched (slave mode)

  469.   *            @arg @ref FMPI2C_FLAG_AF      Acknowledge failure received flag

  470.   *            @arg @ref FMPI2C_FLAG_STOPF   STOP detection flag

  471.   *            @arg @ref FMPI2C_FLAG_TC      Transfer complete (master mode)

  472.   *            @arg @ref FMPI2C_FLAG_TCR     Transfer complete reload

  473.   *            @arg @ref FMPI2C_FLAG_BERR    Bus error

  474.   *            @arg @ref FMPI2C_FLAG_ARLO    Arbitration lost

  475.   *            @arg @ref FMPI2C_FLAG_OVR     Overrun/Underrun

  476.   *            @arg @ref FMPI2C_FLAG_PECERR  PEC error in reception

  477.   *            @arg @ref FMPI2C_FLAG_TIMEOUT Timeout or Tlow detection flag

  478.   *            @arg @ref FMPI2C_FLAG_ALERT   SMBus alert

  479.   *            @arg @ref FMPI2C_FLAG_BUSY    Bus busy

  480.   *            @arg @ref FMPI2C_FLAG_DIR     Transfer direction (slave mode)

  481.   *

  482.   * @retval The new state of __FLAG__ (SET or RESET).

  483.   */

  484. #define __HAL_FMPI2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET)

  485. 

  486. /** @brief  Clear the FMPI2C pending flags which are cleared by writing 1 in a specific bit.

  487.   * @param  __HANDLE__ specifies the FMPI2C Handle.

  488.   * @param  __FLAG__ specifies the flag to clear.

  489.   *          This parameter can be any combination of the following values:

  490.   *            @arg @ref FMPI2C_FLAG_TXE     Transmit data register empty

  491.   *            @arg @ref FMPI2C_FLAG_ADDR    Address matched (slave mode)

  492.   *            @arg @ref FMPI2C_FLAG_AF      Acknowledge failure received flag

  493.   *            @arg @ref FMPI2C_FLAG_STOPF   STOP detection flag

  494.   *            @arg @ref FMPI2C_FLAG_BERR    Bus error

  495.   *            @arg @ref FMPI2C_FLAG_ARLO    Arbitration lost

  496.   *            @arg @ref FMPI2C_FLAG_OVR     Overrun/Underrun

  497.   *            @arg @ref FMPI2C_FLAG_PECERR  PEC error in reception

  498.   *            @arg @ref FMPI2C_FLAG_TIMEOUT Timeout or Tlow detection flag

  499.   *            @arg @ref FMPI2C_FLAG_ALERT   SMBus alert

  500.   *

  501.   * @retval None

  502.   */

  503. #define __HAL_FMPI2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == FMPI2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \

  504.                                                                                  : ((__HANDLE__)->Instance->ICR = (__FLAG__)))

  505. 

  506. /** @brief  Enable the specified FMPI2C peripheral.

  507.   * @param  __HANDLE__ specifies the FMPI2C Handle.

  508.   * @retval None

  509.   */

  510. #define __HAL_FMPI2C_ENABLE(__HANDLE__)                            (SET_BIT((__HANDLE__)->Instance->CR1,  FMPI2C_CR1_PE))

  511. 

  512. /** @brief  Disable the specified FMPI2C peripheral.

  513.   * @param  __HANDLE__ specifies the FMPI2C Handle.

  514.   * @retval None

  515.   */

  516. #define __HAL_FMPI2C_DISABLE(__HANDLE__)                           (CLEAR_BIT((__HANDLE__)->Instance->CR1, FMPI2C_CR1_PE))

  517. 

  518. /** @brief  Generate a Non-Acknowledge FMPI2C peripheral in Slave mode.

  519.   * @param  __HANDLE__: specifies the FMPI2C Handle.

  520.   * @retval None

  521.   */

  522. #define __HAL_FMPI2C_GENERATE_NACK(__HANDLE__)                     (SET_BIT((__HANDLE__)->Instance->CR2, FMPI2C_CR2_NACK))

  523. /**

  524.   * @}

  525.   */

  526. 

  527. /* Include FMPI2C HAL Extended module */

  528. #include "stm32f4xx_hal_fmpi2c_ex.h"

  529. 

  530. /* Exported functions --------------------------------------------------------*/

  531. /** @addtogroup FMPI2C_Exported_Functions

  532.   * @{

  533.   */

  534. 

  535. /** @addtogroup FMPI2C_Exported_Functions_Group1 Initialization and de-initialization functions

  536.   * @{

  537.   */

  538. /* Initialization and de-initialization functions******************************/

  539. HAL_StatusTypeDef HAL_FMPI2C_Init(FMPI2C_HandleTypeDef *hfmpi2c);

  540. HAL_StatusTypeDef HAL_FMPI2C_DeInit (FMPI2C_HandleTypeDef *hfmpi2c);

  541. void HAL_FMPI2C_MspInit(FMPI2C_HandleTypeDef *hfmpi2c);

  542. void HAL_FMPI2C_MspDeInit(FMPI2C_HandleTypeDef *hfmpi2c);

  543. /**

  544.   * @}

  545.   */

  546. 

  547. /** @addtogroup FMPI2C_Exported_Functions_Group2 Input and Output operation functions

  548.   * @{

  549.   */

  550. /* IO operation functions  ****************************************************/

  551.  /******* Blocking mode: Polling */

  552. HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);

  553. HAL_StatusTypeDef HAL_FMPI2C_Master_Receive(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);

  554. HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);

  555. HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);

  556. HAL_StatusTypeDef HAL_FMPI2C_Mem_Write(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);

  557. HAL_StatusTypeDef HAL_FMPI2C_Mem_Read(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);

  558. HAL_StatusTypeDef HAL_FMPI2C_IsDeviceReady(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);

  559. 

  560.  /******* Non-Blocking mode: Interrupt */

  561. HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);

  562. HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);

  563. HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);

  564. HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);

  565. HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);

  566. HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);

  567. 

  568. HAL_StatusTypeDef HAL_FMPI2C_Master_Sequential_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);

  569. HAL_StatusTypeDef HAL_FMPI2C_Master_Sequential_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);

  570. HAL_StatusTypeDef HAL_FMPI2C_Slave_Sequential_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);

  571. HAL_StatusTypeDef HAL_FMPI2C_Slave_Sequential_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);

  572. HAL_StatusTypeDef HAL_FMPI2C_EnableListen_IT(FMPI2C_HandleTypeDef *hfmpi2c);

  573. HAL_StatusTypeDef HAL_FMPI2C_DisableListen_IT(FMPI2C_HandleTypeDef *hfmpi2c);

  574. HAL_StatusTypeDef HAL_FMPI2C_Master_Abort_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress);

  575. 

  576.  /******* Non-Blocking mode: DMA */

  577. HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);

  578. HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);

  579. HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);

  580. HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);

  581. HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);

  582. HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);

  583. /**

  584.   * @}

  585.   */

  586. 

  587. /** @addtogroup FMPI2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks

  588.  * @{

  589.  */

  590. /******* FMPI2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */

  591. void HAL_FMPI2C_EV_IRQHandler(FMPI2C_HandleTypeDef *hfmpi2c);

  592. void HAL_FMPI2C_ER_IRQHandler(FMPI2C_HandleTypeDef *hfmpi2c);

  593. void HAL_FMPI2C_MasterTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);

  594. void HAL_FMPI2C_MasterRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);

  595. void HAL_FMPI2C_SlaveTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);

  596. void HAL_FMPI2C_SlaveRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);

  597. void HAL_FMPI2C_AddrCallback(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);

  598. void HAL_FMPI2C_ListenCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);

  599. void HAL_FMPI2C_MemTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);

  600. void HAL_FMPI2C_MemRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);

  601. void HAL_FMPI2C_ErrorCallback(FMPI2C_HandleTypeDef *hfmpi2c);

  602. void HAL_FMPI2C_AbortCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);

  603. /**

  604.   * @}

  605.   */

  606. 

  607. /** @addtogroup FMPI2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions

  608.   * @{

  609.   */

  610. /* Peripheral State, Mode and Error functions  *********************************/

  611. HAL_FMPI2C_StateTypeDef HAL_FMPI2C_GetState(FMPI2C_HandleTypeDef *hfmpi2c);

  612. HAL_FMPI2C_ModeTypeDef  HAL_FMPI2C_GetMode(FMPI2C_HandleTypeDef *hfmpi2c);

  613. uint32_t             HAL_FMPI2C_GetError(FMPI2C_HandleTypeDef *hfmpi2c);

  614. 

  615. /**

  616.   * @}

  617.   */

  618. 

  619. /**

  620.   * @}

  621.   */

  622. 

  623. /* Private constants ---------------------------------------------------------*/

  624. /** @defgroup FMPI2C_Private_Constants FMPI2C Private Constants

  625.   * @{

  626.   */

  627. 

  628. /**

  629.   * @}

  630.   */

  631. 

  632. /* Private macros ------------------------------------------------------------*/

  633. /** @defgroup FMPI2C_Private_Macro FMPI2C Private Macros

  634.   * @{

  635.   */

  636. 

  637. #define IS_FMPI2C_ADDRESSING_MODE(MODE)    (((MODE) == FMPI2C_ADDRESSINGMODE_7BIT) || \

  638.                                           ((MODE) == FMPI2C_ADDRESSINGMODE_10BIT))

  639. 

  640. #define IS_FMPI2C_DUAL_ADDRESS(ADDRESS)    (((ADDRESS) == FMPI2C_DUALADDRESS_DISABLE) || \

  641.                                           ((ADDRESS) == FMPI2C_DUALADDRESS_ENABLE))

  642. 

  643. #define IS_FMPI2C_OWN_ADDRESS2_MASK(MASK)  (((MASK) == FMPI2C_OA2_NOMASK)  || \

  644.                                           ((MASK) == FMPI2C_OA2_MASK01) || \

  645.                                           ((MASK) == FMPI2C_OA2_MASK02) || \

  646.                                           ((MASK) == FMPI2C_OA2_MASK03) || \

  647.                                           ((MASK) == FMPI2C_OA2_MASK04) || \

  648.                                           ((MASK) == FMPI2C_OA2_MASK05) || \

  649.                                           ((MASK) == FMPI2C_OA2_MASK06) || \

  650.                                           ((MASK) == FMPI2C_OA2_MASK07))

  651. 

  652. #define IS_FMPI2C_GENERAL_CALL(CALL)       (((CALL) == FMPI2C_GENERALCALL_DISABLE) || \

  653.                                          ((CALL) == FMPI2C_GENERALCALL_ENABLE))

  654. 

  655. #define IS_FMPI2C_NO_STRETCH(STRETCH)      (((STRETCH) == FMPI2C_NOSTRETCH_DISABLE) || \

  656.                                          ((STRETCH) == FMPI2C_NOSTRETCH_ENABLE))

  657. 

  658. #define IS_FMPI2C_MEMADD_SIZE(SIZE)        (((SIZE) == FMPI2C_MEMADD_SIZE_8BIT) || \

  659.                                          ((SIZE) == FMPI2C_MEMADD_SIZE_16BIT))

  660. 

  661. #define IS_TRANSFER_MODE(MODE)          (((MODE) == FMPI2C_RELOAD_MODE)   || \

  662.                                          ((MODE) == FMPI2C_AUTOEND_MODE) || \

  663.                                          ((MODE) == FMPI2C_SOFTEND_MODE))

  664. 

  665. #define IS_TRANSFER_REQUEST(REQUEST)    (((REQUEST) == FMPI2C_GENERATE_STOP)        || \

  666.                                          ((REQUEST) == FMPI2C_GENERATE_START_READ)  || \

  667.                                          ((REQUEST) == FMPI2C_GENERATE_START_WRITE) || \

  668.                                          ((REQUEST) == FMPI2C_NO_STARTSTOP))

  669. 

  670. #define IS_FMPI2C_TRANSFER_OPTIONS_REQUEST(REQUEST)  (((REQUEST) == FMPI2C_FIRST_FRAME)          || \

  671.                                                       ((REQUEST) == FMPI2C_FIRST_AND_NEXT_FRAME) || \

  672.                                                       ((REQUEST) == FMPI2C_NEXT_FRAME)           || \

  673.                                                       ((REQUEST) == FMPI2C_FIRST_AND_LAST_FRAME) || \

  674.                                                       ((REQUEST) == FMPI2C_LAST_FRAME))

  675. 

  676. #define FMPI2C_RESET_CR2(__HANDLE__)                 ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(FMPI2C_CR2_SADD | FMPI2C_CR2_HEAD10R | FMPI2C_CR2_NBYTES | FMPI2C_CR2_RELOAD | FMPI2C_CR2_RD_WRN)))

  677. 

  678. #define FMPI2C_GET_ADDR_MATCH(__HANDLE__)            (((__HANDLE__)->Instance->ISR & FMPI2C_ISR_ADDCODE) >> 16)

  679. #define FMPI2C_GET_DIR(__HANDLE__)                   (((__HANDLE__)->Instance->ISR & FMPI2C_ISR_DIR) >> 16)

  680. #define FMPI2C_GET_STOP_MODE(__HANDLE__)             ((__HANDLE__)->Instance->CR2 & FMPI2C_CR2_AUTOEND)

  681. #define FMPI2C_GET_OWN_ADDRESS1(__HANDLE__)          ((__HANDLE__)->Instance->OAR1 & FMPI2C_OAR1_OA1)

  682. #define FMPI2C_GET_OWN_ADDRESS2(__HANDLE__)          ((__HANDLE__)->Instance->OAR2 & FMPI2C_OAR2_OA2)

  683. 

  684. #define IS_FMPI2C_OWN_ADDRESS1(ADDRESS1)             ((ADDRESS1) <= 0x000003FFU)

  685. #define IS_FMPI2C_OWN_ADDRESS2(ADDRESS2)             ((ADDRESS2) <= (uint16_t)0x00FF)

  686. 

  687. #define FMPI2C_MEM_ADD_MSB(__ADDRESS__)              ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0xFF00)) >> 8U)))

  688. #define FMPI2C_MEM_ADD_LSB(__ADDRESS__)              ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))

  689. 

  690. #define FMPI2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == FMPI2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | (FMPI2C_CR2_START) | (FMPI2C_CR2_AUTOEND)) & (~FMPI2C_CR2_RD_WRN)) : \

  691.                                                           (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | (FMPI2C_CR2_ADD10) | (FMPI2C_CR2_START)) & (~FMPI2C_CR2_RD_WRN)))

  692. /**

  693.   * @}

  694.   */

  695. 

  696. /* Private Functions ---------------------------------------------------------*/

  697. /** @defgroup FMPI2C_Private_Functions FMPI2C Private Functions

  698.   * @{

  699.   */

  700. /* Private functions are defined in stm32f4xx_hal_fmpi2c.c file */

  701. /**

  702.   * @}

  703.   */

  704. 

  705. /**

  706.   * @}

  707.   */

  708. 

  709. /**

  710.   * @}

  711.   */

  712. #endif /* STM32F410xx || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */

  713. #ifdef __cplusplus

  714. }

  715. #endif

  716. 

  717. 

  718. #endif /* __STM32F4xx_HAL_FMPI2C_H */

  719. 

  720. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/