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  1. /**
  2. ******************************************************************************
  3. * @file stm32f7xx_hal_dfsdm.c
  4. * @author MCD Application Team
  5. * @version V1.1.2
  6. * @date 23-September-2016
  7. * @brief This file provides firmware functions to manage the following
  8. * functionalities of the Digital Filter for Sigma-Delta Modulators
  9. * (DFSDM) peripherals:
  10. * + Initialization and configuration of channels and filters
  11. * + Regular channels configuration
  12. * + Injected channels configuration
  13. * + Regular/Injected Channels DMA Configuration
  14. * + Interrupts and flags management
  15. * + Analog watchdog feature
  16. * + Short-circuit detector feature
  17. * + Extremes detector feature
  18. * + Clock absence detector feature
  19. * + Break generation on analog watchdog or short-circuit event
  20. *
  21. @verbatim
  22. ==============================================================================
  23. ##### How to use this driver #####
  24. ==============================================================================
  25. [..]
  26. *** Channel initialization ***
  27. ==============================
  28. [..]
  29. (#) User has first to initialize channels (before filters initialization).
  30. (#) As prerequisite, fill in the HAL_DFSDM_ChannelMspInit() :
  31. (++) Enable DFSDMz clock interface with __HAL_RCC_DFSDMz_CLK_ENABLE().
  32. (++) Enable the clocks for the DFSDMz GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().
  33. (++) Configure these DFSDMz pins in alternate mode using HAL_GPIO_Init().
  34. (++) If interrupt mode is used, enable and configure DFSDMz_FLT0 global
  35. interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
  36. (#) Configure the output clock, input, serial interface, analog watchdog,
  37. offset and data right bit shift parameters for this channel using the
  38. HAL_DFSDM_ChannelInit() function.
  39. *** Channel clock absence detector ***
  40. ======================================
  41. [..]
  42. (#) Start clock absence detector using HAL_DFSDM_ChannelCkabStart() or
  43. HAL_DFSDM_ChannelCkabStart_IT().
  44. (#) In polling mode, use HAL_DFSDM_ChannelPollForCkab() to detect the clock
  45. absence.
  46. (#) In interrupt mode, HAL_DFSDM_ChannelCkabCallback() will be called if
  47. clock absence is detected.
  48. (#) Stop clock absence detector using HAL_DFSDM_ChannelCkabStop() or
  49. HAL_DFSDM_ChannelCkabStop_IT().
  50. (#) Please note that the same mode (polling or interrupt) has to be used
  51. for all channels because the channels are sharing the same interrupt.
  52. (#) Please note also that in interrupt mode, if clock absence detector is
  53. stopped for one channel, interrupt will be disabled for all channels.
  54. *** Channel short circuit detector ***
  55. ======================================
  56. [..]
  57. (#) Start short circuit detector using HAL_DFSDM_ChannelScdStart() or
  58. or HAL_DFSDM_ChannelScdStart_IT().
  59. (#) In polling mode, use HAL_DFSDM_ChannelPollForScd() to detect short
  60. circuit.
  61. (#) In interrupt mode, HAL_DFSDM_ChannelScdCallback() will be called if
  62. short circuit is detected.
  63. (#) Stop short circuit detector using HAL_DFSDM_ChannelScdStop() or
  64. or HAL_DFSDM_ChannelScdStop_IT().
  65. (#) Please note that the same mode (polling or interrupt) has to be used
  66. for all channels because the channels are sharing the same interrupt.
  67. (#) Please note also that in interrupt mode, if short circuit detector is
  68. stopped for one channel, interrupt will be disabled for all channels.
  69. *** Channel analog watchdog value ***
  70. =====================================
  71. [..]
  72. (#) Get analog watchdog filter value of a channel using
  73. HAL_DFSDM_ChannelGetAwdValue().
  74. *** Channel offset value ***
  75. =====================================
  76. [..]
  77. (#) Modify offset value of a channel using HAL_DFSDM_ChannelModifyOffset().
  78. *** Filter initialization ***
  79. =============================
  80. [..]
  81. (#) After channel initialization, user has to init filters.
  82. (#) As prerequisite, fill in the HAL_DFSDM_FilterMspInit() :
  83. (++) If interrupt mode is used , enable and configure DFSDMz_FLTx global
  84. interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
  85. Please note that DFSDMz_FLT0 global interrupt could be already
  86. enabled if interrupt is used for channel.
  87. (++) If DMA mode is used, configure DMA with HAL_DMA_Init() and link it
  88. with DFSDMz filter handle using __HAL_LINKDMA().
  89. (#) Configure the regular conversion, injected conversion and filter
  90. parameters for this filter using the HAL_DFSDM_FilterInit() function.
  91. *** Filter regular channel conversion ***
  92. =========================================
  93. [..]
  94. (#) Select regular channel and enable/disable continuous mode using
  95. HAL_DFSDM_FilterConfigRegChannel().
  96. (#) Start regular conversion using HAL_DFSDM_FilterRegularStart(),
  97. HAL_DFSDM_FilterRegularStart_IT(), HAL_DFSDM_FilterRegularStart_DMA() or
  98. HAL_DFSDM_FilterRegularMsbStart_DMA().
  99. (#) In polling mode, use HAL_DFSDM_FilterPollForRegConversion() to detect
  100. the end of regular conversion.
  101. (#) In interrupt mode, HAL_DFSDM_FilterRegConvCpltCallback() will be called
  102. at the end of regular conversion.
  103. (#) Get value of regular conversion and corresponding channel using
  104. HAL_DFSDM_FilterGetRegularValue().
  105. (#) In DMA mode, HAL_DFSDM_FilterRegConvHalfCpltCallback() and
  106. HAL_DFSDM_FilterRegConvCpltCallback() will be called respectively at the
  107. half transfer and at the transfer complete. Please note that
  108. HAL_DFSDM_FilterRegConvHalfCpltCallback() will be called only in DMA
  109. circular mode.
  110. (#) Stop regular conversion using HAL_DFSDM_FilterRegularStop(),
  111. HAL_DFSDM_FilterRegularStop_IT() or HAL_DFSDM_FilterRegularStop_DMA().
  112. *** Filter injected channels conversion ***
  113. ===========================================
  114. [..]
  115. (#) Select injected channels using HAL_DFSDM_FilterConfigInjChannel().
  116. (#) Start injected conversion using HAL_DFSDM_FilterInjectedStart(),
  117. HAL_DFSDM_FilterInjectedStart_IT(), HAL_DFSDM_FilterInjectedStart_DMA() or
  118. HAL_DFSDM_FilterInjectedMsbStart_DMA().
  119. (#) In polling mode, use HAL_DFSDM_FilterPollForInjConversion() to detect
  120. the end of injected conversion.
  121. (#) In interrupt mode, HAL_DFSDM_FilterInjConvCpltCallback() will be called
  122. at the end of injected conversion.
  123. (#) Get value of injected conversion and corresponding channel using
  124. HAL_DFSDM_FilterGetInjectedValue().
  125. (#) In DMA mode, HAL_DFSDM_FilterInjConvHalfCpltCallback() and
  126. HAL_DFSDM_FilterInjConvCpltCallback() will be called respectively at the
  127. half transfer and at the transfer complete. Please note that
  128. HAL_DFSDM_FilterInjConvCpltCallback() will be called only in DMA
  129. circular mode.
  130. (#) Stop injected conversion using HAL_DFSDM_FilterInjectedStop(),
  131. HAL_DFSDM_FilterInjectedStop_IT() or HAL_DFSDM_FilterInjectedStop_DMA().
  132. *** Filter analog watchdog ***
  133. ==============================
  134. [..]
  135. (#) Start filter analog watchdog using HAL_DFSDM_FilterAwdStart_IT().
  136. (#) HAL_DFSDM_FilterAwdCallback() will be called if analog watchdog occurs.
  137. (#) Stop filter analog watchdog using HAL_DFSDM_FilterAwdStop_IT().
  138. *** Filter extreme detector ***
  139. ===============================
  140. [..]
  141. (#) Start filter extreme detector using HAL_DFSDM_FilterExdStart().
  142. (#) Get extreme detector maximum value using HAL_DFSDM_FilterGetExdMaxValue().
  143. (#) Get extreme detector minimum value using HAL_DFSDM_FilterGetExdMinValue().
  144. (#) Start filter extreme detector using HAL_DFSDM_FilterExdStop().
  145. *** Filter conversion time ***
  146. ==============================
  147. [..]
  148. (#) Get conversion time value using HAL_DFSDM_FilterGetConvTimeValue().
  149. @endverbatim
  150. ******************************************************************************
  151. * @attention
  152. *
  153. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  154. *
  155. * Redistribution and use in source and binary forms, with or without modification,
  156. * are permitted provided that the following conditions are met:
  157. * 1. Redistributions of source code must retain the above copyright notice,
  158. * this list of conditions and the following disclaimer.
  159. * 2. Redistributions in binary form must reproduce the above copyright notice,
  160. * this list of conditions and the following disclaimer in the documentation
  161. * and/or other materials provided with the distribution.
  162. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  163. * may be used to endorse or promote products derived from this software
  164. * without specific prior written permission.
  165. *
  166. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  167. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  168. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  169. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  170. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  171. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  172. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  173. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  174. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  175. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  176. *
  177. ******************************************************************************
  178. */
  179. /* Includes ------------------------------------------------------------------*/
  180. #include "stm32f7xx_hal.h"
  181. /** @addtogroup STM32F7xx_HAL_Driver
  182. * @{
  183. */
  184. #ifdef HAL_DFSDM_MODULE_ENABLED
  185. #if defined (STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx)
  186. /** @defgroup DFSDM DFSDM
  187. * @brief DFSDM HAL driver module
  188. * @{
  189. */
  190. /* Private typedef -----------------------------------------------------------*/
  191. /* Private define ------------------------------------------------------------*/
  192. /** @defgroup DFSDM_Private_Define DFSDM Private Define
  193. * @{
  194. */
  195. #define DFSDM_CHCFGR1_CLK_DIV_OFFSET POSITION_VAL(DFSDM_CHCFGR1_CKOUTDIV)
  196. #define DFSDM_CHAWSCDR_BKSCD_OFFSET POSITION_VAL(DFSDM_CHAWSCDR_BKSCD)
  197. #define DFSDM_CHAWSCDR_FOSR_OFFSET POSITION_VAL(DFSDM_CHAWSCDR_AWFOSR)
  198. #define DFSDM_CHCFGR2_OFFSET_OFFSET POSITION_VAL(DFSDM_CHCFGR2_OFFSET)
  199. #define DFSDM_CHCFGR2_DTRBS_OFFSET POSITION_VAL(DFSDM_CHCFGR2_DTRBS)
  200. #define DFSDM_FLTFCR_FOSR_OFFSET POSITION_VAL(DFSDM_FLTFCR_FOSR)
  201. #define DFSDM_FLTCR1_MSB_RCH_OFFSET 8
  202. #define DFSDM_FLTCR2_EXCH_OFFSET POSITION_VAL(DFSDM_FLTCR2_EXCH)
  203. #define DFSDM_FLTCR2_AWDCH_OFFSET POSITION_VAL(DFSDM_FLTCR2_AWDCH)
  204. #define DFSDM_FLTISR_CKABF_OFFSET POSITION_VAL(DFSDM_FLTISR_CKABF)
  205. #define DFSDM_FLTISR_SCDF_OFFSET POSITION_VAL(DFSDM_FLTISR_SCDF)
  206. #define DFSDM_FLTICR_CLRCKABF_OFFSET POSITION_VAL(DFSDM_FLTICR_CLRCKABF)
  207. #define DFSDM_FLTICR_CLRSCDF_OFFSET POSITION_VAL(DFSDM_FLTICR_CLRSCSDF)
  208. #define DFSDM_FLTRDATAR_DATA_OFFSET POSITION_VAL(DFSDM_FLTRDATAR_RDATA)
  209. #define DFSDM_FLTJDATAR_DATA_OFFSET POSITION_VAL(DFSDM_FLTJDATAR_JDATA)
  210. #define DFSDM_FLTAWHTR_THRESHOLD_OFFSET POSITION_VAL(DFSDM_FLTAWHTR_AWHT)
  211. #define DFSDM_FLTAWLTR_THRESHOLD_OFFSET POSITION_VAL(DFSDM_FLTAWLTR_AWLT)
  212. #define DFSDM_FLTEXMAX_DATA_OFFSET POSITION_VAL(DFSDM_FLTEXMAX_EXMAX)
  213. #define DFSDM_FLTEXMIN_DATA_OFFSET POSITION_VAL(DFSDM_FLTEXMIN_EXMIN)
  214. #define DFSDM_FLTCNVTIMR_DATA_OFFSET POSITION_VAL(DFSDM_FLTCNVTIMR_CNVCNT)
  215. #define DFSDM_FLTAWSR_HIGH_OFFSET POSITION_VAL(DFSDM_FLTAWSR_AWHTF)
  216. #define DFSDM_MSB_MASK 0xFFFF0000U
  217. #define DFSDM_LSB_MASK 0x0000FFFFU
  218. #define DFSDM_CKAB_TIMEOUT 5000U
  219. #define DFSDM1_CHANNEL_NUMBER 8U
  220. /**
  221. * @}
  222. */
  223. /* Private macro -------------------------------------------------------------*/
  224. /* Private variables ---------------------------------------------------------*/
  225. /** @defgroup DFSDM_Private_Variables DFSDM Private Variables
  226. * @{
  227. */
  228. __IO uint32_t v_dfsdm1ChannelCounter = 0;
  229. DFSDM_Channel_HandleTypeDef* a_dfsdm1ChannelHandle[DFSDM1_CHANNEL_NUMBER] = {NULL};
  230. /**
  231. * @}
  232. */
  233. /* Private function prototypes -----------------------------------------------*/
  234. /** @defgroup DFSDM_Private_Functions DFSDM Private Functions
  235. * @{
  236. */
  237. static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels);
  238. static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance);
  239. static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
  240. static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
  241. static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
  242. static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
  243. static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma);
  244. static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma);
  245. static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma);
  246. static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma);
  247. static void DFSDM_DMAError(DMA_HandleTypeDef *hdma);
  248. /**
  249. * @}
  250. */
  251. /* Exported functions --------------------------------------------------------*/
  252. /** @defgroup DFSDM_Exported_Functions DFSDM Exported Functions
  253. * @{
  254. */
  255. /** @defgroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions
  256. * @brief Channel initialization and de-initialization functions
  257. *
  258. @verbatim
  259. ==============================================================================
  260. ##### Channel initialization and de-initialization functions #####
  261. ==============================================================================
  262. [..] This section provides functions allowing to:
  263. (+) Initialize the DFSDM channel.
  264. (+) De-initialize the DFSDM channel.
  265. @endverbatim
  266. * @{
  267. */
  268. /**
  269. * @brief Initialize the DFSDM channel according to the specified parameters
  270. * in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle.
  271. * @param hdfsdm_channel : DFSDM channel handle.
  272. * @retval HAL status.
  273. */
  274. HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  275. {
  276. /* Check DFSDM Channel handle */
  277. if(hdfsdm_channel == NULL)
  278. {
  279. return HAL_ERROR;
  280. }
  281. /* Check parameters */
  282. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  283. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_channel->Init.OutputClock.Activation));
  284. assert_param(IS_DFSDM_CHANNEL_INPUT(hdfsdm_channel->Init.Input.Multiplexer));
  285. assert_param(IS_DFSDM_CHANNEL_DATA_PACKING(hdfsdm_channel->Init.Input.DataPacking));
  286. assert_param(IS_DFSDM_CHANNEL_INPUT_PINS(hdfsdm_channel->Init.Input.Pins));
  287. assert_param(IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(hdfsdm_channel->Init.SerialInterface.Type));
  288. assert_param(IS_DFSDM_CHANNEL_SPI_CLOCK(hdfsdm_channel->Init.SerialInterface.SpiClock));
  289. assert_param(IS_DFSDM_CHANNEL_FILTER_ORDER(hdfsdm_channel->Init.Awd.FilterOrder));
  290. assert_param(IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(hdfsdm_channel->Init.Awd.Oversampling));
  291. assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset));
  292. assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift));
  293. /* Check that channel has not been already initialized */
  294. if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)
  295. {
  296. return HAL_ERROR;
  297. }
  298. /* Call MSP init function */
  299. HAL_DFSDM_ChannelMspInit(hdfsdm_channel);
  300. /* Update the channel counter */
  301. v_dfsdm1ChannelCounter++;
  302. /* Configure output serial clock and enable global DFSDM interface only for first channel */
  303. if(v_dfsdm1ChannelCounter == 1)
  304. {
  305. assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));
  306. /* Set the output serial clock source */
  307. DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);
  308. DFSDM1_Channel0->CHCFGR1 |= hdfsdm_channel->Init.OutputClock.Selection;
  309. /* Reset clock divider */
  310. DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);
  311. if(hdfsdm_channel->Init.OutputClock.Activation == ENABLE)
  312. {
  313. assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
  314. /* Set the output clock divider */
  315. DFSDM1_Channel0->CHCFGR1 |= (uint32_t) ((hdfsdm_channel->Init.OutputClock.Divider - 1) <<
  316. DFSDM_CHCFGR1_CLK_DIV_OFFSET);
  317. }
  318. /* enable the DFSDM global interface */
  319. DFSDM1_Channel0->CHCFGR1 |= DFSDM_CHCFGR1_DFSDMEN;
  320. }
  321. /* Set channel input parameters */
  322. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK | DFSDM_CHCFGR1_DATMPX |
  323. DFSDM_CHCFGR1_CHINSEL);
  324. hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer |
  325. hdfsdm_channel->Init.Input.DataPacking |
  326. hdfsdm_channel->Init.Input.Pins);
  327. /* Set serial interface parameters */
  328. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP | DFSDM_CHCFGR1_SPICKSEL);
  329. hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.SerialInterface.Type |
  330. hdfsdm_channel->Init.SerialInterface.SpiClock);
  331. /* Set analog watchdog parameters */
  332. hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD | DFSDM_CHAWSCDR_AWFOSR);
  333. hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder |
  334. ((hdfsdm_channel->Init.Awd.Oversampling - 1) << DFSDM_CHAWSCDR_FOSR_OFFSET));
  335. /* Set channel offset and right bit shift */
  336. hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET | DFSDM_CHCFGR2_DTRBS);
  337. hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_OFFSET) |
  338. (hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_OFFSET));
  339. /* Enable DFSDM channel */
  340. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CHEN;
  341. /* Set DFSDM Channel to ready state */
  342. hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;
  343. /* Store channel handle in DFSDM channel handle table */
  344. a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
  345. return HAL_OK;
  346. }
  347. /**
  348. * @brief De-initialize the DFSDM channel.
  349. * @param hdfsdm_channel : DFSDM channel handle.
  350. * @retval HAL status.
  351. */
  352. HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  353. {
  354. /* Check DFSDM Channel handle */
  355. if(hdfsdm_channel == NULL)
  356. {
  357. return HAL_ERROR;
  358. }
  359. /* Check parameters */
  360. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  361. /* Check that channel has not been already deinitialized */
  362. if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL)
  363. {
  364. return HAL_ERROR;
  365. }
  366. /* Disable the DFSDM channel */
  367. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN);
  368. /* Update the channel counter */
  369. v_dfsdm1ChannelCounter--;
  370. /* Disable global DFSDM at deinit of last channel */
  371. if(v_dfsdm1ChannelCounter == 0)
  372. {
  373. DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN);
  374. }
  375. /* Call MSP deinit function */
  376. HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel);
  377. /* Set DFSDM Channel in reset state */
  378. hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET;
  379. /* Reset channel handle in DFSDM channel handle table */
  380. a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = (DFSDM_Channel_HandleTypeDef *) NULL;
  381. return HAL_OK;
  382. }
  383. /**
  384. * @brief Initialize the DFSDM channel MSP.
  385. * @param hdfsdm_channel : DFSDM channel handle.
  386. * @retval None
  387. */
  388. __weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  389. {
  390. /* Prevent unused argument(s) compilation warning */
  391. UNUSED(hdfsdm_channel);
  392. /* NOTE : This function should not be modified, when the function is needed,
  393. the HAL_DFSDM_ChannelMspInit could be implemented in the user file.
  394. */
  395. }
  396. /**
  397. * @brief De-initialize the DFSDM channel MSP.
  398. * @param hdfsdm_channel : DFSDM channel handle.
  399. * @retval None
  400. */
  401. __weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  402. {
  403. /* Prevent unused argument(s) compilation warning */
  404. UNUSED(hdfsdm_channel);
  405. /* NOTE : This function should not be modified, when the function is needed,
  406. the HAL_DFSDM_ChannelMspDeInit could be implemented in the user file.
  407. */
  408. }
  409. /**
  410. * @}
  411. */
  412. /** @defgroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions
  413. * @brief Channel operation functions
  414. *
  415. @verbatim
  416. ==============================================================================
  417. ##### Channel operation functions #####
  418. ==============================================================================
  419. [..] This section provides functions allowing to:
  420. (+) Manage clock absence detector feature.
  421. (+) Manage short circuit detector feature.
  422. (+) Get analog watchdog value.
  423. (+) Modify offset value.
  424. @endverbatim
  425. * @{
  426. */
  427. /**
  428. * @brief This function allows to start clock absence detection in polling mode.
  429. * @note Same mode has to be used for all channels.
  430. * @note If clock is not available on this channel during 5 seconds,
  431. * clock absence detection will not be activated and function
  432. * will return HAL_TIMEOUT error.
  433. * @param hdfsdm_channel : DFSDM channel handle.
  434. * @retval HAL status
  435. */
  436. HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  437. {
  438. HAL_StatusTypeDef status = HAL_OK;
  439. uint32_t channel;
  440. uint32_t tickstart;
  441. /* Check parameters */
  442. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  443. /* Check DFSDM channel state */
  444. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  445. {
  446. /* Return error status */
  447. status = HAL_ERROR;
  448. }
  449. else
  450. {
  451. /* Get channel number from channel instance */
  452. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  453. /* Get timeout */
  454. tickstart = HAL_GetTick();
  455. /* Clear clock absence flag */
  456. while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1) != 0)
  457. {
  458. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
  459. /* Check the Timeout */
  460. if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
  461. {
  462. /* Set timeout status */
  463. status = HAL_TIMEOUT;
  464. break;
  465. }
  466. }
  467. if(status == HAL_OK)
  468. {
  469. /* Start clock absence detection */
  470. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
  471. }
  472. }
  473. /* Return function status */
  474. return status;
  475. }
  476. /**
  477. * @brief This function allows to poll for the clock absence detection.
  478. * @param hdfsdm_channel : DFSDM channel handle.
  479. * @param Timeout : Timeout value in milliseconds.
  480. * @retval HAL status
  481. */
  482. HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  483. uint32_t Timeout)
  484. {
  485. uint32_t tickstart;
  486. uint32_t channel;
  487. /* Check parameters */
  488. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  489. /* Check DFSDM channel state */
  490. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  491. {
  492. /* Return error status */
  493. return HAL_ERROR;
  494. }
  495. else
  496. {
  497. /* Get channel number from channel instance */
  498. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  499. /* Get timeout */
  500. tickstart = HAL_GetTick();
  501. /* Wait clock absence detection */
  502. while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1) == 0)
  503. {
  504. /* Check the Timeout */
  505. if(Timeout != HAL_MAX_DELAY)
  506. {
  507. if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
  508. {
  509. /* Return timeout status */
  510. return HAL_TIMEOUT;
  511. }
  512. }
  513. }
  514. /* Clear clock absence detection flag */
  515. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
  516. /* Return function status */
  517. return HAL_OK;
  518. }
  519. }
  520. /**
  521. * @brief This function allows to stop clock absence detection in polling mode.
  522. * @param hdfsdm_channel : DFSDM channel handle.
  523. * @retval HAL status
  524. */
  525. HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  526. {
  527. HAL_StatusTypeDef status = HAL_OK;
  528. uint32_t channel;
  529. /* Check parameters */
  530. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  531. /* Check DFSDM channel state */
  532. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  533. {
  534. /* Return error status */
  535. status = HAL_ERROR;
  536. }
  537. else
  538. {
  539. /* Stop clock absence detection */
  540. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
  541. /* Clear clock absence flag */
  542. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  543. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
  544. }
  545. /* Return function status */
  546. return status;
  547. }
  548. /**
  549. * @brief This function allows to start clock absence detection in interrupt mode.
  550. * @note Same mode has to be used for all channels.
  551. * @note If clock is not available on this channel during 5 seconds,
  552. * clock absence detection will not be activated and function
  553. * will return HAL_TIMEOUT error.
  554. * @param hdfsdm_channel : DFSDM channel handle.
  555. * @retval HAL status
  556. */
  557. HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  558. {
  559. HAL_StatusTypeDef status = HAL_OK;
  560. uint32_t channel;
  561. uint32_t tickstart;
  562. /* Check parameters */
  563. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  564. /* Check DFSDM channel state */
  565. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  566. {
  567. /* Return error status */
  568. status = HAL_ERROR;
  569. }
  570. else
  571. {
  572. /* Get channel number from channel instance */
  573. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  574. /* Get timeout */
  575. tickstart = HAL_GetTick();
  576. /* Clear clock absence flag */
  577. while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1) != 0)
  578. {
  579. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
  580. /* Check the Timeout */
  581. if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
  582. {
  583. /* Set timeout status */
  584. status = HAL_TIMEOUT;
  585. break;
  586. }
  587. }
  588. if(status == HAL_OK)
  589. {
  590. /* Activate clock absence detection interrupt */
  591. DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_CKABIE;
  592. /* Start clock absence detection */
  593. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
  594. }
  595. }
  596. /* Return function status */
  597. return status;
  598. }
  599. /**
  600. * @brief Clock absence detection callback.
  601. * @param hdfsdm_channel : DFSDM channel handle.
  602. * @retval None
  603. */
  604. __weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  605. {
  606. /* Prevent unused argument(s) compilation warning */
  607. UNUSED(hdfsdm_channel);
  608. /* NOTE : This function should not be modified, when the callback is needed,
  609. the HAL_DFSDM_ChannelCkabCallback could be implemented in the user file
  610. */
  611. }
  612. /**
  613. * @brief This function allows to stop clock absence detection in interrupt mode.
  614. * @note Interrupt will be disabled for all channels
  615. * @param hdfsdm_channel : DFSDM channel handle.
  616. * @retval HAL status
  617. */
  618. HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  619. {
  620. HAL_StatusTypeDef status = HAL_OK;
  621. uint32_t channel;
  622. /* Check parameters */
  623. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  624. /* Check DFSDM channel state */
  625. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  626. {
  627. /* Return error status */
  628. status = HAL_ERROR;
  629. }
  630. else
  631. {
  632. /* Stop clock absence detection */
  633. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
  634. /* Clear clock absence flag */
  635. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  636. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
  637. /* Disable clock absence detection interrupt */
  638. DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE);
  639. }
  640. /* Return function status */
  641. return status;
  642. }
  643. /**
  644. * @brief This function allows to start short circuit detection in polling mode.
  645. * @note Same mode has to be used for all channels
  646. * @param hdfsdm_channel : DFSDM channel handle.
  647. * @param Threshold : Short circuit detector threshold.
  648. * This parameter must be a number between Min_Data = 0 and Max_Data = 255.
  649. * @param BreakSignal : Break signals assigned to short circuit event.
  650. * This parameter can be a values combination of @ref DFSDM_BreakSignals.
  651. * @retval HAL status
  652. */
  653. HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  654. uint32_t Threshold,
  655. uint32_t BreakSignal)
  656. {
  657. HAL_StatusTypeDef status = HAL_OK;
  658. /* Check parameters */
  659. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  660. assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
  661. assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
  662. /* Check DFSDM channel state */
  663. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  664. {
  665. /* Return error status */
  666. status = HAL_ERROR;
  667. }
  668. else
  669. {
  670. /* Configure threshold and break signals */
  671. hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
  672. hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_OFFSET) | \
  673. Threshold);
  674. /* Start short circuit detection */
  675. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
  676. }
  677. /* Return function status */
  678. return status;
  679. }
  680. /**
  681. * @brief This function allows to poll for the short circuit detection.
  682. * @param hdfsdm_channel : DFSDM channel handle.
  683. * @param Timeout : Timeout value in milliseconds.
  684. * @retval HAL status
  685. */
  686. HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  687. uint32_t Timeout)
  688. {
  689. uint32_t tickstart;
  690. uint32_t channel;
  691. /* Check parameters */
  692. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  693. /* Check DFSDM channel state */
  694. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  695. {
  696. /* Return error status */
  697. return HAL_ERROR;
  698. }
  699. else
  700. {
  701. /* Get channel number from channel instance */
  702. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  703. /* Get timeout */
  704. tickstart = HAL_GetTick();
  705. /* Wait short circuit detection */
  706. while(((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_OFFSET + channel)) == 0)
  707. {
  708. /* Check the Timeout */
  709. if(Timeout != HAL_MAX_DELAY)
  710. {
  711. if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
  712. {
  713. /* Return timeout status */
  714. return HAL_TIMEOUT;
  715. }
  716. }
  717. }
  718. /* Clear short circuit detection flag */
  719. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
  720. /* Return function status */
  721. return HAL_OK;
  722. }
  723. }
  724. /**
  725. * @brief This function allows to stop short circuit detection in polling mode.
  726. * @param hdfsdm_channel : DFSDM channel handle.
  727. * @retval HAL status
  728. */
  729. HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  730. {
  731. HAL_StatusTypeDef status = HAL_OK;
  732. uint32_t channel;
  733. /* Check parameters */
  734. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  735. /* Check DFSDM channel state */
  736. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  737. {
  738. /* Return error status */
  739. status = HAL_ERROR;
  740. }
  741. else
  742. {
  743. /* Stop short circuit detection */
  744. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
  745. /* Clear short circuit detection flag */
  746. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  747. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
  748. }
  749. /* Return function status */
  750. return status;
  751. }
  752. /**
  753. * @brief This function allows to start short circuit detection in interrupt mode.
  754. * @note Same mode has to be used for all channels
  755. * @param hdfsdm_channel : DFSDM channel handle.
  756. * @param Threshold : Short circuit detector threshold.
  757. * This parameter must be a number between Min_Data = 0 and Max_Data = 255.
  758. * @param BreakSignal : Break signals assigned to short circuit event.
  759. * This parameter can be a values combination of @ref DFSDM_BreakSignals.
  760. * @retval HAL status
  761. */
  762. HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  763. uint32_t Threshold,
  764. uint32_t BreakSignal)
  765. {
  766. HAL_StatusTypeDef status = HAL_OK;
  767. /* Check parameters */
  768. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  769. assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
  770. assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
  771. /* Check DFSDM channel state */
  772. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  773. {
  774. /* Return error status */
  775. status = HAL_ERROR;
  776. }
  777. else
  778. {
  779. /* Activate short circuit detection interrupt */
  780. DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_SCDIE;
  781. /* Configure threshold and break signals */
  782. hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
  783. hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_OFFSET) | \
  784. Threshold);
  785. /* Start short circuit detection */
  786. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
  787. }
  788. /* Return function status */
  789. return status;
  790. }
  791. /**
  792. * @brief Short circuit detection callback.
  793. * @param hdfsdm_channel : DFSDM channel handle.
  794. * @retval None
  795. */
  796. __weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  797. {
  798. /* Prevent unused argument(s) compilation warning */
  799. UNUSED(hdfsdm_channel);
  800. /* NOTE : This function should not be modified, when the callback is needed,
  801. the HAL_DFSDM_ChannelScdCallback could be implemented in the user file
  802. */
  803. }
  804. /**
  805. * @brief This function allows to stop short circuit detection in interrupt mode.
  806. * @note Interrupt will be disabled for all channels
  807. * @param hdfsdm_channel : DFSDM channel handle.
  808. * @retval HAL status
  809. */
  810. HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  811. {
  812. HAL_StatusTypeDef status = HAL_OK;
  813. uint32_t channel;
  814. /* Check parameters */
  815. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  816. /* Check DFSDM channel state */
  817. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  818. {
  819. /* Return error status */
  820. status = HAL_ERROR;
  821. }
  822. else
  823. {
  824. /* Stop short circuit detection */
  825. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
  826. /* Clear short circuit detection flag */
  827. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  828. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
  829. /* Disable short circuit detection interrupt */
  830. DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE);
  831. }
  832. /* Return function status */
  833. return status;
  834. }
  835. /**
  836. * @brief This function allows to get channel analog watchdog value.
  837. * @param hdfsdm_channel : DFSDM channel handle.
  838. * @retval Channel analog watchdog value.
  839. */
  840. int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  841. {
  842. return (int16_t) hdfsdm_channel->Instance->CHWDATAR;
  843. }
  844. /**
  845. * @brief This function allows to modify channel offset value.
  846. * @param hdfsdm_channel : DFSDM channel handle.
  847. * @param Offset : DFSDM channel offset.
  848. * This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
  849. * @retval HAL status.
  850. */
  851. HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  852. int32_t Offset)
  853. {
  854. HAL_StatusTypeDef status = HAL_OK;
  855. /* Check parameters */
  856. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  857. assert_param(IS_DFSDM_CHANNEL_OFFSET(Offset));
  858. /* Check DFSDM channel state */
  859. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  860. {
  861. /* Return error status */
  862. status = HAL_ERROR;
  863. }
  864. else
  865. {
  866. /* Modify channel offset */
  867. hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET);
  868. hdfsdm_channel->Instance->CHCFGR2 |= ((uint32_t) Offset << DFSDM_CHCFGR2_OFFSET_OFFSET);
  869. }
  870. /* Return function status */
  871. return status;
  872. }
  873. /**
  874. * @}
  875. */
  876. /** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function
  877. * @brief Channel state function
  878. *
  879. @verbatim
  880. ==============================================================================
  881. ##### Channel state function #####
  882. ==============================================================================
  883. [..] This section provides function allowing to:
  884. (+) Get channel handle state.
  885. @endverbatim
  886. * @{
  887. */
  888. /**
  889. * @brief This function allows to get the current DFSDM channel handle state.
  890. * @param hdfsdm_channel : DFSDM channel handle.
  891. * @retval DFSDM channel state.
  892. */
  893. HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  894. {
  895. /* Return DFSDM channel handle state */
  896. return hdfsdm_channel->State;
  897. }
  898. /**
  899. * @}
  900. */
  901. /** @defgroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions
  902. * @brief Filter initialization and de-initialization functions
  903. *
  904. @verbatim
  905. ==============================================================================
  906. ##### Filter initialization and de-initialization functions #####
  907. ==============================================================================
  908. [..] This section provides functions allowing to:
  909. (+) Initialize the DFSDM filter.
  910. (+) De-initialize the DFSDM filter.
  911. @endverbatim
  912. * @{
  913. */
  914. /**
  915. * @brief Initialize the DFSDM filter according to the specified parameters
  916. * in the DFSDM_FilterInitTypeDef structure and initialize the associated handle.
  917. * @param hdfsdm_filter : DFSDM filter handle.
  918. * @retval HAL status.
  919. */
  920. HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  921. {
  922. /* Check DFSDM Channel handle */
  923. if(hdfsdm_filter == NULL)
  924. {
  925. return HAL_ERROR;
  926. }
  927. /* Check parameters */
  928. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  929. assert_param(IS_DFSDM_FILTER_REG_TRIGGER(hdfsdm_filter->Init.RegularParam.Trigger));
  930. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.FastMode));
  931. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.DmaMode));
  932. assert_param(IS_DFSDM_FILTER_INJ_TRIGGER(hdfsdm_filter->Init.InjectedParam.Trigger));
  933. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.ScanMode));
  934. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.DmaMode));
  935. assert_param(IS_DFSDM_FILTER_SINC_ORDER(hdfsdm_filter->Init.FilterParam.SincOrder));
  936. assert_param(IS_DFSDM_FILTER_OVS_RATIO(hdfsdm_filter->Init.FilterParam.Oversampling));
  937. assert_param(IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(hdfsdm_filter->Init.FilterParam.IntOversampling));
  938. /* Check parameters compatibility */
  939. if((hdfsdm_filter->Instance == DFSDM1_Filter0) &&
  940. ((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) ||
  941. (hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
  942. {
  943. return HAL_ERROR;
  944. }
  945. /* Initialize DFSDM filter variables with default values */
  946. hdfsdm_filter->RegularContMode = DFSDM_CONTINUOUS_CONV_OFF;
  947. hdfsdm_filter->InjectedChannelsNbr = 1;
  948. hdfsdm_filter->InjConvRemaining = 1;
  949. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_NONE;
  950. /* Call MSP init function */
  951. HAL_DFSDM_FilterMspInit(hdfsdm_filter);
  952. /* Set regular parameters */
  953. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
  954. if(hdfsdm_filter->Init.RegularParam.FastMode == ENABLE)
  955. {
  956. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_FAST;
  957. }
  958. else
  959. {
  960. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_FAST);
  961. }
  962. if(hdfsdm_filter->Init.RegularParam.DmaMode == ENABLE)
  963. {
  964. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RDMAEN;
  965. }
  966. else
  967. {
  968. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RDMAEN);
  969. }
  970. /* Set injected parameters */
  971. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC | DFSDM_FLTCR1_JEXTEN | DFSDM_FLTCR1_JEXTSEL);
  972. if(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_EXT_TRIGGER)
  973. {
  974. assert_param(IS_DFSDM_FILTER_EXT_TRIG(hdfsdm_filter->Init.InjectedParam.ExtTrigger));
  975. assert_param(IS_DFSDM_FILTER_EXT_TRIG_EDGE(hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge));
  976. hdfsdm_filter->Instance->FLTCR1 |= (hdfsdm_filter->Init.InjectedParam.ExtTrigger);
  977. }
  978. if(hdfsdm_filter->Init.InjectedParam.ScanMode == ENABLE)
  979. {
  980. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSCAN;
  981. }
  982. else
  983. {
  984. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSCAN);
  985. }
  986. if(hdfsdm_filter->Init.InjectedParam.DmaMode == ENABLE)
  987. {
  988. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JDMAEN;
  989. }
  990. else
  991. {
  992. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JDMAEN);
  993. }
  994. /* Set filter parameters */
  995. hdfsdm_filter->Instance->FLTFCR &= ~(DFSDM_FLTFCR_FORD | DFSDM_FLTFCR_FOSR | DFSDM_FLTFCR_IOSR);
  996. hdfsdm_filter->Instance->FLTFCR |= (hdfsdm_filter->Init.FilterParam.SincOrder |
  997. ((hdfsdm_filter->Init.FilterParam.Oversampling - 1) << DFSDM_FLTFCR_FOSR_OFFSET) |
  998. (hdfsdm_filter->Init.FilterParam.IntOversampling - 1));
  999. /* Store regular and injected triggers and injected scan mode*/
  1000. hdfsdm_filter->RegularTrigger = hdfsdm_filter->Init.RegularParam.Trigger;
  1001. hdfsdm_filter->InjectedTrigger = hdfsdm_filter->Init.InjectedParam.Trigger;
  1002. hdfsdm_filter->ExtTriggerEdge = hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge;
  1003. hdfsdm_filter->InjectedScanMode = hdfsdm_filter->Init.InjectedParam.ScanMode;
  1004. /* Enable DFSDM filter */
  1005. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  1006. /* Set DFSDM filter to ready state */
  1007. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_READY;
  1008. return HAL_OK;
  1009. }
  1010. /**
  1011. * @brief De-initializes the DFSDM filter.
  1012. * @param hdfsdm_filter : DFSDM filter handle.
  1013. * @retval HAL status.
  1014. */
  1015. HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1016. {
  1017. /* Check DFSDM filter handle */
  1018. if(hdfsdm_filter == NULL)
  1019. {
  1020. return HAL_ERROR;
  1021. }
  1022. /* Check parameters */
  1023. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1024. /* Disable the DFSDM filter */
  1025. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  1026. /* Call MSP deinit function */
  1027. HAL_DFSDM_FilterMspDeInit(hdfsdm_filter);
  1028. /* Set DFSDM filter in reset state */
  1029. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_RESET;
  1030. return HAL_OK;
  1031. }
  1032. /**
  1033. * @brief Initializes the DFSDM filter MSP.
  1034. * @param hdfsdm_filter : DFSDM filter handle.
  1035. * @retval None
  1036. */
  1037. __weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1038. {
  1039. /* Prevent unused argument(s) compilation warning */
  1040. UNUSED(hdfsdm_filter);
  1041. /* NOTE : This function should not be modified, when the function is needed,
  1042. the HAL_DFSDM_FilterMspInit could be implemented in the user file.
  1043. */
  1044. }
  1045. /**
  1046. * @brief De-initializes the DFSDM filter MSP.
  1047. * @param hdfsdm_filter : DFSDM filter handle.
  1048. * @retval None
  1049. */
  1050. __weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1051. {
  1052. /* Prevent unused argument(s) compilation warning */
  1053. UNUSED(hdfsdm_filter);
  1054. /* NOTE : This function should not be modified, when the function is needed,
  1055. the HAL_DFSDM_FilterMspDeInit could be implemented in the user file.
  1056. */
  1057. }
  1058. /**
  1059. * @}
  1060. */
  1061. /** @defgroup DFSDM_Exported_Functions_Group2_Filter Filter control functions
  1062. * @brief Filter control functions
  1063. *
  1064. @verbatim
  1065. ==============================================================================
  1066. ##### Filter control functions #####
  1067. ==============================================================================
  1068. [..] This section provides functions allowing to:
  1069. (+) Select channel and enable/disable continuous mode for regular conversion.
  1070. (+) Select channels for injected conversion.
  1071. @endverbatim
  1072. * @{
  1073. */
  1074. /**
  1075. * @brief This function allows to select channel and to enable/disable
  1076. * continuous mode for regular conversion.
  1077. * @param hdfsdm_filter : DFSDM filter handle.
  1078. * @param Channel : Channel for regular conversion.
  1079. * This parameter can be a value of @ref DFSDM_Channel_Selection.
  1080. * @param ContinuousMode : Enable/disable continuous mode for regular conversion.
  1081. * This parameter can be a value of @ref DFSDM_ContinuousMode.
  1082. * @retval HAL status
  1083. */
  1084. HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1085. uint32_t Channel,
  1086. uint32_t ContinuousMode)
  1087. {
  1088. HAL_StatusTypeDef status = HAL_OK;
  1089. /* Check parameters */
  1090. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1091. assert_param(IS_DFSDM_REGULAR_CHANNEL(Channel));
  1092. assert_param(IS_DFSDM_CONTINUOUS_MODE(ContinuousMode));
  1093. /* Check DFSDM filter state */
  1094. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
  1095. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
  1096. {
  1097. /* Configure channel and continuous mode for regular conversion */
  1098. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RCH | DFSDM_FLTCR1_RCONT);
  1099. if(ContinuousMode == DFSDM_CONTINUOUS_CONV_ON)
  1100. {
  1101. hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) (((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET) |
  1102. DFSDM_FLTCR1_RCONT);
  1103. }
  1104. else
  1105. {
  1106. hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) ((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET);
  1107. }
  1108. /* Store continuous mode information */
  1109. hdfsdm_filter->RegularContMode = ContinuousMode;
  1110. }
  1111. else
  1112. {
  1113. status = HAL_ERROR;
  1114. }
  1115. /* Return function status */
  1116. return status;
  1117. }
  1118. /**
  1119. * @brief This function allows to select channels for injected conversion.
  1120. * @param hdfsdm_filter : DFSDM filter handle.
  1121. * @param Channel : Channels for injected conversion.
  1122. * This parameter can be a values combination of @ref DFSDM_Channel_Selection.
  1123. * @retval HAL status
  1124. */
  1125. HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1126. uint32_t Channel)
  1127. {
  1128. HAL_StatusTypeDef status = HAL_OK;
  1129. /* Check parameters */
  1130. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1131. assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
  1132. /* Check DFSDM filter state */
  1133. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
  1134. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
  1135. {
  1136. /* Configure channel for injected conversion */
  1137. hdfsdm_filter->Instance->FLTJCHGR = (uint32_t) (Channel & DFSDM_LSB_MASK);
  1138. /* Store number of injected channels */
  1139. hdfsdm_filter->InjectedChannelsNbr = DFSDM_GetInjChannelsNbr(Channel);
  1140. /* Update number of injected channels remaining */
  1141. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  1142. hdfsdm_filter->InjectedChannelsNbr : 1;
  1143. }
  1144. else
  1145. {
  1146. status = HAL_ERROR;
  1147. }
  1148. /* Return function status */
  1149. return status;
  1150. }
  1151. /**
  1152. * @}
  1153. */
  1154. /** @defgroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions
  1155. * @brief Filter operation functions
  1156. *
  1157. @verbatim
  1158. ==============================================================================
  1159. ##### Filter operation functions #####
  1160. ==============================================================================
  1161. [..] This section provides functions allowing to:
  1162. (+) Start conversion of regular/injected channel.
  1163. (+) Poll for the end of regular/injected conversion.
  1164. (+) Stop conversion of regular/injected channel.
  1165. (+) Start conversion of regular/injected channel and enable interrupt.
  1166. (+) Call the callback functions at the end of regular/injected conversions.
  1167. (+) Stop conversion of regular/injected channel and disable interrupt.
  1168. (+) Start conversion of regular/injected channel and enable DMA transfer.
  1169. (+) Stop conversion of regular/injected channel and disable DMA transfer.
  1170. (+) Start analog watchdog and enable interrupt.
  1171. (+) Call the callback function when analog watchdog occurs.
  1172. (+) Stop analog watchdog and disable interrupt.
  1173. (+) Start extreme detector.
  1174. (+) Stop extreme detector.
  1175. (+) Get result of regular channel conversion.
  1176. (+) Get result of injected channel conversion.
  1177. (+) Get extreme detector maximum and minimum values.
  1178. (+) Get conversion time.
  1179. (+) Handle DFSDM interrupt request.
  1180. @endverbatim
  1181. * @{
  1182. */
  1183. /**
  1184. * @brief This function allows to start regular conversion in polling mode.
  1185. * @note This function should be called only when DFSDM filter instance is
  1186. * in idle state or if injected conversion is ongoing.
  1187. * @param hdfsdm_filter : DFSDM filter handle.
  1188. * @retval HAL status
  1189. */
  1190. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1191. {
  1192. HAL_StatusTypeDef status = HAL_OK;
  1193. /* Check parameters */
  1194. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1195. /* Check DFSDM filter state */
  1196. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1197. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
  1198. {
  1199. /* Start regular conversion */
  1200. DFSDM_RegConvStart(hdfsdm_filter);
  1201. }
  1202. else
  1203. {
  1204. status = HAL_ERROR;
  1205. }
  1206. /* Return function status */
  1207. return status;
  1208. }
  1209. /**
  1210. * @brief This function allows to poll for the end of regular conversion.
  1211. * @note This function should be called only if regular conversion is ongoing.
  1212. * @param hdfsdm_filter : DFSDM filter handle.
  1213. * @param Timeout : Timeout value in milliseconds.
  1214. * @retval HAL status
  1215. */
  1216. HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1217. uint32_t Timeout)
  1218. {
  1219. uint32_t tickstart;
  1220. /* Check parameters */
  1221. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1222. /* Check DFSDM filter state */
  1223. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
  1224. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1225. {
  1226. /* Return error status */
  1227. return HAL_ERROR;
  1228. }
  1229. else
  1230. {
  1231. /* Get timeout */
  1232. tickstart = HAL_GetTick();
  1233. /* Wait end of regular conversion */
  1234. while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != DFSDM_FLTISR_REOCF)
  1235. {
  1236. /* Check the Timeout */
  1237. if(Timeout != HAL_MAX_DELAY)
  1238. {
  1239. if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
  1240. {
  1241. /* Return timeout status */
  1242. return HAL_TIMEOUT;
  1243. }
  1244. }
  1245. }
  1246. /* Check if overrun occurs */
  1247. if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) == DFSDM_FLTISR_ROVRF)
  1248. {
  1249. /* Update error code and call error callback */
  1250. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
  1251. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  1252. /* Clear regular overrun flag */
  1253. hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
  1254. }
  1255. /* Update DFSDM filter state only if not continuous conversion and SW trigger */
  1256. if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  1257. (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
  1258. {
  1259. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
  1260. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
  1261. }
  1262. /* Return function status */
  1263. return HAL_OK;
  1264. }
  1265. }
  1266. /**
  1267. * @brief This function allows to stop regular conversion in polling mode.
  1268. * @note This function should be called only if regular conversion is ongoing.
  1269. * @param hdfsdm_filter : DFSDM filter handle.
  1270. * @retval HAL status
  1271. */
  1272. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1273. {
  1274. HAL_StatusTypeDef status = HAL_OK;
  1275. /* Check parameters */
  1276. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1277. /* Check DFSDM filter state */
  1278. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
  1279. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1280. {
  1281. /* Return error status */
  1282. status = HAL_ERROR;
  1283. }
  1284. else
  1285. {
  1286. /* Stop regular conversion */
  1287. DFSDM_RegConvStop(hdfsdm_filter);
  1288. }
  1289. /* Return function status */
  1290. return status;
  1291. }
  1292. /**
  1293. * @brief This function allows to start regular conversion in interrupt mode.
  1294. * @note This function should be called only when DFSDM filter instance is
  1295. * in idle state or if injected conversion is ongoing.
  1296. * @param hdfsdm_filter : DFSDM filter handle.
  1297. * @retval HAL status
  1298. */
  1299. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1300. {
  1301. HAL_StatusTypeDef status = HAL_OK;
  1302. /* Check parameters */
  1303. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1304. /* Check DFSDM filter state */
  1305. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1306. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
  1307. {
  1308. /* Enable interrupts for regular conversions */
  1309. hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
  1310. /* Start regular conversion */
  1311. DFSDM_RegConvStart(hdfsdm_filter);
  1312. }
  1313. else
  1314. {
  1315. status = HAL_ERROR;
  1316. }
  1317. /* Return function status */
  1318. return status;
  1319. }
  1320. /**
  1321. * @brief This function allows to stop regular conversion in interrupt mode.
  1322. * @note This function should be called only if regular conversion is ongoing.
  1323. * @param hdfsdm_filter : DFSDM filter handle.
  1324. * @retval HAL status
  1325. */
  1326. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1327. {
  1328. HAL_StatusTypeDef status = HAL_OK;
  1329. /* Check parameters */
  1330. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1331. /* Check DFSDM filter state */
  1332. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
  1333. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1334. {
  1335. /* Return error status */
  1336. status = HAL_ERROR;
  1337. }
  1338. else
  1339. {
  1340. /* Disable interrupts for regular conversions */
  1341. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
  1342. /* Stop regular conversion */
  1343. DFSDM_RegConvStop(hdfsdm_filter);
  1344. }
  1345. /* Return function status */
  1346. return status;
  1347. }
  1348. /**
  1349. * @brief This function allows to start regular conversion in DMA mode.
  1350. * @note This function should be called only when DFSDM filter instance is
  1351. * in idle state or if injected conversion is ongoing.
  1352. * Please note that data on buffer will contain signed regular conversion
  1353. * value on 24 most significant bits and corresponding channel on 3 least
  1354. * significant bits.
  1355. * @param hdfsdm_filter : DFSDM filter handle.
  1356. * @param pData : The destination buffer address.
  1357. * @param Length : The length of data to be transferred from DFSDM filter to memory.
  1358. * @retval HAL status
  1359. */
  1360. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1361. int32_t *pData,
  1362. uint32_t Length)
  1363. {
  1364. HAL_StatusTypeDef status = HAL_OK;
  1365. /* Check parameters */
  1366. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1367. /* Check destination address and length */
  1368. if((pData == NULL) || (Length == 0))
  1369. {
  1370. status = HAL_ERROR;
  1371. }
  1372. /* Check that DMA is enabled for regular conversion */
  1373. else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
  1374. {
  1375. status = HAL_ERROR;
  1376. }
  1377. /* Check parameters compatibility */
  1378. else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1379. (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  1380. (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
  1381. (Length != 1))
  1382. {
  1383. status = HAL_ERROR;
  1384. }
  1385. else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1386. (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  1387. (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
  1388. {
  1389. status = HAL_ERROR;
  1390. }
  1391. /* Check DFSDM filter state */
  1392. else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1393. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
  1394. {
  1395. /* Set callbacks on DMA handler */
  1396. hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
  1397. hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
  1398. hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
  1399. DFSDM_DMARegularHalfConvCplt : NULL;
  1400. /* Start DMA in interrupt mode */
  1401. if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \
  1402. (uint32_t) pData, Length) != HAL_OK)
  1403. {
  1404. /* Set DFSDM filter in error state */
  1405. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1406. status = HAL_ERROR;
  1407. }
  1408. else
  1409. {
  1410. /* Start regular conversion */
  1411. DFSDM_RegConvStart(hdfsdm_filter);
  1412. }
  1413. }
  1414. else
  1415. {
  1416. status = HAL_ERROR;
  1417. }
  1418. /* Return function status */
  1419. return status;
  1420. }
  1421. /**
  1422. * @brief This function allows to start regular conversion in DMA mode and to get
  1423. * only the 16 most significant bits of conversion.
  1424. * @note This function should be called only when DFSDM filter instance is
  1425. * in idle state or if injected conversion is ongoing.
  1426. * Please note that data on buffer will contain signed 16 most significant
  1427. * bits of regular conversion.
  1428. * @param hdfsdm_filter : DFSDM filter handle.
  1429. * @param pData : The destination buffer address.
  1430. * @param Length : The length of data to be transferred from DFSDM filter to memory.
  1431. * @retval HAL status
  1432. */
  1433. HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1434. int16_t *pData,
  1435. uint32_t Length)
  1436. {
  1437. HAL_StatusTypeDef status = HAL_OK;
  1438. /* Check parameters */
  1439. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1440. /* Check destination address and length */
  1441. if((pData == NULL) || (Length == 0))
  1442. {
  1443. status = HAL_ERROR;
  1444. }
  1445. /* Check that DMA is enabled for regular conversion */
  1446. else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
  1447. {
  1448. status = HAL_ERROR;
  1449. }
  1450. /* Check parameters compatibility */
  1451. else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1452. (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  1453. (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
  1454. (Length != 1))
  1455. {
  1456. status = HAL_ERROR;
  1457. }
  1458. else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1459. (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  1460. (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
  1461. {
  1462. status = HAL_ERROR;
  1463. }
  1464. /* Check DFSDM filter state */
  1465. else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1466. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
  1467. {
  1468. /* Set callbacks on DMA handler */
  1469. hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
  1470. hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
  1471. hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
  1472. DFSDM_DMARegularHalfConvCplt : NULL;
  1473. /* Start DMA in interrupt mode */
  1474. if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)(&hdfsdm_filter->Instance->FLTRDATAR) + 2, \
  1475. (uint32_t) pData, Length) != HAL_OK)
  1476. {
  1477. /* Set DFSDM filter in error state */
  1478. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1479. status = HAL_ERROR;
  1480. }
  1481. else
  1482. {
  1483. /* Start regular conversion */
  1484. DFSDM_RegConvStart(hdfsdm_filter);
  1485. }
  1486. }
  1487. else
  1488. {
  1489. status = HAL_ERROR;
  1490. }
  1491. /* Return function status */
  1492. return status;
  1493. }
  1494. /**
  1495. * @brief This function allows to stop regular conversion in DMA mode.
  1496. * @note This function should be called only if regular conversion is ongoing.
  1497. * @param hdfsdm_filter : DFSDM filter handle.
  1498. * @retval HAL status
  1499. */
  1500. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1501. {
  1502. HAL_StatusTypeDef status = HAL_OK;
  1503. /* Check parameters */
  1504. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1505. /* Check DFSDM filter state */
  1506. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
  1507. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1508. {
  1509. /* Return error status */
  1510. status = HAL_ERROR;
  1511. }
  1512. else
  1513. {
  1514. /* Stop current DMA transfer */
  1515. if(HAL_DMA_Abort(hdfsdm_filter->hdmaReg) != HAL_OK)
  1516. {
  1517. /* Set DFSDM filter in error state */
  1518. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1519. status = HAL_ERROR;
  1520. }
  1521. else
  1522. {
  1523. /* Stop regular conversion */
  1524. DFSDM_RegConvStop(hdfsdm_filter);
  1525. }
  1526. }
  1527. /* Return function status */
  1528. return status;
  1529. }
  1530. /**
  1531. * @brief This function allows to get regular conversion value.
  1532. * @param hdfsdm_filter : DFSDM filter handle.
  1533. * @param Channel : Corresponding channel of regular conversion.
  1534. * @retval Regular conversion value
  1535. */
  1536. int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1537. uint32_t *Channel)
  1538. {
  1539. uint32_t reg = 0;
  1540. int32_t value = 0;
  1541. /* Check parameters */
  1542. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1543. assert_param(Channel != NULL);
  1544. /* Get value of data register for regular channel */
  1545. reg = hdfsdm_filter->Instance->FLTRDATAR;
  1546. /* Extract channel and regular conversion value */
  1547. *Channel = (reg & DFSDM_FLTRDATAR_RDATACH);
  1548. value = ((reg & DFSDM_FLTRDATAR_RDATA) >> DFSDM_FLTRDATAR_DATA_OFFSET);
  1549. /* return regular conversion value */
  1550. return value;
  1551. }
  1552. /**
  1553. * @brief This function allows to start injected conversion in polling mode.
  1554. * @note This function should be called only when DFSDM filter instance is
  1555. * in idle state or if regular conversion is ongoing.
  1556. * @param hdfsdm_filter : DFSDM filter handle.
  1557. * @retval HAL status
  1558. */
  1559. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1560. {
  1561. HAL_StatusTypeDef status = HAL_OK;
  1562. /* Check parameters */
  1563. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1564. /* Check DFSDM filter state */
  1565. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1566. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
  1567. {
  1568. /* Start injected conversion */
  1569. DFSDM_InjConvStart(hdfsdm_filter);
  1570. }
  1571. else
  1572. {
  1573. status = HAL_ERROR;
  1574. }
  1575. /* Return function status */
  1576. return status;
  1577. }
  1578. /**
  1579. * @brief This function allows to poll for the end of injected conversion.
  1580. * @note This function should be called only if injected conversion is ongoing.
  1581. * @param hdfsdm_filter : DFSDM filter handle.
  1582. * @param Timeout : Timeout value in milliseconds.
  1583. * @retval HAL status
  1584. */
  1585. HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1586. uint32_t Timeout)
  1587. {
  1588. uint32_t tickstart;
  1589. /* Check parameters */
  1590. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1591. /* Check DFSDM filter state */
  1592. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
  1593. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1594. {
  1595. /* Return error status */
  1596. return HAL_ERROR;
  1597. }
  1598. else
  1599. {
  1600. /* Get timeout */
  1601. tickstart = HAL_GetTick();
  1602. /* Wait end of injected conversions */
  1603. while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != DFSDM_FLTISR_JEOCF)
  1604. {
  1605. /* Check the Timeout */
  1606. if(Timeout != HAL_MAX_DELAY)
  1607. {
  1608. if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
  1609. {
  1610. /* Return timeout status */
  1611. return HAL_TIMEOUT;
  1612. }
  1613. }
  1614. }
  1615. /* Check if overrun occurs */
  1616. if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) == DFSDM_FLTISR_JOVRF)
  1617. {
  1618. /* Update error code and call error callback */
  1619. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
  1620. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  1621. /* Clear injected overrun flag */
  1622. hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
  1623. }
  1624. /* Update remaining injected conversions */
  1625. hdfsdm_filter->InjConvRemaining--;
  1626. if(hdfsdm_filter->InjConvRemaining == 0)
  1627. {
  1628. /* Update DFSDM filter state only if trigger is software */
  1629. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  1630. {
  1631. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
  1632. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
  1633. }
  1634. /* end of injected sequence, reset the value */
  1635. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  1636. hdfsdm_filter->InjectedChannelsNbr : 1;
  1637. }
  1638. /* Return function status */
  1639. return HAL_OK;
  1640. }
  1641. }
  1642. /**
  1643. * @brief This function allows to stop injected conversion in polling mode.
  1644. * @note This function should be called only if injected conversion is ongoing.
  1645. * @param hdfsdm_filter : DFSDM filter handle.
  1646. * @retval HAL status
  1647. */
  1648. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1649. {
  1650. HAL_StatusTypeDef status = HAL_OK;
  1651. /* Check parameters */
  1652. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1653. /* Check DFSDM filter state */
  1654. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
  1655. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1656. {
  1657. /* Return error status */
  1658. status = HAL_ERROR;
  1659. }
  1660. else
  1661. {
  1662. /* Stop injected conversion */
  1663. DFSDM_InjConvStop(hdfsdm_filter);
  1664. }
  1665. /* Return function status */
  1666. return status;
  1667. }
  1668. /**
  1669. * @brief This function allows to start injected conversion in interrupt mode.
  1670. * @note This function should be called only when DFSDM filter instance is
  1671. * in idle state or if regular conversion is ongoing.
  1672. * @param hdfsdm_filter : DFSDM filter handle.
  1673. * @retval HAL status
  1674. */
  1675. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1676. {
  1677. HAL_StatusTypeDef status = HAL_OK;
  1678. /* Check parameters */
  1679. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1680. /* Check DFSDM filter state */
  1681. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1682. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
  1683. {
  1684. /* Enable interrupts for injected conversions */
  1685. hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
  1686. /* Start injected conversion */
  1687. DFSDM_InjConvStart(hdfsdm_filter);
  1688. }
  1689. else
  1690. {
  1691. status = HAL_ERROR;
  1692. }
  1693. /* Return function status */
  1694. return status;
  1695. }
  1696. /**
  1697. * @brief This function allows to stop injected conversion in interrupt mode.
  1698. * @note This function should be called only if injected conversion is ongoing.
  1699. * @param hdfsdm_filter : DFSDM filter handle.
  1700. * @retval HAL status
  1701. */
  1702. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1703. {
  1704. HAL_StatusTypeDef status = HAL_OK;
  1705. /* Check parameters */
  1706. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1707. /* Check DFSDM filter state */
  1708. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
  1709. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1710. {
  1711. /* Return error status */
  1712. status = HAL_ERROR;
  1713. }
  1714. else
  1715. {
  1716. /* Disable interrupts for injected conversions */
  1717. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
  1718. /* Stop injected conversion */
  1719. DFSDM_InjConvStop(hdfsdm_filter);
  1720. }
  1721. /* Return function status */
  1722. return status;
  1723. }
  1724. /**
  1725. * @brief This function allows to start injected conversion in DMA mode.
  1726. * @note This function should be called only when DFSDM filter instance is
  1727. * in idle state or if regular conversion is ongoing.
  1728. * Please note that data on buffer will contain signed injected conversion
  1729. * value on 24 most significant bits and corresponding channel on 3 least
  1730. * significant bits.
  1731. * @param hdfsdm_filter : DFSDM filter handle.
  1732. * @param pData : The destination buffer address.
  1733. * @param Length : The length of data to be transferred from DFSDM filter to memory.
  1734. * @retval HAL status
  1735. */
  1736. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1737. int32_t *pData,
  1738. uint32_t Length)
  1739. {
  1740. HAL_StatusTypeDef status = HAL_OK;
  1741. /* Check parameters */
  1742. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1743. /* Check destination address and length */
  1744. if((pData == NULL) || (Length == 0))
  1745. {
  1746. status = HAL_ERROR;
  1747. }
  1748. /* Check that DMA is enabled for injected conversion */
  1749. else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
  1750. {
  1751. status = HAL_ERROR;
  1752. }
  1753. /* Check parameters compatibility */
  1754. else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1755. (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
  1756. (Length > hdfsdm_filter->InjConvRemaining))
  1757. {
  1758. status = HAL_ERROR;
  1759. }
  1760. else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1761. (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
  1762. {
  1763. status = HAL_ERROR;
  1764. }
  1765. /* Check DFSDM filter state */
  1766. else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1767. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
  1768. {
  1769. /* Set callbacks on DMA handler */
  1770. hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
  1771. hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
  1772. hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
  1773. DFSDM_DMAInjectedHalfConvCplt : NULL;
  1774. /* Start DMA in interrupt mode */
  1775. if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)&hdfsdm_filter->Instance->FLTJDATAR, \
  1776. (uint32_t) pData, Length) != HAL_OK)
  1777. {
  1778. /* Set DFSDM filter in error state */
  1779. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1780. status = HAL_ERROR;
  1781. }
  1782. else
  1783. {
  1784. /* Start injected conversion */
  1785. DFSDM_InjConvStart(hdfsdm_filter);
  1786. }
  1787. }
  1788. else
  1789. {
  1790. status = HAL_ERROR;
  1791. }
  1792. /* Return function status */
  1793. return status;
  1794. }
  1795. /**
  1796. * @brief This function allows to start injected conversion in DMA mode and to get
  1797. * only the 16 most significant bits of conversion.
  1798. * @note This function should be called only when DFSDM filter instance is
  1799. * in idle state or if regular conversion is ongoing.
  1800. * Please note that data on buffer will contain signed 16 most significant
  1801. * bits of injected conversion.
  1802. * @param hdfsdm_filter : DFSDM filter handle.
  1803. * @param pData : The destination buffer address.
  1804. * @param Length : The length of data to be transferred from DFSDM filter to memory.
  1805. * @retval HAL status
  1806. */
  1807. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1808. int16_t *pData,
  1809. uint32_t Length)
  1810. {
  1811. HAL_StatusTypeDef status = HAL_OK;
  1812. /* Check parameters */
  1813. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1814. /* Check destination address and length */
  1815. if((pData == NULL) || (Length == 0))
  1816. {
  1817. status = HAL_ERROR;
  1818. }
  1819. /* Check that DMA is enabled for injected conversion */
  1820. else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
  1821. {
  1822. status = HAL_ERROR;
  1823. }
  1824. /* Check parameters compatibility */
  1825. else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1826. (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
  1827. (Length > hdfsdm_filter->InjConvRemaining))
  1828. {
  1829. status = HAL_ERROR;
  1830. }
  1831. else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1832. (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
  1833. {
  1834. status = HAL_ERROR;
  1835. }
  1836. /* Check DFSDM filter state */
  1837. else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1838. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
  1839. {
  1840. /* Set callbacks on DMA handler */
  1841. hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
  1842. hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
  1843. hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
  1844. DFSDM_DMAInjectedHalfConvCplt : NULL;
  1845. /* Start DMA in interrupt mode */
  1846. if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)(&hdfsdm_filter->Instance->FLTJDATAR) + 2, \
  1847. (uint32_t) pData, Length) != HAL_OK)
  1848. {
  1849. /* Set DFSDM filter in error state */
  1850. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1851. status = HAL_ERROR;
  1852. }
  1853. else
  1854. {
  1855. /* Start injected conversion */
  1856. DFSDM_InjConvStart(hdfsdm_filter);
  1857. }
  1858. }
  1859. else
  1860. {
  1861. status = HAL_ERROR;
  1862. }
  1863. /* Return function status */
  1864. return status;
  1865. }
  1866. /**
  1867. * @brief This function allows to stop injected conversion in DMA mode.
  1868. * @note This function should be called only if injected conversion is ongoing.
  1869. * @param hdfsdm_filter : DFSDM filter handle.
  1870. * @retval HAL status
  1871. */
  1872. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1873. {
  1874. HAL_StatusTypeDef status = HAL_OK;
  1875. /* Check parameters */
  1876. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1877. /* Check DFSDM filter state */
  1878. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
  1879. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1880. {
  1881. /* Return error status */
  1882. status = HAL_ERROR;
  1883. }
  1884. else
  1885. {
  1886. /* Stop current DMA transfer */
  1887. if(HAL_DMA_Abort(hdfsdm_filter->hdmaInj) != HAL_OK)
  1888. {
  1889. /* Set DFSDM filter in error state */
  1890. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1891. status = HAL_ERROR;
  1892. }
  1893. else
  1894. {
  1895. /* Stop regular conversion */
  1896. DFSDM_InjConvStop(hdfsdm_filter);
  1897. }
  1898. }
  1899. /* Return function status */
  1900. return status;
  1901. }
  1902. /**
  1903. * @brief This function allows to get injected conversion value.
  1904. * @param hdfsdm_filter : DFSDM filter handle.
  1905. * @param Channel : Corresponding channel of injected conversion.
  1906. * @retval Injected conversion value
  1907. */
  1908. int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1909. uint32_t *Channel)
  1910. {
  1911. uint32_t reg = 0;
  1912. int32_t value = 0;
  1913. /* Check parameters */
  1914. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1915. assert_param(Channel != NULL);
  1916. /* Get value of data register for injected channel */
  1917. reg = hdfsdm_filter->Instance->FLTJDATAR;
  1918. /* Extract channel and injected conversion value */
  1919. *Channel = (reg & DFSDM_FLTJDATAR_JDATACH);
  1920. value = ((reg & DFSDM_FLTJDATAR_JDATA) >> DFSDM_FLTJDATAR_DATA_OFFSET);
  1921. /* return regular conversion value */
  1922. return value;
  1923. }
  1924. /**
  1925. * @brief This function allows to start filter analog watchdog in interrupt mode.
  1926. * @param hdfsdm_filter : DFSDM filter handle.
  1927. * @param awdParam : DFSDM filter analog watchdog parameters.
  1928. * @retval HAL status
  1929. */
  1930. HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1931. DFSDM_Filter_AwdParamTypeDef *awdParam)
  1932. {
  1933. HAL_StatusTypeDef status = HAL_OK;
  1934. /* Check parameters */
  1935. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1936. assert_param(IS_DFSDM_FILTER_AWD_DATA_SOURCE(awdParam->DataSource));
  1937. assert_param(IS_DFSDM_INJECTED_CHANNEL(awdParam->Channel));
  1938. assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->HighThreshold));
  1939. assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->LowThreshold));
  1940. assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->HighBreakSignal));
  1941. assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->LowBreakSignal));
  1942. /* Check DFSDM filter state */
  1943. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
  1944. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
  1945. {
  1946. /* Return error status */
  1947. status = HAL_ERROR;
  1948. }
  1949. else
  1950. {
  1951. /* Set analog watchdog data source */
  1952. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
  1953. hdfsdm_filter->Instance->FLTCR1 |= awdParam->DataSource;
  1954. /* Set thresholds and break signals */
  1955. hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
  1956. hdfsdm_filter->Instance->FLTAWHTR |= (((uint32_t) awdParam->HighThreshold << DFSDM_FLTAWHTR_THRESHOLD_OFFSET) | \
  1957. awdParam->HighBreakSignal);
  1958. hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
  1959. hdfsdm_filter->Instance->FLTAWLTR |= (((uint32_t) awdParam->LowThreshold << DFSDM_FLTAWLTR_THRESHOLD_OFFSET) | \
  1960. awdParam->LowBreakSignal);
  1961. /* Set channels and interrupt for analog watchdog */
  1962. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH);
  1963. hdfsdm_filter->Instance->FLTCR2 |= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_AWDCH_OFFSET) | \
  1964. DFSDM_FLTCR2_AWDIE);
  1965. }
  1966. /* Return function status */
  1967. return status;
  1968. }
  1969. /**
  1970. * @brief This function allows to stop filter analog watchdog in interrupt mode.
  1971. * @param hdfsdm_filter : DFSDM filter handle.
  1972. * @retval HAL status
  1973. */
  1974. HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1975. {
  1976. HAL_StatusTypeDef status = HAL_OK;
  1977. /* Check parameters */
  1978. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1979. /* Check DFSDM filter state */
  1980. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
  1981. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
  1982. {
  1983. /* Return error status */
  1984. status = HAL_ERROR;
  1985. }
  1986. else
  1987. {
  1988. /* Reset channels for analog watchdog and deactivate interrupt */
  1989. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH | DFSDM_FLTCR2_AWDIE);
  1990. /* Clear all analog watchdog flags */
  1991. hdfsdm_filter->Instance->FLTAWCFR = (DFSDM_FLTAWCFR_CLRAWHTF | DFSDM_FLTAWCFR_CLRAWLTF);
  1992. /* Reset thresholds and break signals */
  1993. hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
  1994. hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
  1995. /* Reset analog watchdog data source */
  1996. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
  1997. }
  1998. /* Return function status */
  1999. return status;
  2000. }
  2001. /**
  2002. * @brief This function allows to start extreme detector feature.
  2003. * @param hdfsdm_filter : DFSDM filter handle.
  2004. * @param Channel : Channels where extreme detector is enabled.
  2005. * This parameter can be a values combination of @ref DFSDM_Channel_Selection.
  2006. * @retval HAL status
  2007. */
  2008. HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2009. uint32_t Channel)
  2010. {
  2011. HAL_StatusTypeDef status = HAL_OK;
  2012. /* Check parameters */
  2013. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2014. assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
  2015. /* Check DFSDM filter state */
  2016. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
  2017. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
  2018. {
  2019. /* Return error status */
  2020. status = HAL_ERROR;
  2021. }
  2022. else
  2023. {
  2024. /* Set channels for extreme detector */
  2025. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
  2026. hdfsdm_filter->Instance->FLTCR2 |= ((Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_EXCH_OFFSET);
  2027. }
  2028. /* Return function status */
  2029. return status;
  2030. }
  2031. /**
  2032. * @brief This function allows to stop extreme detector feature.
  2033. * @param hdfsdm_filter : DFSDM filter handle.
  2034. * @retval HAL status
  2035. */
  2036. HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2037. {
  2038. HAL_StatusTypeDef status = HAL_OK;
  2039. __IO uint32_t reg1;
  2040. __IO uint32_t reg2;
  2041. /* Check parameters */
  2042. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2043. /* Check DFSDM filter state */
  2044. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
  2045. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
  2046. {
  2047. /* Return error status */
  2048. status = HAL_ERROR;
  2049. }
  2050. else
  2051. {
  2052. /* Reset channels for extreme detector */
  2053. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
  2054. /* Clear extreme detector values */
  2055. reg1 = hdfsdm_filter->Instance->FLTEXMAX;
  2056. reg2 = hdfsdm_filter->Instance->FLTEXMIN;
  2057. UNUSED(reg1); /* To avoid GCC warning */
  2058. UNUSED(reg2); /* To avoid GCC warning */
  2059. }
  2060. /* Return function status */
  2061. return status;
  2062. }
  2063. /**
  2064. * @brief This function allows to get extreme detector maximum value.
  2065. * @param hdfsdm_filter : DFSDM filter handle.
  2066. * @param Channel : Corresponding channel.
  2067. * @retval Extreme detector maximum value
  2068. * This value is between Min_Data = -8388608 and Max_Data = 8388607.
  2069. */
  2070. int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2071. uint32_t *Channel)
  2072. {
  2073. uint32_t reg = 0;
  2074. int32_t value = 0;
  2075. /* Check parameters */
  2076. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2077. assert_param(Channel != NULL);
  2078. /* Get value of extreme detector maximum register */
  2079. reg = hdfsdm_filter->Instance->FLTEXMAX;
  2080. /* Extract channel and extreme detector maximum value */
  2081. *Channel = (reg & DFSDM_FLTEXMAX_EXMAXCH);
  2082. value = ((reg & DFSDM_FLTEXMAX_EXMAX) >> DFSDM_FLTEXMAX_DATA_OFFSET);
  2083. /* return extreme detector maximum value */
  2084. return value;
  2085. }
  2086. /**
  2087. * @brief This function allows to get extreme detector minimum value.
  2088. * @param hdfsdm_filter : DFSDM filter handle.
  2089. * @param Channel : Corresponding channel.
  2090. * @retval Extreme detector minimum value
  2091. * This value is between Min_Data = -8388608 and Max_Data = 8388607.
  2092. */
  2093. int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2094. uint32_t *Channel)
  2095. {
  2096. uint32_t reg = 0;
  2097. int32_t value = 0;
  2098. /* Check parameters */
  2099. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2100. assert_param(Channel != NULL);
  2101. /* Get value of extreme detector minimum register */
  2102. reg = hdfsdm_filter->Instance->FLTEXMIN;
  2103. /* Extract channel and extreme detector minimum value */
  2104. *Channel = (reg & DFSDM_FLTEXMIN_EXMINCH);
  2105. value = ((reg & DFSDM_FLTEXMIN_EXMIN) >> DFSDM_FLTEXMIN_DATA_OFFSET);
  2106. /* return extreme detector minimum value */
  2107. return value;
  2108. }
  2109. /**
  2110. * @brief This function allows to get conversion time value.
  2111. * @param hdfsdm_filter : DFSDM filter handle.
  2112. * @retval Conversion time value
  2113. * @note To get time in second, this value has to be divided by DFSDM clock frequency.
  2114. */
  2115. uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2116. {
  2117. uint32_t reg = 0;
  2118. uint32_t value = 0;
  2119. /* Check parameters */
  2120. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2121. /* Get value of conversion timer register */
  2122. reg = hdfsdm_filter->Instance->FLTCNVTIMR;
  2123. /* Extract conversion time value */
  2124. value = ((reg & DFSDM_FLTCNVTIMR_CNVCNT) >> DFSDM_FLTCNVTIMR_DATA_OFFSET);
  2125. /* return extreme detector minimum value */
  2126. return value;
  2127. }
  2128. /**
  2129. * @brief This function handles the DFSDM interrupts.
  2130. * @param hdfsdm_filter : DFSDM filter handle.
  2131. * @retval None
  2132. */
  2133. void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2134. {
  2135. /* Check if overrun occurs during regular conversion */
  2136. if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) != 0) && \
  2137. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_ROVRIE) != 0))
  2138. {
  2139. /* Clear regular overrun flag */
  2140. hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
  2141. /* Update error code */
  2142. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
  2143. /* Call error callback */
  2144. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  2145. }
  2146. /* Check if overrun occurs during injected conversion */
  2147. else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) != 0) && \
  2148. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_JOVRIE) != 0))
  2149. {
  2150. /* Clear injected overrun flag */
  2151. hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
  2152. /* Update error code */
  2153. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
  2154. /* Call error callback */
  2155. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  2156. }
  2157. /* Check if end of regular conversion */
  2158. else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != 0) && \
  2159. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_REOCIE) != 0))
  2160. {
  2161. /* Call regular conversion complete callback */
  2162. HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
  2163. /* End of conversion if mode is not continuous and software trigger */
  2164. if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  2165. (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
  2166. {
  2167. /* Disable interrupts for regular conversions */
  2168. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE);
  2169. /* Update DFSDM filter state */
  2170. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
  2171. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
  2172. }
  2173. }
  2174. /* Check if end of injected conversion */
  2175. else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != 0) && \
  2176. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_JEOCIE) != 0))
  2177. {
  2178. /* Call injected conversion complete callback */
  2179. HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
  2180. /* Update remaining injected conversions */
  2181. hdfsdm_filter->InjConvRemaining--;
  2182. if(hdfsdm_filter->InjConvRemaining == 0)
  2183. {
  2184. /* End of conversion if trigger is software */
  2185. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  2186. {
  2187. /* Disable interrupts for injected conversions */
  2188. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE);
  2189. /* Update DFSDM filter state */
  2190. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
  2191. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
  2192. }
  2193. /* end of injected sequence, reset the value */
  2194. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  2195. hdfsdm_filter->InjectedChannelsNbr : 1;
  2196. }
  2197. }
  2198. /* Check if analog watchdog occurs */
  2199. else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_AWDF) != 0) && \
  2200. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_AWDIE) != 0))
  2201. {
  2202. uint32_t reg = 0;
  2203. uint32_t threshold = 0;
  2204. uint32_t channel = 0;
  2205. /* Get channel and threshold */
  2206. reg = hdfsdm_filter->Instance->FLTAWSR;
  2207. threshold = ((reg & DFSDM_FLTAWSR_AWLTF) != 0) ? DFSDM_AWD_LOW_THRESHOLD : DFSDM_AWD_HIGH_THRESHOLD;
  2208. if(threshold == DFSDM_AWD_HIGH_THRESHOLD)
  2209. {
  2210. reg = reg >> DFSDM_FLTAWSR_HIGH_OFFSET;
  2211. }
  2212. while((reg & 1) == 0)
  2213. {
  2214. channel++;
  2215. reg = reg >> 1;
  2216. }
  2217. /* Clear analog watchdog flag */
  2218. hdfsdm_filter->Instance->FLTAWCFR = (threshold == DFSDM_AWD_HIGH_THRESHOLD) ? \
  2219. (1 << (DFSDM_FLTAWSR_HIGH_OFFSET + channel)) : \
  2220. (1 << channel);
  2221. /* Call analog watchdog callback */
  2222. HAL_DFSDM_FilterAwdCallback(hdfsdm_filter, channel, threshold);
  2223. }
  2224. /* Check if clock absence occurs */
  2225. else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
  2226. ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) != 0) && \
  2227. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_CKABIE) != 0))
  2228. {
  2229. uint32_t reg = 0;
  2230. uint32_t channel = 0;
  2231. reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_OFFSET);
  2232. while(channel < DFSDM1_CHANNEL_NUMBER)
  2233. {
  2234. /* Check if flag is set and corresponding channel is enabled */
  2235. if(((reg & 1) != 0) && (a_dfsdm1ChannelHandle[channel] != NULL))
  2236. {
  2237. /* Check clock absence has been enabled for this channel */
  2238. if((a_dfsdm1ChannelHandle[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0)
  2239. {
  2240. /* Clear clock absence flag */
  2241. hdfsdm_filter->Instance->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
  2242. /* Call clock absence callback */
  2243. HAL_DFSDM_ChannelCkabCallback(a_dfsdm1ChannelHandle[channel]);
  2244. }
  2245. }
  2246. channel++;
  2247. reg = reg >> 1;
  2248. }
  2249. }
  2250. /* Check if short circuit detection occurs */
  2251. else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
  2252. ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) != 0) && \
  2253. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_SCDIE) != 0))
  2254. {
  2255. uint32_t reg = 0;
  2256. uint32_t channel = 0;
  2257. /* Get channel */
  2258. reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_OFFSET);
  2259. while((reg & 1) == 0)
  2260. {
  2261. channel++;
  2262. reg = reg >> 1;
  2263. }
  2264. /* Clear short circuit detection flag */
  2265. hdfsdm_filter->Instance->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
  2266. /* Call short circuit detection callback */
  2267. HAL_DFSDM_ChannelScdCallback(a_dfsdm1ChannelHandle[channel]);
  2268. }
  2269. }
  2270. /**
  2271. * @brief Regular conversion complete callback.
  2272. * @note In interrupt mode, user has to read conversion value in this function
  2273. * using HAL_DFSDM_FilterGetRegularValue.
  2274. * @param hdfsdm_filter : DFSDM filter handle.
  2275. * @retval None
  2276. */
  2277. __weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2278. {
  2279. /* Prevent unused argument(s) compilation warning */
  2280. UNUSED(hdfsdm_filter);
  2281. /* NOTE : This function should not be modified, when the callback is needed,
  2282. the HAL_DFSDM_FilterRegConvCpltCallback could be implemented in the user file.
  2283. */
  2284. }
  2285. /**
  2286. * @brief Half regular conversion complete callback.
  2287. * @param hdfsdm_filter : DFSDM filter handle.
  2288. * @retval None
  2289. */
  2290. __weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2291. {
  2292. /* Prevent unused argument(s) compilation warning */
  2293. UNUSED(hdfsdm_filter);
  2294. /* NOTE : This function should not be modified, when the callback is needed,
  2295. the HAL_DFSDM_FilterRegConvHalfCpltCallback could be implemented in the user file.
  2296. */
  2297. }
  2298. /**
  2299. * @brief Injected conversion complete callback.
  2300. * @note In interrupt mode, user has to read conversion value in this function
  2301. * using HAL_DFSDM_FilterGetInjectedValue.
  2302. * @param hdfsdm_filter : DFSDM filter handle.
  2303. * @retval None
  2304. */
  2305. __weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2306. {
  2307. /* Prevent unused argument(s) compilation warning */
  2308. UNUSED(hdfsdm_filter);
  2309. /* NOTE : This function should not be modified, when the callback is needed,
  2310. the HAL_DFSDM_FilterInjConvCpltCallback could be implemented in the user file.
  2311. */
  2312. }
  2313. /**
  2314. * @brief Half injected conversion complete callback.
  2315. * @param hdfsdm_filter : DFSDM filter handle.
  2316. * @retval None
  2317. */
  2318. __weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2319. {
  2320. /* Prevent unused argument(s) compilation warning */
  2321. UNUSED(hdfsdm_filter);
  2322. /* NOTE : This function should not be modified, when the callback is needed,
  2323. the HAL_DFSDM_FilterInjConvHalfCpltCallback could be implemented in the user file.
  2324. */
  2325. }
  2326. /**
  2327. * @brief Filter analog watchdog callback.
  2328. * @param hdfsdm_filter : DFSDM filter handle.
  2329. * @param Channel : Corresponding channel.
  2330. * @param Threshold : Low or high threshold has been reached.
  2331. * @retval None
  2332. */
  2333. __weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2334. uint32_t Channel, uint32_t Threshold)
  2335. {
  2336. /* Prevent unused argument(s) compilation warning */
  2337. UNUSED(hdfsdm_filter);
  2338. UNUSED(Channel);
  2339. UNUSED(Threshold);
  2340. /* NOTE : This function should not be modified, when the callback is needed,
  2341. the HAL_DFSDM_FilterAwdCallback could be implemented in the user file.
  2342. */
  2343. }
  2344. /**
  2345. * @brief Error callback.
  2346. * @param hdfsdm_filter : DFSDM filter handle.
  2347. * @retval None
  2348. */
  2349. __weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2350. {
  2351. /* Prevent unused argument(s) compilation warning */
  2352. UNUSED(hdfsdm_filter);
  2353. /* NOTE : This function should not be modified, when the callback is needed,
  2354. the HAL_DFSDM_FilterErrorCallback could be implemented in the user file.
  2355. */
  2356. }
  2357. /**
  2358. * @}
  2359. */
  2360. /** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions
  2361. * @brief Filter state functions
  2362. *
  2363. @verbatim
  2364. ==============================================================================
  2365. ##### Filter state functions #####
  2366. ==============================================================================
  2367. [..] This section provides functions allowing to:
  2368. (+) Get the DFSDM filter state.
  2369. (+) Get the DFSDM filter error.
  2370. @endverbatim
  2371. * @{
  2372. */
  2373. /**
  2374. * @brief This function allows to get the current DFSDM filter handle state.
  2375. * @param hdfsdm_filter : DFSDM filter handle.
  2376. * @retval DFSDM filter state.
  2377. */
  2378. HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2379. {
  2380. /* Return DFSDM filter handle state */
  2381. return hdfsdm_filter->State;
  2382. }
  2383. /**
  2384. * @brief This function allows to get the current DFSDM filter error.
  2385. * @param hdfsdm_filter : DFSDM filter handle.
  2386. * @retval DFSDM filter error code.
  2387. */
  2388. uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2389. {
  2390. return hdfsdm_filter->ErrorCode;
  2391. }
  2392. /**
  2393. * @}
  2394. */
  2395. /**
  2396. * @}
  2397. */
  2398. /* End of exported functions -------------------------------------------------*/
  2399. /* Private functions ---------------------------------------------------------*/
  2400. /** @addtogroup DFSDM_Private_Functions DFSDM Private Functions
  2401. * @{
  2402. */
  2403. /**
  2404. * @brief DMA half transfer complete callback for regular conversion.
  2405. * @param hdma : DMA handle.
  2406. * @retval None
  2407. */
  2408. static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma)
  2409. {
  2410. /* Get DFSDM filter handle */
  2411. DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  2412. /* Call regular half conversion complete callback */
  2413. HAL_DFSDM_FilterRegConvHalfCpltCallback(hdfsdm_filter);
  2414. }
  2415. /**
  2416. * @brief DMA transfer complete callback for regular conversion.
  2417. * @param hdma : DMA handle.
  2418. * @retval None
  2419. */
  2420. static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma)
  2421. {
  2422. /* Get DFSDM filter handle */
  2423. DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  2424. /* Call regular conversion complete callback */
  2425. HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
  2426. }
  2427. /**
  2428. * @brief DMA half transfer complete callback for injected conversion.
  2429. * @param hdma : DMA handle.
  2430. * @retval None
  2431. */
  2432. static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma)
  2433. {
  2434. /* Get DFSDM filter handle */
  2435. DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  2436. /* Call injected half conversion complete callback */
  2437. HAL_DFSDM_FilterInjConvHalfCpltCallback(hdfsdm_filter);
  2438. }
  2439. /**
  2440. * @brief DMA transfer complete callback for injected conversion.
  2441. * @param hdma : DMA handle.
  2442. * @retval None
  2443. */
  2444. static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma)
  2445. {
  2446. /* Get DFSDM filter handle */
  2447. DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  2448. /* Call injected conversion complete callback */
  2449. HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
  2450. }
  2451. /**
  2452. * @brief DMA error callback.
  2453. * @param hdma : DMA handle.
  2454. * @retval None
  2455. */
  2456. static void DFSDM_DMAError(DMA_HandleTypeDef *hdma)
  2457. {
  2458. /* Get DFSDM filter handle */
  2459. DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  2460. /* Update error code */
  2461. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_DMA;
  2462. /* Call error callback */
  2463. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  2464. }
  2465. /**
  2466. * @brief This function allows to get the number of injected channels.
  2467. * @param Channels : bitfield of injected channels.
  2468. * @retval Number of injected channels.
  2469. */
  2470. static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels)
  2471. {
  2472. uint32_t nbChannels = 0;
  2473. uint32_t tmp;
  2474. /* Get the number of channels from bitfield */
  2475. tmp = (uint32_t) (Channels & DFSDM_LSB_MASK);
  2476. while(tmp != 0)
  2477. {
  2478. if((tmp & 1) != 0)
  2479. {
  2480. nbChannels++;
  2481. }
  2482. tmp = (uint32_t) (tmp >> 1);
  2483. }
  2484. return nbChannels;
  2485. }
  2486. /**
  2487. * @brief This function allows to get the channel number from channel instance.
  2488. * @param Instance : DFSDM channel instance.
  2489. * @retval Channel number.
  2490. */
  2491. static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance)
  2492. {
  2493. uint32_t channel = 0xFF;
  2494. /* Get channel from instance */
  2495. if(Instance == DFSDM1_Channel0)
  2496. {
  2497. channel = 0;
  2498. }
  2499. else if(Instance == DFSDM1_Channel1)
  2500. {
  2501. channel = 1;
  2502. }
  2503. else if(Instance == DFSDM1_Channel2)
  2504. {
  2505. channel = 2;
  2506. }
  2507. else if(Instance == DFSDM1_Channel3)
  2508. {
  2509. channel = 3;
  2510. }
  2511. else if(Instance == DFSDM1_Channel4)
  2512. {
  2513. channel = 4;
  2514. }
  2515. else if(Instance == DFSDM1_Channel5)
  2516. {
  2517. channel = 5;
  2518. }
  2519. else if(Instance == DFSDM1_Channel6)
  2520. {
  2521. channel = 6;
  2522. }
  2523. else if(Instance == DFSDM1_Channel7)
  2524. {
  2525. channel = 7;
  2526. }
  2527. return channel;
  2528. }
  2529. /**
  2530. * @brief This function allows to really start regular conversion.
  2531. * @param hdfsdm_filter : DFSDM filter handle.
  2532. * @retval None
  2533. */
  2534. static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
  2535. {
  2536. /* Check regular trigger */
  2537. if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)
  2538. {
  2539. /* Software start of regular conversion */
  2540. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
  2541. }
  2542. else /* synchronous trigger */
  2543. {
  2544. /* Disable DFSDM filter */
  2545. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  2546. /* Set RSYNC bit in DFSDM_FLTCR1 register */
  2547. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSYNC;
  2548. /* Enable DFSDM filter */
  2549. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  2550. /* If injected conversion was in progress, restart it */
  2551. if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)
  2552. {
  2553. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  2554. {
  2555. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
  2556. }
  2557. /* Update remaining injected conversions */
  2558. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  2559. hdfsdm_filter->InjectedChannelsNbr : 1;
  2560. }
  2561. }
  2562. /* Update DFSDM filter state */
  2563. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
  2564. HAL_DFSDM_FILTER_STATE_REG : HAL_DFSDM_FILTER_STATE_REG_INJ;
  2565. }
  2566. /**
  2567. * @brief This function allows to really stop regular conversion.
  2568. * @param hdfsdm_filter : DFSDM filter handle.
  2569. * @retval None
  2570. */
  2571. static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
  2572. {
  2573. /* Disable DFSDM filter */
  2574. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  2575. /* If regular trigger was synchronous, reset RSYNC bit in DFSDM_FLTCR1 register */
  2576. if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SYNC_TRIGGER)
  2577. {
  2578. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
  2579. }
  2580. /* Enable DFSDM filter */
  2581. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  2582. /* If injected conversion was in progress, restart it */
  2583. if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ)
  2584. {
  2585. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  2586. {
  2587. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
  2588. }
  2589. /* Update remaining injected conversions */
  2590. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  2591. hdfsdm_filter->InjectedChannelsNbr : 1;
  2592. }
  2593. /* Update DFSDM filter state */
  2594. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
  2595. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
  2596. }
  2597. /**
  2598. * @brief This function allows to really start injected conversion.
  2599. * @param hdfsdm_filter : DFSDM filter handle.
  2600. * @retval None
  2601. */
  2602. static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
  2603. {
  2604. /* Check injected trigger */
  2605. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  2606. {
  2607. /* Software start of injected conversion */
  2608. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
  2609. }
  2610. else /* external or synchronous trigger */
  2611. {
  2612. /* Disable DFSDM filter */
  2613. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  2614. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
  2615. {
  2616. /* Set JSYNC bit in DFSDM_FLTCR1 register */
  2617. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSYNC;
  2618. }
  2619. else /* external trigger */
  2620. {
  2621. /* Set JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
  2622. hdfsdm_filter->Instance->FLTCR1 |= hdfsdm_filter->ExtTriggerEdge;
  2623. }
  2624. /* Enable DFSDM filter */
  2625. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  2626. /* If regular conversion was in progress, restart it */
  2627. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) && \
  2628. (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
  2629. {
  2630. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
  2631. }
  2632. }
  2633. /* Update DFSDM filter state */
  2634. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
  2635. HAL_DFSDM_FILTER_STATE_INJ : HAL_DFSDM_FILTER_STATE_REG_INJ;
  2636. }
  2637. /**
  2638. * @brief This function allows to really stop injected conversion.
  2639. * @param hdfsdm_filter : DFSDM filter handle.
  2640. * @retval None
  2641. */
  2642. static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
  2643. {
  2644. /* Disable DFSDM filter */
  2645. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  2646. /* If injected trigger was synchronous, reset JSYNC bit in DFSDM_FLTCR1 register */
  2647. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
  2648. {
  2649. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC);
  2650. }
  2651. else if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_EXT_TRIGGER)
  2652. {
  2653. /* Reset JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
  2654. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JEXTEN);
  2655. }
  2656. /* Enable DFSDM filter */
  2657. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  2658. /* If regular conversion was in progress, restart it */
  2659. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) && \
  2660. (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
  2661. {
  2662. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
  2663. }
  2664. /* Update remaining injected conversions */
  2665. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  2666. hdfsdm_filter->InjectedChannelsNbr : 1;
  2667. /* Update DFSDM filter state */
  2668. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
  2669. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
  2670. }
  2671. /**
  2672. * @}
  2673. */
  2674. /* End of private functions --------------------------------------------------*/
  2675. /**
  2676. * @}
  2677. */
  2678. #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
  2679. #endif /* HAL_DFSDM_MODULE_ENABLED */
  2680. /**
  2681. * @}
  2682. */
  2683. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/