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stm32lib/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h

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  1. /**

  2.   ******************************************************************************

  3.   * @file    stm32f7xx_hal_tim_ex.h

  4.   * @author  MCD Application Team

  5.   * @version V1.1.2

  6.   * @date    23-September-2016

  7.   * @brief   Header file of TIM HAL Extension module.

  8.   ******************************************************************************

  9.   * @attention

  10.   *

  11.   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>

  12.   *

  13.   * Redistribution and use in source and binary forms, with or without modification,

  14.   * are permitted provided that the following conditions are met:

  15.   *   1. Redistributions of source code must retain the above copyright notice,

  16.   *      this list of conditions and the following disclaimer.

  17.   *   2. Redistributions in binary form must reproduce the above copyright notice,

  18.   *      this list of conditions and the following disclaimer in the documentation

  19.   *      and/or other materials provided with the distribution.

  20.   *   3. Neither the name of STMicroelectronics nor the names of its contributors

  21.   *      may be used to endorse or promote products derived from this software

  22.   *      without specific prior written permission.

  23.   *

  24.   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"

  25.   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

  26.   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE

  27.   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE

  28.   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

  29.   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR

  30.   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER

  31.   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,

  32.   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE

  33.   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

  34.   *

  35.   ******************************************************************************

  36.   */

  37. 

  38. /* Define to prevent recursive inclusion -------------------------------------*/

  39. #ifndef __STM32F7xx_HAL_TIM_EX_H

  40. #define __STM32F7xx_HAL_TIM_EX_H

  41. 

  42. #ifdef __cplusplus

  43.  extern "C" {

  44. #endif

  45. 

  46. /* Includes ------------------------------------------------------------------*/

  47. #include "stm32f7xx_hal_def.h"

  48. 

  49. /** @addtogroup STM32F7xx_HAL_Driver

  50.   * @{

  51.   */

  52. 

  53. /** @addtogroup TIMEx

  54.   * @{

  55.   */

  56. 

  57. /* Exported types ------------------------------------------------------------*/

  58. /** @defgroup TIMEx_Exported_Types TIM Exported Types

  59.   * @{

  60.   */

  61. 

  62. /**

  63.   * @brief  TIM Hall sensor Configuration Structure definition

  64.   */

  65. 

  66. typedef struct

  67. {

  68. 

  69.   uint32_t IC1Polarity;            /*!< Specifies the active edge of the input signal.

  70.                                         This parameter can be a value of @ref TIM_Input_Capture_Polarity */

  71. 

  72.   uint32_t IC1Prescaler;        /*!< Specifies the Input Capture Prescaler.

  73.                                      This parameter can be a value of @ref TIM_Input_Capture_Prescaler */

  74. 

  75.   uint32_t IC1Filter;           /*!< Specifies the input capture filter.

  76.                                      This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */

  77.   uint32_t Commutation_Delay;  /*!< Specifies the pulse value to be loaded into the Capture Compare Register.

  78.                                     This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */

  79. } TIM_HallSensor_InitTypeDef;

  80. 

  81. /**

  82.   * @brief  TIM Master configuration Structure definition

  83.   */

  84. typedef struct {

  85.   uint32_t  MasterOutputTrigger;   /*!< Trigger output (TRGO) selection.

  86.                                       This parameter can be a value of @ref TIM_Master_Mode_Selection */

  87.   uint32_t  MasterOutputTrigger2;  /*!< Trigger output2 (TRGO2) selection

  88.                                       This parameter can be a value of @ref TIMEx_Master_Mode_Selection_2 */

  89.   uint32_t  MasterSlaveMode;       /*!< Master/slave mode selection.

  90.                                       This parameter can be a value of @ref TIM_Master_Slave_Mode */

  91. }TIM_MasterConfigTypeDef;

  92. 

  93. /**

  94.   * @brief  TIM Break input(s) and Dead time configuration Structure definition

  95.   * @note   2 break inputs can be configured (BKIN and BKIN2) with configurable

  96.   *        filter and polarity.

  97.   */

  98. typedef struct

  99. {

  100.   uint32_t OffStateRunMode;     /*!< TIM off state in run mode.

  101.                                        This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */

  102.   uint32_t OffStateIDLEMode;        /*!< TIM off state in IDLE mode.

  103.                                        This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */

  104.   uint32_t LockLevel;               /*!< TIM Lock level.

  105.                                        This parameter can be a value of @ref TIM_Lock_level */

  106.   uint32_t DeadTime;                /*!< TIM dead Time.

  107.                                        This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */

  108.   uint32_t BreakState;              /*!< TIM Break State.

  109.                                        This parameter can be a value of @ref TIM_Break_Input_enable_disable */

  110.   uint32_t BreakPolarity;           /*!< TIM Break input polarity.

  111.                                        This parameter can be a value of @ref TIM_Break_Polarity */

  112.   uint32_t BreakFilter;             /*!< Specifies the break input filter.

  113.                                        This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */

  114.   uint32_t Break2State;             /*!< TIM Break2 State

  115.                                        This parameter can be a value of @ref TIMEx_Break2_Input_enable_disable */

  116.   uint32_t Break2Polarity;          /*!< TIM Break2 input polarity

  117.                                        This parameter can be a value of @ref TIMEx_Break2_Polarity */

  118.   uint32_t Break2Filter;            /*!< TIM break2 input filter.

  119.                                        This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */

  120.   uint32_t AutomaticOutput;         /*!< TIM Automatic Output Enable state

  121.                                        This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */

  122. } TIM_BreakDeadTimeConfigTypeDef;

  123. 

  124. #if defined (STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx)

  125. /**

  126.   * @brief  TIM Break/Break2 input configuration

  127.   */

  128. typedef struct {

  129.   uint32_t Source;         /*!< Specifies the source of the timer break input.

  130.                                 This parameter can be a value of @ref TIMEx_Break_Input_Source */

  131.   uint32_t Enable;         /*!< Specifies whether or not the break input source is enabled.

  132.                                 This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */

  133. } TIMEx_BreakInputConfigTypeDef;

  134. #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */

  135. /**

  136.   * @}

  137.   */

  138. /* Exported constants --------------------------------------------------------*/

  139. /** @defgroup TIMEx_Exported_Constants  TIMEx Exported Constants

  140.   * @{

  141.   */

  142. 

  143. /** @defgroup TIMEx_Channel TIMEx Channel

  144.   * @{

  145.   */

  146. 

  147. #define TIM_CHANNEL_1                      ((uint32_t)0x0000U)

  148. #define TIM_CHANNEL_2                      ((uint32_t)0x0004U)

  149. #define TIM_CHANNEL_3                      ((uint32_t)0x0008U)

  150. #define TIM_CHANNEL_4                      ((uint32_t)0x000CU)

  151. #define TIM_CHANNEL_5                      ((uint32_t)0x0010U)

  152. #define TIM_CHANNEL_6                      ((uint32_t)0x0014U)

  153. #define TIM_CHANNEL_ALL                    ((uint32_t)0x003CU)

  154. 

  155. /**

  156.   * @}

  157.   */

  158. 

  159. /** @defgroup TIMEx_Output_Compare_and_PWM_modes TIMEx Output Compare and PWM Modes

  160.   * @{

  161.   */

  162. #define TIM_OCMODE_TIMING                   ((uint32_t)0x0000U)

  163. #define TIM_OCMODE_ACTIVE                   ((uint32_t)TIM_CCMR1_OC1M_0)

  164. #define TIM_OCMODE_INACTIVE                 ((uint32_t)TIM_CCMR1_OC1M_1)

  165. #define TIM_OCMODE_TOGGLE                   ((uint32_t)TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)

  166. #define TIM_OCMODE_PWM1                     ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1)

  167. #define TIM_OCMODE_PWM2                     ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)

  168. #define TIM_OCMODE_FORCED_ACTIVE            ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0)

  169. #define TIM_OCMODE_FORCED_INACTIVE          ((uint32_t)TIM_CCMR1_OC1M_2)

  170. 

  171. #define TIM_OCMODE_RETRIGERRABLE_OPM1      ((uint32_t)TIM_CCMR1_OC1M_3)

  172. #define TIM_OCMODE_RETRIGERRABLE_OPM2      ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0)

  173. #define TIM_OCMODE_COMBINED_PWM1           ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2)

  174. #define TIM_OCMODE_COMBINED_PWM2           ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2)

  175. #define TIM_OCMODE_ASSYMETRIC_PWM1         ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2)

  176. #define TIM_OCMODE_ASSYMETRIC_PWM2         ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M)

  177. /**

  178.   * @}

  179.   */

  180. 

  181. /** @defgroup TIMEx_Remap  TIMEx Remap

  182.   * @{

  183.   */

  184. #define TIM_TIM2_TIM8_TRGO                     (0x00000000U)

  185. #define TIM_TIM2_ETH_PTP                       (0x00000400U)

  186. #define TIM_TIM2_USBFS_SOF                     (0x00000800U)

  187. #define TIM_TIM2_USBHS_SOF                     (0x00000C00U)

  188. #define TIM_TIM5_GPIO                          (0x00000000U)

  189. #define TIM_TIM5_LSI                           (0x00000040U)

  190. #define TIM_TIM5_LSE                           (0x00000080U)

  191. #define TIM_TIM5_RTC                           (0x000000C0U)

  192. #define TIM_TIM11_GPIO                         (0x00000000U)

  193. #define TIM_TIM11_SPDIFRX                      (0x00000001U)

  194. #define TIM_TIM11_HSE                          (0x00000002U)

  195. #define TIM_TIM11_MCO1                         (0x00000003U)

  196. /**

  197.   * @}

  198.   */

  199. 

  200. /** @defgroup TIMEx_ClearInput_Source TIMEx Clear Input Source

  201.   * @{

  202.   */

  203. #define TIM_CLEARINPUTSOURCE_ETR            ((uint32_t)0x0001U)

  204. #define TIM_CLEARINPUTSOURCE_OCREFCLR       ((uint32_t)0x0002U)

  205. #define TIM_CLEARINPUTSOURCE_NONE           ((uint32_t)0x0000U)

  206. /**

  207.   * @}

  208.   */

  209. 

  210. /** @defgroup TIMEx_Break2_Input_enable_disable  TIMEx Break input 2 Enable

  211.   * @{

  212.   */

  213. #define TIM_BREAK2_DISABLE         ((uint32_t)0x00000000U)

  214. #define TIM_BREAK2_ENABLE          ((uint32_t)TIM_BDTR_BK2E)

  215. /**

  216.   * @}

  217.   */

  218. 

  219. /** @defgroup TIMEx_Break2_Polarity TIMEx Break2 Polarity

  220.   * @{

  221.   */

  222. #define TIM_BREAK2POLARITY_LOW        ((uint32_t)0x00000000U)

  223. #define TIM_BREAK2POLARITY_HIGH       (TIM_BDTR_BK2P)

  224. /**

  225.   * @}

  226.   */

  227. 

  228. /** @defgroup TIMEx_Group_Channel5 TIMEx Group Channel 5 and Channel 1, 2 or 3

  229.   * @{

  230.   */

  231. #define TIM_GROUPCH5_NONE       ((uint32_t)0x00000000U)  /* !< No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC */

  232. #define TIM_GROUPCH5_OC1REFC    (TIM_CCR5_GC5C1)      /* !< OC1REFC is the logical AND of OC1REFC and OC5REF */

  233. #define TIM_GROUPCH5_OC2REFC    (TIM_CCR5_GC5C2)      /* !< OC2REFC is the logical AND of OC2REFC and OC5REF */

  234. #define TIM_GROUPCH5_OC3REFC    (TIM_CCR5_GC5C3)       /* !< OC3REFC is the logical AND of OC3REFC and OC5REF */

  235. /**

  236.   * @}

  237.   */

  238. 

  239. /** @defgroup TIMEx_Master_Mode_Selection_2 TIMEx Master Mode Selection 2 (TRGO2)

  240.   * @{

  241.   */

  242. #define TIM_TRGO2_RESET                          ((uint32_t)0x00000000U)

  243. #define TIM_TRGO2_ENABLE                         ((uint32_t)(TIM_CR2_MMS2_0))

  244. #define TIM_TRGO2_UPDATE                         ((uint32_t)(TIM_CR2_MMS2_1))

  245. #define TIM_TRGO2_OC1                            ((uint32_t)(TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))

  246. #define TIM_TRGO2_OC1REF                         ((uint32_t)(TIM_CR2_MMS2_2))

  247. #define TIM_TRGO2_OC2REF                         ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0))

  248. #define TIM_TRGO2_OC3REF                         ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1))

  249. #define TIM_TRGO2_OC4REF                         ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))

  250. #define TIM_TRGO2_OC5REF                         ((uint32_t)(TIM_CR2_MMS2_3))

  251. #define TIM_TRGO2_OC6REF                         ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_0))

  252. #define TIM_TRGO2_OC4REF_RISINGFALLING           ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1))

  253. #define TIM_TRGO2_OC6REF_RISINGFALLING           ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))

  254. #define TIM_TRGO2_OC4REF_RISING_OC6REF_RISING    ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2))

  255. #define TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING   ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0))

  256. #define TIM_TRGO2_OC5REF_RISING_OC6REF_RISING    ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 |TIM_CR2_MMS2_1))

  257. #define TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING   ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))

  258. /**

  259.   * @}

  260.   */

  261. 

  262. /** @defgroup TIMEx_Slave_Mode TIMEx Slave mode

  263.   * @{

  264.   */

  265. #define TIM_SLAVEMODE_DISABLE                ((uint32_t)0x0000U)

  266. #define TIM_SLAVEMODE_RESET                  ((uint32_t)(TIM_SMCR_SMS_2))

  267. #define TIM_SLAVEMODE_GATED                  ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0))

  268. #define TIM_SLAVEMODE_TRIGGER                ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1))

  269. #define TIM_SLAVEMODE_EXTERNAL1              ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0))

  270. #define TIM_SLAVEMODE_COMBINED_RESETTRIGGER  ((uint32_t)(TIM_SMCR_SMS_3))

  271. /**

  272.   * @}

  273.   */

  274. #if defined(STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx)

  275. /** @defgroup TIMEx_Break_Input TIM  Extended Break input

  276.   * @{

  277.   */

  278. #define TIM_BREAKINPUT_BRK     ((uint32_t)0x00000001U) /* !< Timer break input  */

  279. #define TIM_BREAKINPUT_BRK2    ((uint32_t)0x00000002U) /* !< Timer break2 input */

  280. /**

  281.   * @}

  282.   */

  283. 

  284. /** @defgroup TIMEx_Break_Input_Source TIM  Extended Break input source

  285.   * @{

  286.   */

  287. #define TIM_BREAKINPUTSOURCE_BKIN     ((uint32_t)0x00000001U) /* !< An external source (GPIO) is connected to the BKIN pin  */

  288. #define TIM_BREAKINPUTSOURCE_DFSDM1    ((uint32_t)0x00000008U) /* !< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */

  289. /**

  290.   * @}

  291.   */

  292. 

  293. /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling

  294.   * @{

  295.   */

  296. #define TIM_BREAKINPUTSOURCE_DISABLE     ((uint32_t)0x00000000U) /* !< Break input source is disabled */

  297. #define TIM_BREAKINPUTSOURCE_ENABLE      ((uint32_t)0x00000001U) /* !< Break input source is enabled */

  298. /**

  299.   * @}

  300.   */

  301. 

  302. /**

  303.   * @}

  304.   */

  305. #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */

  306. /**

  307.   * @}

  308.   */

  309. 

  310. /* Exported macro ------------------------------------------------------------*/

  311. /** @defgroup TIMEx_Exported_Macros TIMEx Exported Macros

  312.   * @{

  313.   */

  314. 

  315. /**

  316.   * @brief  Sets the TIM Capture Compare Register value on runtime without

  317.   *         calling another time ConfigChannel function.

  318.   * @param  __HANDLE__: TIM handle.

  319.   * @param  __CHANNEL__ : TIM Channels to be configured.

  320.   *          This parameter can be one of the following values:

  321.   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected

  322.   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected

  323.   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected

  324.   *            @arg TIM_CHANNEL_4: TIM Channel 4 selected

  325.   *            @arg TIM_CHANNEL_5: TIM Channel 5 selected

  326.   *            @arg TIM_CHANNEL_6: TIM Channel 6 selected

  327.   * @param  __COMPARE__: specifies the Capture Compare register new value.

  328.   * @retval None

  329.   */

  330. #define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \

  331. (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__COMPARE__)) :\

  332.  ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__COMPARE__)) :\

  333.  ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__COMPARE__)) :\

  334.  ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4 = (__COMPARE__)) :\

  335.  ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5 = (__COMPARE__)) :\

  336.  ((__HANDLE__)->Instance->CCR6 = (__COMPARE__)))

  337. 

  338. /**

  339.   * @brief  Gets the TIM Capture Compare Register value on runtime

  340.   * @param  __HANDLE__: TIM handle.

  341.   * @param  __CHANNEL__ : TIM Channel associated with the capture compare register

  342.   *          This parameter can be one of the following values:

  343.   *            @arg TIM_CHANNEL_1: get capture/compare 1 register value

  344.   *            @arg TIM_CHANNEL_2: get capture/compare 2 register value

  345.   *            @arg TIM_CHANNEL_3: get capture/compare 3 register value

  346.   *            @arg TIM_CHANNEL_4: get capture/compare 4 register value

  347.   *            @arg TIM_CHANNEL_5: get capture/compare 5 register value

  348.   *            @arg TIM_CHANNEL_6: get capture/compare 6 register value

  349.   * @retval None

  350.   */

  351. #define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \

  352. (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1) :\

  353.  ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2) :\

  354.  ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3) :\

  355.  ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4) :\

  356.  ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5) :\

  357.  ((__HANDLE__)->Instance->CCR6))

  358. 

  359. /**

  360.   * @}

  361.   */

  362. 

  363. /* Exported functions --------------------------------------------------------*/

  364. /** @addtogroup TIMEx_Exported_Functions

  365.   * @{

  366.   */

  367. 

  368. /** @addtogroup TIMEx_Exported_Functions_Group1

  369.   * @{

  370.   */

  371. /*  Timer Hall Sensor functions  **********************************************/

  372. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef* htim, TIM_HallSensor_InitTypeDef* sConfig);

  373. HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef* htim);

  374. 

  375. void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef* htim);

  376. void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef* htim);

  377. 

  378.  /* Blocking mode: Polling */

  379. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef* htim);

  380. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef* htim);

  381. /* Non-Blocking mode: Interrupt */

  382. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef* htim);

  383. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef* htim);

  384. /* Non-Blocking mode: DMA */

  385. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef* htim, uint32_t *pData, uint16_t Length);

  386. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef* htim);

  387. /**

  388.   * @}

  389.   */

  390. 

  391. /** @addtogroup TIMEx_Exported_Functions_Group2

  392.   * @{

  393.   */

  394. /*  Timer Complementary Output Compare functions  *****************************/

  395. /* Blocking mode: Polling */

  396. HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);

  397. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);

  398. 

  399. /* Non-Blocking mode: Interrupt */

  400. HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);

  401. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);

  402. 

  403. /* Non-Blocking mode: DMA */

  404. HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);

  405. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);

  406. /**

  407.   * @}

  408.   */

  409. 

  410. /** @addtogroup TIMEx_Exported_Functions_Group3

  411.   * @{

  412.   */

  413. /*  Timer Complementary PWM functions  ****************************************/

  414. /* Blocking mode: Polling */

  415. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);

  416. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);

  417. 

  418. /* Non-Blocking mode: Interrupt */

  419. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);

  420. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);

  421. /* Non-Blocking mode: DMA */

  422. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);

  423. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);

  424. /**

  425.   * @}

  426.   */

  427. 

  428. /** @addtogroup TIMEx_Exported_Functions_Group4

  429.   * @{

  430.   */

  431. /*  Timer Complementary One Pulse functions  **********************************/

  432. /* Blocking mode: Polling */

  433. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef* htim, uint32_t OutputChannel);

  434. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef* htim, uint32_t OutputChannel);

  435. 

  436. /* Non-Blocking mode: Interrupt */

  437. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);

  438. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);

  439. /**

  440.   * @}

  441.   */

  442. 

  443. /** @addtogroup TIMEx_Exported_Functions_Group5

  444.   * @{

  445.   */

  446. /* Extension Control functions  ************************************************/

  447. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef* htim, uint32_t  InputTrigger, uint32_t  CommutationSource);

  448. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef* htim, uint32_t  InputTrigger, uint32_t  CommutationSource);

  449. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef* htim, uint32_t  InputTrigger, uint32_t  CommutationSource);

  450. HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef* htim, TIM_MasterConfigTypeDef * sMasterConfig);

  451. HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef* htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);

  452. #if defined (STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx)

  453. HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, TIMEx_BreakInputConfigTypeDef *sBreakInputConfig);

  454. #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */

  455. HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef* htim, uint32_t Remap);

  456. HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t OCRef);

  457. /**

  458.   * @}

  459.   */

  460. 

  461. /** @addtogroup TIMEx_Exported_Functions_Group6

  462.   * @{

  463.   */

  464. /* Extension Callback *********************************************************/

  465. void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef* htim);

  466. void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef* htim);

  467. void HAL_TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);

  468. /**

  469.   * @}

  470.   */

  471. 

  472. /** @addtogroup TIMEx_Exported_Functions_Group7

  473.   * @{

  474.   */

  475. /* Extension Peripheral State functions  **************************************/

  476. HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef* htim);

  477. /**

  478.   * @}

  479.   */

  480. 

  481. /**

  482.   * @}

  483.   */

  484. 

  485. /* Private types -------------------------------------------------------------*/

  486. /* Private variables ---------------------------------------------------------*/

  487. /* Private constants ---------------------------------------------------------*/

  488. /* Private macros ------------------------------------------------------------*/

  489. /** @defgroup TIMEx_Private_Macros TIMEx Private Macros

  490.   * @{

  491.   */

  492. #define IS_TIM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \

  493.                                   ((CHANNEL) == TIM_CHANNEL_2) || \

  494.                                   ((CHANNEL) == TIM_CHANNEL_3) || \

  495.                                   ((CHANNEL) == TIM_CHANNEL_4) || \

  496.                                   ((CHANNEL) == TIM_CHANNEL_5) || \

  497.                                   ((CHANNEL) == TIM_CHANNEL_6) || \

  498.                                   ((CHANNEL) == TIM_CHANNEL_ALL))

  499. 

  500. #define IS_TIM_PWMI_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \

  501.                                        ((CHANNEL) == TIM_CHANNEL_2))

  502. 

  503. #define IS_TIM_OPM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \

  504.                                       ((CHANNEL) == TIM_CHANNEL_2))

  505. 

  506. #define IS_TIM_COMPLEMENTARY_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \

  507.                                                 ((CHANNEL) == TIM_CHANNEL_2) || \

  508.                                                 ((CHANNEL) == TIM_CHANNEL_3))

  509. #define IS_TIM_PWM_MODE(MODE) (((MODE) == TIM_OCMODE_PWM1)               || \

  510.                            ((MODE) == TIM_OCMODE_PWM2)               || \

  511.                                ((MODE) == TIM_OCMODE_COMBINED_PWM1)      || \

  512.                                ((MODE) == TIM_OCMODE_COMBINED_PWM2)      || \

  513.                                ((MODE) == TIM_OCMODE_ASSYMETRIC_PWM1)    || \

  514.                                ((MODE) == TIM_OCMODE_ASSYMETRIC_PWM2))

  515. 

  516. #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMODE_TIMING)             || \

  517.                              ((MODE) == TIM_OCMODE_ACTIVE)             || \

  518.                              ((MODE) == TIM_OCMODE_INACTIVE)           || \

  519.                              ((MODE) == TIM_OCMODE_TOGGLE)             || \

  520.                              ((MODE) == TIM_OCMODE_FORCED_ACTIVE)      || \

  521.                              ((MODE) == TIM_OCMODE_FORCED_INACTIVE)    || \

  522.                              ((MODE) == TIM_OCMODE_RETRIGERRABLE_OPM1) || \

  523.                              ((MODE) == TIM_OCMODE_RETRIGERRABLE_OPM2))

  524. #define IS_TIM_REMAP(__TIM_REMAP__)  (((__TIM_REMAP__) == TIM_TIM2_TIM8_TRGO)||\

  525.                                       ((__TIM_REMAP__) == TIM_TIM2_ETH_PTP)||\

  526.                                       ((__TIM_REMAP__) == TIM_TIM2_USBFS_SOF)||\

  527.                                       ((__TIM_REMAP__) == TIM_TIM2_USBHS_SOF)||\

  528.                                       ((__TIM_REMAP__) == TIM_TIM5_GPIO)||\

  529.                                       ((__TIM_REMAP__) == TIM_TIM5_LSI)||\

  530.                                       ((__TIM_REMAP__) == TIM_TIM5_LSE)||\

  531.                                       ((__TIM_REMAP__) == TIM_TIM5_RTC)||\

  532.                                       ((__TIM_REMAP__) == TIM_TIM11_GPIO)||\

  533.                                       ((__TIM_REMAP__) == TIM_TIM11_SPDIFRX)||\

  534.                                       ((__TIM_REMAP__) == TIM_TIM11_HSE)||\

  535.                                       ((__TIM_REMAP__) == TIM_TIM11_MCO1))

  536. #define IS_TIM_DEADTIME(__DEADTIME__)      ((__DEADTIME__) <= 0xFF)

  537. #define IS_TIM_BREAK_FILTER(__FILTER__) ((__FILTER__) <= 0xF)

  538. #define IS_TIM_CLEARINPUT_SOURCE(MODE) (((MODE) == TIM_CLEARINPUTSOURCE_ETR)      || \

  539.                                         ((MODE) == TIM_CLEARINPUTSOURCE_OCREFCLR)  || \

  540.                                         ((MODE) == TIM_CLEARINPUTSOURCE_NONE))

  541. #define IS_TIM_BREAK2_STATE(STATE) (((STATE) == TIM_BREAK2_ENABLE) || \

  542.                                     ((STATE) == TIM_BREAK2_DISABLE))

  543. #define IS_TIM_BREAK2_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAK2POLARITY_LOW) || \

  544.                                               ((__POLARITY__) == TIM_BREAK2POLARITY_HIGH))

  545. #define IS_TIM_GROUPCH5(OCREF) ((((OCREF) & 0x1FFFFFFF) == 0x00000000))

  546. #define IS_TIM_TRGO2_SOURCE(SOURCE) (((SOURCE) == TIM_TRGO2_RESET)                        || \

  547.                                      ((SOURCE) == TIM_TRGO2_ENABLE)                       || \

  548.                                      ((SOURCE) == TIM_TRGO2_UPDATE)                       || \

  549.                                      ((SOURCE) == TIM_TRGO2_OC1)                          || \

  550.                                      ((SOURCE) == TIM_TRGO2_OC1REF)                       || \

  551.                                      ((SOURCE) == TIM_TRGO2_OC2REF)                       || \

  552.                                      ((SOURCE) == TIM_TRGO2_OC3REF)                       || \

  553.                                      ((SOURCE) == TIM_TRGO2_OC3REF)                       || \

  554.                                      ((SOURCE) == TIM_TRGO2_OC4REF)                       || \

  555.                                      ((SOURCE) == TIM_TRGO2_OC5REF)                       || \

  556.                                      ((SOURCE) == TIM_TRGO2_OC6REF)                       || \

  557.                                      ((SOURCE) == TIM_TRGO2_OC4REF_RISINGFALLING)         || \

  558.                                      ((SOURCE) == TIM_TRGO2_OC6REF_RISINGFALLING)         || \

  559.                                      ((SOURCE) == TIM_TRGO2_OC4REF_RISING_OC6REF_RISING)  || \

  560.                                      ((SOURCE) == TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING) || \

  561.                                      ((SOURCE) == TIM_TRGO2_OC5REF_RISING_OC6REF_RISING)  || \

  562.                                      ((SOURCE) == TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING))

  563. #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SLAVEMODE_DISABLE)   || \

  564.                                  ((MODE) == TIM_SLAVEMODE_RESET)     || \

  565.                                  ((MODE) == TIM_SLAVEMODE_GATED)     || \

  566.                                  ((MODE) == TIM_SLAVEMODE_TRIGGER)   || \

  567.                                  ((MODE) == TIM_SLAVEMODE_EXTERNAL1) || \

  568.                                  ((MODE) == TIM_SLAVEMODE_COMBINED_RESETTRIGGER))

  569. 

  570. #if defined (STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx)

  571. #define IS_TIM_BREAKINPUT(__BREAKINPUT__)  (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK)  || \

  572.                                             ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2))

  573. 

  574. #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__)  (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN)  || \

  575.                                               ((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM))

  576. 

  577. #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__)  (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE)  || \

  578.                                                    ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE))

  579. 

  580. #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */

  581. /**

  582.   * @}

  583.   */

  584. 

  585. /* Private functions ---------------------------------------------------------*/

  586. /** @defgroup TIMEx_Private_Functions TIMEx Private Functions

  587.   * @{

  588.   */

  589. 

  590. /**

  591.   * @}

  592.   */

  593. 

  594. /**

  595.   * @}

  596.   */

  597. 

  598. /**

  599.   * @}

  600.   */

  601. 

  602. #ifdef __cplusplus

  603. }

  604. #endif

  605. 

  606. #endif /* __STM32F7xx_HAL_TIM_EX_H */

  607. 

  608. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/