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  1. /**
  2. ******************************************************************************
  3. * @file stm32f7xx_hal_can.h
  4. * @author MCD Application Team
  5. * @version V1.2.2
  6. * @date 14-April-2017
  7. * @brief Header file of CAN HAL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32F7xx_HAL_CAN_H
  39. #define __STM32F7xx_HAL_CAN_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. /* Includes ------------------------------------------------------------------*/
  44. #include "stm32f7xx_hal_def.h"
  45. /** @addtogroup STM32F7xx_HAL_Driver
  46. * @{
  47. */
  48. /** @addtogroup CAN
  49. * @{
  50. */
  51. /* Exported types ------------------------------------------------------------*/
  52. /** @defgroup CAN_Exported_Types CAN Exported Types
  53. * @{
  54. */
  55. /**
  56. * @brief HAL State structures definition
  57. */
  58. typedef enum
  59. {
  60. HAL_CAN_STATE_RESET = 0x00U, /*!< CAN not yet initialized or disabled */
  61. HAL_CAN_STATE_READY = 0x01U, /*!< CAN initialized and ready for use */
  62. HAL_CAN_STATE_BUSY = 0x02U, /*!< CAN process is ongoing */
  63. HAL_CAN_STATE_BUSY_TX = 0x12U, /*!< CAN process is ongoing */
  64. HAL_CAN_STATE_BUSY_RX0 = 0x22U, /*!< CAN process is ongoing */
  65. HAL_CAN_STATE_BUSY_RX1 = 0x32U, /*!< CAN process is ongoing */
  66. HAL_CAN_STATE_BUSY_TX_RX0 = 0x42U, /*!< CAN process is ongoing */
  67. HAL_CAN_STATE_BUSY_TX_RX1 = 0x52U, /*!< CAN process is ongoing */
  68. HAL_CAN_STATE_BUSY_RX0_RX1 = 0x62U, /*!< CAN process is ongoing */
  69. HAL_CAN_STATE_BUSY_TX_RX0_RX1 = 0x72U, /*!< CAN process is ongoing */
  70. HAL_CAN_STATE_TIMEOUT = 0x03U, /*!< CAN in Timeout state */
  71. HAL_CAN_STATE_ERROR = 0x04U /*!< CAN error state */
  72. }HAL_CAN_StateTypeDef;
  73. /**
  74. * @brief CAN init structure definition
  75. */
  76. typedef struct
  77. {
  78. uint32_t Prescaler; /*!< Specifies the length of a time quantum.
  79. This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */
  80. uint32_t Mode; /*!< Specifies the CAN operating mode.
  81. This parameter can be a value of @ref CAN_operating_mode */
  82. uint32_t SJW; /*!< Specifies the maximum number of time quanta
  83. the CAN hardware is allowed to lengthen or
  84. shorten a bit to perform resynchronization.
  85. This parameter can be a value of @ref CAN_synchronisation_jump_width */
  86. uint32_t BS1; /*!< Specifies the number of time quanta in Bit Segment 1.
  87. This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
  88. uint32_t BS2; /*!< Specifies the number of time quanta in Bit Segment 2.
  89. This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
  90. uint32_t TTCM; /*!< Enable or disable the time triggered communication mode.
  91. This parameter can be set to ENABLE or DISABLE. */
  92. uint32_t ABOM; /*!< Enable or disable the automatic bus-off management.
  93. This parameter can be set to ENABLE or DISABLE */
  94. uint32_t AWUM; /*!< Enable or disable the automatic wake-up mode.
  95. This parameter can be set to ENABLE or DISABLE */
  96. uint32_t NART; /*!< Enable or disable the non-automatic retransmission mode.
  97. This parameter can be set to ENABLE or DISABLE */
  98. uint32_t RFLM; /*!< Enable or disable the receive FIFO Locked mode.
  99. This parameter can be set to ENABLE or DISABLE */
  100. uint32_t TXFP; /*!< Enable or disable the transmit FIFO priority.
  101. This parameter can be set to ENABLE or DISABLE */
  102. }CAN_InitTypeDef;
  103. /**
  104. * @brief CAN filter configuration structure definition
  105. */
  106. typedef struct
  107. {
  108. uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit
  109. configuration, first one for a 16-bit configuration).
  110. This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
  111. uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit
  112. configuration, second one for a 16-bit configuration).
  113. This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
  114. uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number,
  115. according to the mode (MSBs for a 32-bit configuration,
  116. first one for a 16-bit configuration).
  117. This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
  118. uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number,
  119. according to the mode (LSBs for a 32-bit configuration,
  120. second one for a 16-bit configuration).
  121. This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
  122. uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter.
  123. This parameter can be a value of @ref CAN_filter_FIFO */
  124. uint32_t FilterNumber; /*!< Specifies the filter which will be initialized.
  125. This parameter must be a number between Min_Data = 0 and Max_Data = 27 */
  126. uint32_t FilterMode; /*!< Specifies the filter mode to be initialized.
  127. This parameter can be a value of @ref CAN_filter_mode */
  128. uint32_t FilterScale; /*!< Specifies the filter scale.
  129. This parameter can be a value of @ref CAN_filter_scale */
  130. uint32_t FilterActivation; /*!< Enable or disable the filter.
  131. This parameter can be set to ENABLE or DISABLE. */
  132. uint32_t BankNumber; /*!< Select the start slave bank filter.
  133. This parameter must be a number between Min_Data = 0 and Max_Data = 28 */
  134. }CAN_FilterConfTypeDef;
  135. /**
  136. * @brief CAN Tx message structure definition
  137. */
  138. typedef struct
  139. {
  140. uint32_t StdId; /*!< Specifies the standard identifier.
  141. This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
  142. uint32_t ExtId; /*!< Specifies the extended identifier.
  143. This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
  144. uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
  145. This parameter can be a value of @ref CAN_Identifier_Type */
  146. uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted.
  147. This parameter can be a value of @ref CAN_remote_transmission_request */
  148. uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted.
  149. This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
  150. uint8_t Data[8]; /*!< Contains the data to be transmitted.
  151. This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
  152. }CanTxMsgTypeDef;
  153. /**
  154. * @brief CAN Rx message structure definition
  155. */
  156. typedef struct
  157. {
  158. uint32_t StdId; /*!< Specifies the standard identifier.
  159. This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
  160. uint32_t ExtId; /*!< Specifies the extended identifier.
  161. This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
  162. uint32_t IDE; /*!< Specifies the type of identifier for the message that will be received.
  163. This parameter can be a value of @ref CAN_Identifier_Type */
  164. uint32_t RTR; /*!< Specifies the type of frame for the received message.
  165. This parameter can be a value of @ref CAN_remote_transmission_request */
  166. uint32_t DLC; /*!< Specifies the length of the frame that will be received.
  167. This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
  168. uint8_t Data[8]; /*!< Contains the data to be received.
  169. This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
  170. uint32_t FMI; /*!< Specifies the index of the filter the message stored in the mailbox passes through.
  171. This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
  172. uint32_t FIFONumber; /*!< Specifies the receive FIFO number.
  173. This parameter can be CAN_FIFO0 or CAN_FIFO1 */
  174. }CanRxMsgTypeDef;
  175. /**
  176. * @brief CAN handle Structure definition
  177. */
  178. typedef struct
  179. {
  180. CAN_TypeDef *Instance; /*!< Register base address */
  181. CAN_InitTypeDef Init; /*!< CAN required parameters */
  182. CanTxMsgTypeDef* pTxMsg; /*!< Pointer to transmit structure */
  183. CanRxMsgTypeDef* pRxMsg; /*!< Pointer to reception structure for RX FIFO0 msg */
  184. CanRxMsgTypeDef* pRx1Msg; /*!< Pointer to reception structure for RX FIFO1 msg */
  185. __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */
  186. HAL_LockTypeDef Lock; /*!< CAN locking object */
  187. __IO uint32_t ErrorCode; /*!< CAN Error code
  188. This parameter can be a value of @ref CAN_Error_Code */
  189. }CAN_HandleTypeDef;
  190. /**
  191. * @}
  192. */
  193. /* Exported constants --------------------------------------------------------*/
  194. /** @defgroup CAN_Exported_Constants CAN Exported Constants
  195. * @{
  196. */
  197. /** @defgroup CAN_Error_Code CAN Error Code
  198. * @{
  199. */
  200. #define HAL_CAN_ERROR_NONE 0x00000000U /*!< No error */
  201. #define HAL_CAN_ERROR_EWG 0x00000001U /*!< EWG error */
  202. #define HAL_CAN_ERROR_EPV 0x00000002U /*!< EPV error */
  203. #define HAL_CAN_ERROR_BOF 0x00000004U /*!< BOF error */
  204. #define HAL_CAN_ERROR_STF 0x00000008U /*!< Stuff error */
  205. #define HAL_CAN_ERROR_FOR 0x00000010U /*!< Form error */
  206. #define HAL_CAN_ERROR_ACK 0x00000020U /*!< Acknowledgment error */
  207. #define HAL_CAN_ERROR_BR 0x00000040U /*!< Bit recessive */
  208. #define HAL_CAN_ERROR_BD 0x00000080U /*!< LEC dominant */
  209. #define HAL_CAN_ERROR_CRC 0x00000100U /*!< LEC transfer error */
  210. #define HAL_CAN_ERROR_FOV0 0x00000200U /*!< FIFO0 overrun error */
  211. #define HAL_CAN_ERROR_FOV1 0x00000400U /*!< FIFO1 overrun error */
  212. #define HAL_CAN_ERROR_TXFAIL 0x00000800U /*!< Transmit failure */
  213. /**
  214. * @}
  215. */
  216. /** @defgroup CAN_InitStatus CAN InitStatus
  217. * @{
  218. */
  219. #define CAN_INITSTATUS_FAILED ((uint8_t)0x00U) /*!< CAN initialization failed */
  220. #define CAN_INITSTATUS_SUCCESS ((uint8_t)0x01U) /*!< CAN initialization OK */
  221. /**
  222. * @}
  223. */
  224. /** @defgroup CAN_operating_mode CAN Operating Mode
  225. * @{
  226. */
  227. #define CAN_MODE_NORMAL ((uint32_t)0x00000000U) /*!< Normal mode */
  228. #define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */
  229. #define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */
  230. #define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */
  231. /**
  232. * @}
  233. */
  234. /** @defgroup CAN_synchronisation_jump_width CAN Synchronisation Jump Width
  235. * @{
  236. */
  237. #define CAN_SJW_1TQ ((uint32_t)0x00000000U) /*!< 1 time quantum */
  238. #define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */
  239. #define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */
  240. #define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */
  241. /**
  242. * @}
  243. */
  244. /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in bit segment 1
  245. * @{
  246. */
  247. #define CAN_BS1_1TQ ((uint32_t)0x00000000U) /*!< 1 time quantum */
  248. #define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */
  249. #define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */
  250. #define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */
  251. #define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */
  252. #define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */
  253. #define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */
  254. #define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */
  255. #define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */
  256. #define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */
  257. #define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */
  258. #define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */
  259. #define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */
  260. #define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */
  261. #define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */
  262. #define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */
  263. /**
  264. * @}
  265. */
  266. /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in bit segment 2
  267. * @{
  268. */
  269. #define CAN_BS2_1TQ ((uint32_t)0x00000000U) /*!< 1 time quantum */
  270. #define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */
  271. #define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */
  272. #define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */
  273. #define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */
  274. #define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */
  275. #define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */
  276. #define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */
  277. /**
  278. * @}
  279. */
  280. /** @defgroup CAN_filter_mode CAN Filter Mode
  281. * @{
  282. */
  283. #define CAN_FILTERMODE_IDMASK ((uint8_t)0x00U) /*!< Identifier mask mode */
  284. #define CAN_FILTERMODE_IDLIST ((uint8_t)0x01U) /*!< Identifier list mode */
  285. /**
  286. * @}
  287. */
  288. /** @defgroup CAN_filter_scale CAN Filter Scale
  289. * @{
  290. */
  291. #define CAN_FILTERSCALE_16BIT ((uint8_t)0x00U) /*!< Two 16-bit filters */
  292. #define CAN_FILTERSCALE_32BIT ((uint8_t)0x01U) /*!< One 32-bit filter */
  293. /**
  294. * @}
  295. */
  296. /** @defgroup CAN_filter_FIFO CAN Filter FIFO
  297. * @{
  298. */
  299. #define CAN_FILTER_FIFO0 ((uint8_t)0x00U) /*!< Filter FIFO 0 assignment for filter x */
  300. #define CAN_FILTER_FIFO1 ((uint8_t)0x01U) /*!< Filter FIFO 1 assignment for filter x */
  301. /**
  302. * @}
  303. */
  304. /** @defgroup CAN_Identifier_Type CAN Identifier Type
  305. * @{
  306. */
  307. #define CAN_ID_STD ((uint32_t)0x00000000U) /*!< Standard Id */
  308. #define CAN_ID_EXT ((uint32_t)0x00000004U) /*!< Extended Id */
  309. /**
  310. * @}
  311. */
  312. /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request
  313. * @{
  314. */
  315. #define CAN_RTR_DATA ((uint32_t)0x00000000U) /*!< Data frame */
  316. #define CAN_RTR_REMOTE ((uint32_t)0x00000002U) /*!< Remote frame */
  317. /**
  318. * @}
  319. */
  320. /** @defgroup CAN_receive_FIFO_number_constants CAN Receive FIFO Number Constants
  321. * @{
  322. */
  323. #define CAN_FIFO0 ((uint8_t)0x00U) /*!< CAN FIFO 0 used to receive */
  324. #define CAN_FIFO1 ((uint8_t)0x01U) /*!< CAN FIFO 1 used to receive */
  325. /**
  326. * @}
  327. */
  328. /** @defgroup CAN_flags CAN Flags
  329. * @{
  330. */
  331. /* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus()
  332. and CAN_ClearFlag() functions. */
  333. /* If the flag is 0x1XXXXXXX, it means that it can only be used with
  334. CAN_GetFlagStatus() function. */
  335. /* Transmit Flags */
  336. #define CAN_FLAG_RQCP0 ((uint32_t)0x00000500U) /*!< Request MailBox0 flag */
  337. #define CAN_FLAG_RQCP1 ((uint32_t)0x00000508U) /*!< Request MailBox1 flag */
  338. #define CAN_FLAG_RQCP2 ((uint32_t)0x00000510U) /*!< Request MailBox2 flag */
  339. #define CAN_FLAG_TXOK0 ((uint32_t)0x00000501U) /*!< Transmission OK MailBox0 flag */
  340. #define CAN_FLAG_TXOK1 ((uint32_t)0x00000509U) /*!< Transmission OK MailBox1 flag */
  341. #define CAN_FLAG_TXOK2 ((uint32_t)0x00000511U) /*!< Transmission OK MailBox2 flag */
  342. #define CAN_FLAG_TME0 ((uint32_t)0x0000051AU) /*!< Transmit mailbox 0 empty flag */
  343. #define CAN_FLAG_TME1 ((uint32_t)0x0000051BU) /*!< Transmit mailbox 0 empty flag */
  344. #define CAN_FLAG_TME2 ((uint32_t)0x0000051CU) /*!< Transmit mailbox 0 empty flag */
  345. /* Receive Flags */
  346. #define CAN_FLAG_FF0 ((uint32_t)0x00000203U) /*!< FIFO 0 Full flag */
  347. #define CAN_FLAG_FOV0 ((uint32_t)0x00000204U) /*!< FIFO 0 Overrun flag */
  348. #define CAN_FLAG_FF1 ((uint32_t)0x00000403U) /*!< FIFO 1 Full flag */
  349. #define CAN_FLAG_FOV1 ((uint32_t)0x00000404U) /*!< FIFO 1 Overrun flag */
  350. /* Operating Mode Flags */
  351. #define CAN_FLAG_INAK ((uint32_t)0x00000100U) /*!< Initialization acknowledge flag */
  352. #define CAN_FLAG_SLAK ((uint32_t)0x00000101U) /*!< Sleep acknowledge flag */
  353. #define CAN_FLAG_ERRI ((uint32_t)0x00000102U) /*!< Error flag */
  354. #define CAN_FLAG_WKU ((uint32_t)0x00000103U) /*!< Wake up flag */
  355. #define CAN_FLAG_SLAKI ((uint32_t)0x00000104U) /*!< Sleep acknowledge flag */
  356. /* @note When SLAK interrupt is disabled (SLKIE=0), no polling on SLAKI is possible.
  357. In this case the SLAK bit can be polled.*/
  358. /* Error Flags */
  359. #define CAN_FLAG_EWG ((uint32_t)0x00000300U) /*!< Error warning flag */
  360. #define CAN_FLAG_EPV ((uint32_t)0x00000301U) /*!< Error passive flag */
  361. #define CAN_FLAG_BOF ((uint32_t)0x00000302U) /*!< Bus-Off flag */
  362. /**
  363. * @}
  364. */
  365. /** @defgroup CAN_Interrupts CAN Interrupts
  366. * @{
  367. */
  368. #define CAN_IT_TME ((uint32_t)CAN_IER_TMEIE) /*!< Transmit mailbox empty interrupt */
  369. /* Receive Interrupts */
  370. #define CAN_IT_FMP0 ((uint32_t)CAN_IER_FMPIE0) /*!< FIFO 0 message pending interrupt */
  371. #define CAN_IT_FF0 ((uint32_t)CAN_IER_FFIE0) /*!< FIFO 0 full interrupt */
  372. #define CAN_IT_FOV0 ((uint32_t)CAN_IER_FOVIE0) /*!< FIFO 0 overrun interrupt */
  373. #define CAN_IT_FMP1 ((uint32_t)CAN_IER_FMPIE1) /*!< FIFO 1 message pending interrupt */
  374. #define CAN_IT_FF1 ((uint32_t)CAN_IER_FFIE1) /*!< FIFO 1 full interrupt */
  375. #define CAN_IT_FOV1 ((uint32_t)CAN_IER_FOVIE1) /*!< FIFO 1 overrun interrupt */
  376. /* Operating Mode Interrupts */
  377. #define CAN_IT_WKU ((uint32_t)CAN_IER_WKUIE) /*!< Wake-up interrupt */
  378. #define CAN_IT_SLK ((uint32_t)CAN_IER_SLKIE) /*!< Sleep acknowledge interrupt */
  379. /* Error Interrupts */
  380. #define CAN_IT_EWG ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt */
  381. #define CAN_IT_EPV ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt */
  382. #define CAN_IT_BOF ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt */
  383. #define CAN_IT_LEC ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */
  384. #define CAN_IT_ERR ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt */
  385. /**
  386. * @}
  387. */
  388. /** @defgroup CAN_Mailboxes_Definition CAN Mailboxes Definition
  389. * @{
  390. */
  391. #define CAN_TXMAILBOX_0 ((uint8_t)0x00U)
  392. #define CAN_TXMAILBOX_1 ((uint8_t)0x01U)
  393. #define CAN_TXMAILBOX_2 ((uint8_t)0x02U)
  394. /**
  395. * @}
  396. */
  397. /**
  398. * @}
  399. */
  400. /* Exported macro ------------------------------------------------------------*/
  401. /** @defgroup CAN_Exported_Macros CAN Exported Macros
  402. * @{
  403. */
  404. /** @brief Reset CAN handle state
  405. * @param __HANDLE__: specifies the CAN Handle.
  406. * @retval None
  407. */
  408. #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
  409. /**
  410. * @brief Enable the specified CAN interrupts.
  411. * @param __HANDLE__: CAN handle
  412. * @param __INTERRUPT__: CAN Interrupt
  413. * @retval None
  414. */
  415. #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
  416. /**
  417. * @brief Disable the specified CAN interrupts.
  418. * @param __HANDLE__: CAN handle
  419. * @param __INTERRUPT__: CAN Interrupt
  420. * @retval None
  421. */
  422. #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
  423. /**
  424. * @brief Return the number of pending received messages.
  425. * @param __HANDLE__: CAN handle
  426. * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
  427. * @retval The number of pending message.
  428. */
  429. #define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
  430. ((uint8_t)((__HANDLE__)->Instance->RF0R&(uint32_t)0x03)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&(uint32_t)0x03)))
  431. /** @brief Check whether the specified CAN flag is set or not.
  432. * @param __HANDLE__: CAN Handle
  433. * @param __FLAG__: specifies the flag to check.
  434. * This parameter can be one of the following values:
  435. * @arg CAN_TSR_RQCP0: Request MailBox0 Flag
  436. * @arg CAN_TSR_RQCP1: Request MailBox1 Flag
  437. * @arg CAN_TSR_RQCP2: Request MailBox2 Flag
  438. * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
  439. * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
  440. * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
  441. * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
  442. * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
  443. * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
  444. * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
  445. * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
  446. * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
  447. * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
  448. * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
  449. * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
  450. * @arg CAN_FLAG_WKU: Wake up Flag
  451. * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
  452. * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
  453. * @arg CAN_FLAG_EWG: Error Warning Flag
  454. * @arg CAN_FLAG_EPV: Error Passive Flag
  455. * @arg CAN_FLAG_BOF: Bus-Off Flag
  456. * @retval The new state of __FLAG__ (TRUE or FALSE).
  457. */
  458. #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
  459. ((((__FLAG__) >> 8) == 5)? ((((__HANDLE__)->Instance->TSR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
  460. (((__FLAG__) >> 8) == 2)? ((((__HANDLE__)->Instance->RF0R) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
  461. (((__FLAG__) >> 8) == 4)? ((((__HANDLE__)->Instance->RF1R) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
  462. (((__FLAG__) >> 8) == 1)? ((((__HANDLE__)->Instance->MSR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
  463. ((((__HANDLE__)->Instance->ESR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))))
  464. /** @brief Clear the specified CAN pending flag.
  465. * @param __HANDLE__: CAN Handle.
  466. * @param __FLAG__: specifies the flag to check.
  467. * This parameter can be one of the following values:
  468. * @arg CAN_TSR_RQCP0: Request MailBox0 Flag
  469. * @arg CAN_TSR_RQCP1: Request MailBox1 Flag
  470. * @arg CAN_TSR_RQCP2: Request MailBox2 Flag
  471. * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
  472. * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
  473. * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
  474. * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
  475. * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
  476. * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
  477. * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
  478. * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
  479. * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
  480. * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
  481. * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
  482. * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
  483. * @arg CAN_FLAG_WKU: Wake up Flag
  484. * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
  485. * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
  486. * @retval The new state of __FLAG__ (TRUE or FALSE).
  487. */
  488. #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
  489. ((((__FLAG__) >> 8) == 5)? (((__HANDLE__)->Instance->TSR) = ((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
  490. (((__FLAG__) >> 8) == 2)? (((__HANDLE__)->Instance->RF0R) = ((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
  491. (((__FLAG__) >> 8) == 4)? (((__HANDLE__)->Instance->RF1R) = ((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
  492. (((__HANDLE__)->Instance->MSR) = ((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))))
  493. /** @brief Check if the specified CAN interrupt source is enabled or disabled.
  494. * @param __HANDLE__: CAN Handle
  495. * @param __INTERRUPT__: specifies the CAN interrupt source to check.
  496. * This parameter can be one of the following values:
  497. * @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
  498. * @arg CAN_IT_FMP0: FIFO0 message pending interrupt enable
  499. * @arg CAN_IT_FMP1: FIFO1 message pending interrupt enable
  500. * @retval The new state of __IT__ (TRUE or FALSE).
  501. */
  502. #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
  503. /**
  504. * @brief Check the transmission status of a CAN Frame.
  505. * @param __HANDLE__: CAN Handle
  506. * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
  507. * @retval The new status of transmission (TRUE or FALSE).
  508. */
  509. #define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\
  510. (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) :\
  511. ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) :\
  512. ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)))
  513. /**
  514. * @brief Release the specified receive FIFO.
  515. * @param __HANDLE__: CAN handle
  516. * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
  517. * @retval None
  518. */
  519. #define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
  520. ((__HANDLE__)->Instance->RF0R = CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R = CAN_RF1R_RFOM1))
  521. /**
  522. * @brief Cancel a transmit request.
  523. * @param __HANDLE__: CAN Handle
  524. * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
  525. * @retval None
  526. */
  527. #define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\
  528. (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ0) :\
  529. ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ1) :\
  530. ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ2))
  531. /**
  532. * @brief Enable or disable the DBG Freeze for CAN.
  533. * @param __HANDLE__: CAN Handle
  534. * @param __NEWSTATE__: new state of the CAN peripheral.
  535. * This parameter can be: ENABLE (CAN reception/transmission is frozen
  536. * during debug. Reception FIFOs can still be accessed/controlled normally)
  537. * or DISABLE (CAN is working during debug).
  538. * @retval None
  539. */
  540. #define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \
  541. ((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF))
  542. /**
  543. * @}
  544. */
  545. /* Exported functions --------------------------------------------------------*/
  546. /** @addtogroup CAN_Exported_Functions
  547. * @{
  548. */
  549. /** @addtogroup CAN_Exported_Functions_Group1
  550. * @{
  551. */
  552. /* Initialization/de-initialization functions ***********************************/
  553. HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan);
  554. HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig);
  555. HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan);
  556. void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan);
  557. void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan);
  558. /**
  559. * @}
  560. */
  561. /** @addtogroup CAN_Exported_Functions_Group2
  562. * @{
  563. */
  564. /* I/O operation functions ******************************************************/
  565. HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout);
  566. HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan);
  567. HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout);
  568. HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber);
  569. HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan);
  570. HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
  571. void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan);
  572. void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan);
  573. void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan);
  574. void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
  575. /**
  576. * @}
  577. */
  578. /** @addtogroup CAN_Exported_Functions_Group3
  579. * @{
  580. */
  581. /* Peripheral State functions ***************************************************/
  582. uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
  583. HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan);
  584. /**
  585. * @}
  586. */
  587. /**
  588. * @}
  589. */
  590. /* Private types -------------------------------------------------------------*/
  591. /** @defgroup CAN_Private_Types CAN Private Types
  592. * @{
  593. */
  594. /**
  595. * @}
  596. */
  597. /* Private variables ---------------------------------------------------------*/
  598. /** @defgroup CAN_Private_Variables CAN Private Variables
  599. * @{
  600. */
  601. /**
  602. * @}
  603. */
  604. /* Private constants ---------------------------------------------------------*/
  605. /** @defgroup CAN_Private_Constants CAN Private Constants
  606. * @{
  607. */
  608. #define CAN_TXSTATUS_NOMAILBOX ((uint8_t)0x04U) /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */
  609. #define CAN_FLAG_MASK ((uint32_t)0x000000FFU)
  610. /**
  611. * @}
  612. */
  613. /* Private macros ------------------------------------------------------------*/
  614. /** @defgroup CAN_Private_Macros CAN Private Macros
  615. * @{
  616. */
  617. #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \
  618. ((MODE) == CAN_MODE_LOOPBACK)|| \
  619. ((MODE) == CAN_MODE_SILENT) || \
  620. ((MODE) == CAN_MODE_SILENT_LOOPBACK))
  621. #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \
  622. ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ))
  623. #define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ)
  624. #define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ)
  625. #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024))
  626. #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27)
  627. #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
  628. ((MODE) == CAN_FILTERMODE_IDLIST))
  629. #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \
  630. ((SCALE) == CAN_FILTERSCALE_32BIT))
  631. #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \
  632. ((FIFO) == CAN_FILTER_FIFO1))
  633. #define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28)
  634. #define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02))
  635. #define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FF))
  636. #define IS_CAN_EXTID(EXTID) ((EXTID) <= ((uint32_t)0x1FFFFFFF))
  637. #define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08))
  638. #define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \
  639. ((IDTYPE) == CAN_ID_EXT))
  640. #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
  641. #define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1))
  642. /**
  643. * @}
  644. */
  645. /* Private functions ---------------------------------------------------------*/
  646. /** @defgroup CAN_Private_Functions CAN Private Functions
  647. * @{
  648. */
  649. /**
  650. * @}
  651. */
  652. /**
  653. * @}
  654. */
  655. /**
  656. * @}
  657. */
  658. #ifdef __cplusplus
  659. }
  660. #endif
  661. #endif /* __STM32F7xx_CAN_H */
  662. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/