The existing HAL code had two issues:

- It used < instead of <= to compare INEPTFSAV with len32b, which meant
  that data would not be written to the FIFO if there was exactly enough
  room for the packet (it would require enough room plus one additional
  FIFO slot).  So for IN endpoints that had a FIFO size the same as the
  maximum packet size, packets of maximum size could never be written.

- If the write loop went around again it would use the old len32b to check
  if there was enough space, thereby missing some opportunities to write
  packets that were smaller than the previous len32b.

This patch fixes these two issues.

Previous to this patch the DMA was set-up and then the I2C address sent.
If the I2C address sending failed (eg no I2C device on the bus) then the
DMA was left in an inconsistent state.

This patch moves the DMA setup to after a successful sending of the I2C
address(es).

Instead of calling DMA_Init to set up everything it's possible sometimes to
just call DMA_CalcBaseAndBitshift, so make the latter public.