Implement a secure ICS protocol targeting LoRa Node151 microcontroller for controlling irrigation.
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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_hal_dma.c
  4. * @author MCD Application Team
  5. * @brief DMA HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the Direct Memory Access (DMA) peripheral:
  8. * + Initialization and de-initialization functions
  9. * + IO operation functions
  10. * + Peripheral State and errors functions
  11. @verbatim
  12. ==============================================================================
  13. ##### How to use this driver #####
  14. ==============================================================================
  15. [..]
  16. (#) Enable and configure the peripheral to be connected to the DMA Channel
  17. (except for internal SRAM / FLASH memories: no initialization is
  18. necessary). Please refer to the Reference manual for connection between peripherals
  19. and DMA requests.
  20. (#) For a given Channel, program the required configuration through the following parameters:
  21. Channel request, Transfer Direction, Source and Destination data formats,
  22. Circular or Normal mode, Channel Priority level, Source and Destination Increment mode
  23. using HAL_DMA_Init() function.
  24. (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error
  25. detection.
  26. (#) Use HAL_DMA_Abort() function to abort the current transfer
  27. -@- In Memory-to-Memory transfer mode, Circular mode is not allowed.
  28. *** Polling mode IO operation ***
  29. =================================
  30. [..]
  31. (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source
  32. address and destination address and the Length of data to be transferred
  33. (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this
  34. case a fixed Timeout can be configured by User depending from his application.
  35. *** Interrupt mode IO operation ***
  36. ===================================
  37. [..]
  38. (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
  39. (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()
  40. (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of
  41. Source address and destination address and the Length of data to be transferred.
  42. In this case the DMA interrupt is configured
  43. (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
  44. (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can
  45. add his own function by customization of function pointer XferCpltCallback and
  46. XferErrorCallback (i.e. a member of DMA handle structure).
  47. *** DMA HAL driver macros list ***
  48. =============================================
  49. [..]
  50. Below the list of most used macros in DMA HAL driver.
  51. (+) __HAL_DMA_ENABLE: Enable the specified DMA Channel.
  52. (+) __HAL_DMA_DISABLE: Disable the specified DMA Channel.
  53. (+) __HAL_DMA_GET_FLAG: Get the DMA Channel pending flags.
  54. (+) __HAL_DMA_CLEAR_FLAG: Clear the DMA Channel pending flags.
  55. (+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Channel interrupts.
  56. (+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Channel interrupts.
  57. (+) __HAL_DMA_GET_IT_SOURCE: Check whether the specified DMA Channel interrupt has occurred or not.
  58. [..]
  59. (@) You can refer to the DMA HAL driver header file for more useful macros
  60. @endverbatim
  61. ******************************************************************************
  62. * @attention
  63. *
  64. * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  65. * All rights reserved.</center></h2>
  66. *
  67. * This software component is licensed by ST under BSD 3-Clause license,
  68. * the "License"; You may not use this file except in compliance with the
  69. * License. You may obtain a copy of the License at:
  70. * opensource.org/licenses/BSD-3-Clause
  71. *
  72. ******************************************************************************
  73. */
  74. /* Includes ------------------------------------------------------------------*/
  75. #include "stm32f1xx_hal.h"
  76. /** @addtogroup STM32F1xx_HAL_Driver
  77. * @{
  78. */
  79. /** @defgroup DMA DMA
  80. * @brief DMA HAL module driver
  81. * @{
  82. */
  83. #ifdef HAL_DMA_MODULE_ENABLED
  84. /* Private typedef -----------------------------------------------------------*/
  85. /* Private define ------------------------------------------------------------*/
  86. /* Private macro -------------------------------------------------------------*/
  87. /* Private variables ---------------------------------------------------------*/
  88. /* Private function prototypes -----------------------------------------------*/
  89. /** @defgroup DMA_Private_Functions DMA Private Functions
  90. * @{
  91. */
  92. static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
  93. /**
  94. * @}
  95. */
  96. /* Exported functions ---------------------------------------------------------*/
  97. /** @defgroup DMA_Exported_Functions DMA Exported Functions
  98. * @{
  99. */
  100. /** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
  101. * @brief Initialization and de-initialization functions
  102. *
  103. @verbatim
  104. ===============================================================================
  105. ##### Initialization and de-initialization functions #####
  106. ===============================================================================
  107. [..]
  108. This section provides functions allowing to initialize the DMA Channel source
  109. and destination addresses, incrementation and data sizes, transfer direction,
  110. circular/normal mode selection, memory-to-memory mode selection and Channel priority value.
  111. [..]
  112. The HAL_DMA_Init() function follows the DMA configuration procedures as described in
  113. reference manual.
  114. @endverbatim
  115. * @{
  116. */
  117. /**
  118. * @brief Initialize the DMA according to the specified
  119. * parameters in the DMA_InitTypeDef and initialize the associated handle.
  120. * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
  121. * the configuration information for the specified DMA Channel.
  122. * @retval HAL status
  123. */
  124. HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
  125. {
  126. uint32_t tmp = 0U;
  127. /* Check the DMA handle allocation */
  128. if(hdma == NULL)
  129. {
  130. return HAL_ERROR;
  131. }
  132. /* Check the parameters */
  133. assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
  134. assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
  135. assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
  136. assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
  137. assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
  138. assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
  139. assert_param(IS_DMA_MODE(hdma->Init.Mode));
  140. assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
  141. #if defined (DMA2)
  142. /* calculation of the channel index */
  143. if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
  144. {
  145. /* DMA1 */
  146. hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
  147. hdma->DmaBaseAddress = DMA1;
  148. }
  149. else
  150. {
  151. /* DMA2 */
  152. hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
  153. hdma->DmaBaseAddress = DMA2;
  154. }
  155. #else
  156. /* DMA1 */
  157. hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
  158. hdma->DmaBaseAddress = DMA1;
  159. #endif /* DMA2 */
  160. /* Change DMA peripheral state */
  161. hdma->State = HAL_DMA_STATE_BUSY;
  162. /* Get the CR register value */
  163. tmp = hdma->Instance->CCR;
  164. /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */
  165. tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \
  166. DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \
  167. DMA_CCR_DIR));
  168. /* Prepare the DMA Channel configuration */
  169. tmp |= hdma->Init.Direction |
  170. hdma->Init.PeriphInc | hdma->Init.MemInc |
  171. hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
  172. hdma->Init.Mode | hdma->Init.Priority;
  173. /* Write to DMA Channel CR register */
  174. hdma->Instance->CCR = tmp;
  175. /* Initialise the error code */
  176. hdma->ErrorCode = HAL_DMA_ERROR_NONE;
  177. /* Initialize the DMA state*/
  178. hdma->State = HAL_DMA_STATE_READY;
  179. /* Allocate lock resource and initialize it */
  180. hdma->Lock = HAL_UNLOCKED;
  181. return HAL_OK;
  182. }
  183. /**
  184. * @brief DeInitialize the DMA peripheral.
  185. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  186. * the configuration information for the specified DMA Channel.
  187. * @retval HAL status
  188. */
  189. HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
  190. {
  191. /* Check the DMA handle allocation */
  192. if(hdma == NULL)
  193. {
  194. return HAL_ERROR;
  195. }
  196. /* Check the parameters */
  197. assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
  198. /* Disable the selected DMA Channelx */
  199. __HAL_DMA_DISABLE(hdma);
  200. /* Reset DMA Channel control register */
  201. hdma->Instance->CCR = 0U;
  202. /* Reset DMA Channel Number of Data to Transfer register */
  203. hdma->Instance->CNDTR = 0U;
  204. /* Reset DMA Channel peripheral address register */
  205. hdma->Instance->CPAR = 0U;
  206. /* Reset DMA Channel memory address register */
  207. hdma->Instance->CMAR = 0U;
  208. #if defined (DMA2)
  209. /* calculation of the channel index */
  210. if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
  211. {
  212. /* DMA1 */
  213. hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
  214. hdma->DmaBaseAddress = DMA1;
  215. }
  216. else
  217. {
  218. /* DMA2 */
  219. hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
  220. hdma->DmaBaseAddress = DMA2;
  221. }
  222. #else
  223. /* DMA1 */
  224. hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
  225. hdma->DmaBaseAddress = DMA1;
  226. #endif /* DMA2 */
  227. /* Clear all flags */
  228. hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex));
  229. /* Clean all callbacks */
  230. hdma->XferCpltCallback = NULL;
  231. hdma->XferHalfCpltCallback = NULL;
  232. hdma->XferErrorCallback = NULL;
  233. hdma->XferAbortCallback = NULL;
  234. /* Reset the error code */
  235. hdma->ErrorCode = HAL_DMA_ERROR_NONE;
  236. /* Reset the DMA state */
  237. hdma->State = HAL_DMA_STATE_RESET;
  238. /* Release Lock */
  239. __HAL_UNLOCK(hdma);
  240. return HAL_OK;
  241. }
  242. /**
  243. * @}
  244. */
  245. /** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions
  246. * @brief Input and Output operation functions
  247. *
  248. @verbatim
  249. ===============================================================================
  250. ##### IO operation functions #####
  251. ===============================================================================
  252. [..] This section provides functions allowing to:
  253. (+) Configure the source, destination address and data length and Start DMA transfer
  254. (+) Configure the source, destination address and data length and
  255. Start DMA transfer with interrupt
  256. (+) Abort DMA transfer
  257. (+) Poll for transfer complete
  258. (+) Handle DMA interrupt request
  259. @endverbatim
  260. * @{
  261. */
  262. /**
  263. * @brief Start the DMA Transfer.
  264. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  265. * the configuration information for the specified DMA Channel.
  266. * @param SrcAddress: The source memory Buffer address
  267. * @param DstAddress: The destination memory Buffer address
  268. * @param DataLength: The length of data to be transferred from source to destination
  269. * @retval HAL status
  270. */
  271. HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
  272. {
  273. HAL_StatusTypeDef status = HAL_OK;
  274. /* Check the parameters */
  275. assert_param(IS_DMA_BUFFER_SIZE(DataLength));
  276. /* Process locked */
  277. __HAL_LOCK(hdma);
  278. if(HAL_DMA_STATE_READY == hdma->State)
  279. {
  280. /* Change DMA peripheral state */
  281. hdma->State = HAL_DMA_STATE_BUSY;
  282. hdma->ErrorCode = HAL_DMA_ERROR_NONE;
  283. /* Disable the peripheral */
  284. __HAL_DMA_DISABLE(hdma);
  285. /* Configure the source, destination address and the data length & clear flags*/
  286. DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
  287. /* Enable the Peripheral */
  288. __HAL_DMA_ENABLE(hdma);
  289. }
  290. else
  291. {
  292. /* Process Unlocked */
  293. __HAL_UNLOCK(hdma);
  294. status = HAL_BUSY;
  295. }
  296. return status;
  297. }
  298. /**
  299. * @brief Start the DMA Transfer with interrupt enabled.
  300. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  301. * the configuration information for the specified DMA Channel.
  302. * @param SrcAddress: The source memory Buffer address
  303. * @param DstAddress: The destination memory Buffer address
  304. * @param DataLength: The length of data to be transferred from source to destination
  305. * @retval HAL status
  306. */
  307. HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
  308. {
  309. HAL_StatusTypeDef status = HAL_OK;
  310. /* Check the parameters */
  311. assert_param(IS_DMA_BUFFER_SIZE(DataLength));
  312. /* Process locked */
  313. __HAL_LOCK(hdma);
  314. if(HAL_DMA_STATE_READY == hdma->State)
  315. {
  316. /* Change DMA peripheral state */
  317. hdma->State = HAL_DMA_STATE_BUSY;
  318. hdma->ErrorCode = HAL_DMA_ERROR_NONE;
  319. /* Disable the peripheral */
  320. __HAL_DMA_DISABLE(hdma);
  321. /* Configure the source, destination address and the data length & clear flags*/
  322. DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
  323. /* Enable the transfer complete interrupt */
  324. /* Enable the transfer Error interrupt */
  325. if(NULL != hdma->XferHalfCpltCallback)
  326. {
  327. /* Enable the Half transfer complete interrupt as well */
  328. __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
  329. }
  330. else
  331. {
  332. __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
  333. __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
  334. }
  335. /* Enable the Peripheral */
  336. __HAL_DMA_ENABLE(hdma);
  337. }
  338. else
  339. {
  340. /* Process Unlocked */
  341. __HAL_UNLOCK(hdma);
  342. /* Remain BUSY */
  343. status = HAL_BUSY;
  344. }
  345. return status;
  346. }
  347. /**
  348. * @brief Abort the DMA Transfer.
  349. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  350. * the configuration information for the specified DMA Channel.
  351. * @retval HAL status
  352. */
  353. HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
  354. {
  355. HAL_StatusTypeDef status = HAL_OK;
  356. if(hdma->State != HAL_DMA_STATE_BUSY)
  357. {
  358. /* no transfer ongoing */
  359. hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
  360. /* Process Unlocked */
  361. __HAL_UNLOCK(hdma);
  362. return HAL_ERROR;
  363. }
  364. else
  365. {
  366. /* Disable DMA IT */
  367. __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
  368. /* Disable the channel */
  369. __HAL_DMA_DISABLE(hdma);
  370. /* Clear all flags */
  371. hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
  372. }
  373. /* Change the DMA state */
  374. hdma->State = HAL_DMA_STATE_READY;
  375. /* Process Unlocked */
  376. __HAL_UNLOCK(hdma);
  377. return status;
  378. }
  379. /**
  380. * @brief Aborts the DMA Transfer in Interrupt mode.
  381. * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
  382. * the configuration information for the specified DMA Channel.
  383. * @retval HAL status
  384. */
  385. HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
  386. {
  387. HAL_StatusTypeDef status = HAL_OK;
  388. if(HAL_DMA_STATE_BUSY != hdma->State)
  389. {
  390. /* no transfer ongoing */
  391. hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
  392. status = HAL_ERROR;
  393. }
  394. else
  395. {
  396. /* Disable DMA IT */
  397. __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
  398. /* Disable the channel */
  399. __HAL_DMA_DISABLE(hdma);
  400. /* Clear all flags */
  401. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
  402. /* Change the DMA state */
  403. hdma->State = HAL_DMA_STATE_READY;
  404. /* Process Unlocked */
  405. __HAL_UNLOCK(hdma);
  406. /* Call User Abort callback */
  407. if(hdma->XferAbortCallback != NULL)
  408. {
  409. hdma->XferAbortCallback(hdma);
  410. }
  411. }
  412. return status;
  413. }
  414. /**
  415. * @brief Polling for transfer complete.
  416. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  417. * the configuration information for the specified DMA Channel.
  418. * @param CompleteLevel: Specifies the DMA level complete.
  419. * @param Timeout: Timeout duration.
  420. * @retval HAL status
  421. */
  422. HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout)
  423. {
  424. uint32_t temp;
  425. uint32_t tickstart = 0U;
  426. if(HAL_DMA_STATE_BUSY != hdma->State)
  427. {
  428. /* no transfer ongoing */
  429. hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
  430. __HAL_UNLOCK(hdma);
  431. return HAL_ERROR;
  432. }
  433. /* Polling mode not supported in circular mode */
  434. if (RESET != (hdma->Instance->CCR & DMA_CCR_CIRC))
  435. {
  436. hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
  437. return HAL_ERROR;
  438. }
  439. /* Get the level transfer complete flag */
  440. if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
  441. {
  442. /* Transfer Complete flag */
  443. temp = __HAL_DMA_GET_TC_FLAG_INDEX(hdma);
  444. }
  445. else
  446. {
  447. /* Half Transfer Complete flag */
  448. temp = __HAL_DMA_GET_HT_FLAG_INDEX(hdma);
  449. }
  450. /* Get tick */
  451. tickstart = HAL_GetTick();
  452. while(__HAL_DMA_GET_FLAG(hdma, temp) == RESET)
  453. {
  454. if((__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET))
  455. {
  456. /* When a DMA transfer error occurs */
  457. /* A hardware clear of its EN bits is performed */
  458. /* Clear all flags */
  459. hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
  460. /* Update error code */
  461. SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TE);
  462. /* Change the DMA state */
  463. hdma->State= HAL_DMA_STATE_READY;
  464. /* Process Unlocked */
  465. __HAL_UNLOCK(hdma);
  466. return HAL_ERROR;
  467. }
  468. /* Check for the Timeout */
  469. if(Timeout != HAL_MAX_DELAY)
  470. {
  471. if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
  472. {
  473. /* Update error code */
  474. SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TIMEOUT);
  475. /* Change the DMA state */
  476. hdma->State = HAL_DMA_STATE_READY;
  477. /* Process Unlocked */
  478. __HAL_UNLOCK(hdma);
  479. return HAL_ERROR;
  480. }
  481. }
  482. }
  483. if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
  484. {
  485. /* Clear the transfer complete flag */
  486. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
  487. /* The selected Channelx EN bit is cleared (DMA is disabled and
  488. all transfers are complete) */
  489. hdma->State = HAL_DMA_STATE_READY;
  490. }
  491. else
  492. {
  493. /* Clear the half transfer complete flag */
  494. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
  495. }
  496. /* Process unlocked */
  497. __HAL_UNLOCK(hdma);
  498. return HAL_OK;
  499. }
  500. /**
  501. * @brief Handles DMA interrupt request.
  502. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  503. * the configuration information for the specified DMA Channel.
  504. * @retval None
  505. */
  506. void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
  507. {
  508. uint32_t flag_it = hdma->DmaBaseAddress->ISR;
  509. uint32_t source_it = hdma->Instance->CCR;
  510. /* Half Transfer Complete Interrupt management ******************************/
  511. if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
  512. {
  513. /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
  514. if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
  515. {
  516. /* Disable the half transfer interrupt */
  517. __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
  518. }
  519. /* Clear the half transfer complete flag */
  520. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
  521. /* DMA peripheral state is not updated in Half Transfer */
  522. /* but in Transfer Complete case */
  523. if(hdma->XferHalfCpltCallback != NULL)
  524. {
  525. /* Half transfer callback */
  526. hdma->XferHalfCpltCallback(hdma);
  527. }
  528. }
  529. /* Transfer Complete Interrupt management ***********************************/
  530. else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET))
  531. {
  532. if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
  533. {
  534. /* Disable the transfer complete and error interrupt */
  535. __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
  536. /* Change the DMA state */
  537. hdma->State = HAL_DMA_STATE_READY;
  538. }
  539. /* Clear the transfer complete flag */
  540. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
  541. /* Process Unlocked */
  542. __HAL_UNLOCK(hdma);
  543. if(hdma->XferCpltCallback != NULL)
  544. {
  545. /* Transfer complete callback */
  546. hdma->XferCpltCallback(hdma);
  547. }
  548. }
  549. /* Transfer Error Interrupt management **************************************/
  550. else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
  551. {
  552. /* When a DMA transfer error occurs */
  553. /* A hardware clear of its EN bits is performed */
  554. /* Disable ALL DMA IT */
  555. __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
  556. /* Clear all flags */
  557. hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
  558. /* Update error code */
  559. hdma->ErrorCode = HAL_DMA_ERROR_TE;
  560. /* Change the DMA state */
  561. hdma->State = HAL_DMA_STATE_READY;
  562. /* Process Unlocked */
  563. __HAL_UNLOCK(hdma);
  564. if (hdma->XferErrorCallback != NULL)
  565. {
  566. /* Transfer error callback */
  567. hdma->XferErrorCallback(hdma);
  568. }
  569. }
  570. return;
  571. }
  572. /**
  573. * @brief Register callbacks
  574. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  575. * the configuration information for the specified DMA Channel.
  576. * @param CallbackID: User Callback identifer
  577. * a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
  578. * @param pCallback: pointer to private callbacsk function which has pointer to
  579. * a DMA_HandleTypeDef structure as parameter.
  580. * @retval HAL status
  581. */
  582. HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma))
  583. {
  584. HAL_StatusTypeDef status = HAL_OK;
  585. /* Process locked */
  586. __HAL_LOCK(hdma);
  587. if(HAL_DMA_STATE_READY == hdma->State)
  588. {
  589. switch (CallbackID)
  590. {
  591. case HAL_DMA_XFER_CPLT_CB_ID:
  592. hdma->XferCpltCallback = pCallback;
  593. break;
  594. case HAL_DMA_XFER_HALFCPLT_CB_ID:
  595. hdma->XferHalfCpltCallback = pCallback;
  596. break;
  597. case HAL_DMA_XFER_ERROR_CB_ID:
  598. hdma->XferErrorCallback = pCallback;
  599. break;
  600. case HAL_DMA_XFER_ABORT_CB_ID:
  601. hdma->XferAbortCallback = pCallback;
  602. break;
  603. default:
  604. status = HAL_ERROR;
  605. break;
  606. }
  607. }
  608. else
  609. {
  610. status = HAL_ERROR;
  611. }
  612. /* Release Lock */
  613. __HAL_UNLOCK(hdma);
  614. return status;
  615. }
  616. /**
  617. * @brief UnRegister callbacks
  618. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  619. * the configuration information for the specified DMA Channel.
  620. * @param CallbackID: User Callback identifer
  621. * a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
  622. * @retval HAL status
  623. */
  624. HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID)
  625. {
  626. HAL_StatusTypeDef status = HAL_OK;
  627. /* Process locked */
  628. __HAL_LOCK(hdma);
  629. if(HAL_DMA_STATE_READY == hdma->State)
  630. {
  631. switch (CallbackID)
  632. {
  633. case HAL_DMA_XFER_CPLT_CB_ID:
  634. hdma->XferCpltCallback = NULL;
  635. break;
  636. case HAL_DMA_XFER_HALFCPLT_CB_ID:
  637. hdma->XferHalfCpltCallback = NULL;
  638. break;
  639. case HAL_DMA_XFER_ERROR_CB_ID:
  640. hdma->XferErrorCallback = NULL;
  641. break;
  642. case HAL_DMA_XFER_ABORT_CB_ID:
  643. hdma->XferAbortCallback = NULL;
  644. break;
  645. case HAL_DMA_XFER_ALL_CB_ID:
  646. hdma->XferCpltCallback = NULL;
  647. hdma->XferHalfCpltCallback = NULL;
  648. hdma->XferErrorCallback = NULL;
  649. hdma->XferAbortCallback = NULL;
  650. break;
  651. default:
  652. status = HAL_ERROR;
  653. break;
  654. }
  655. }
  656. else
  657. {
  658. status = HAL_ERROR;
  659. }
  660. /* Release Lock */
  661. __HAL_UNLOCK(hdma);
  662. return status;
  663. }
  664. /**
  665. * @}
  666. */
  667. /** @defgroup DMA_Exported_Functions_Group3 Peripheral State and Errors functions
  668. * @brief Peripheral State and Errors functions
  669. *
  670. @verbatim
  671. ===============================================================================
  672. ##### Peripheral State and Errors functions #####
  673. ===============================================================================
  674. [..]
  675. This subsection provides functions allowing to
  676. (+) Check the DMA state
  677. (+) Get error code
  678. @endverbatim
  679. * @{
  680. */
  681. /**
  682. * @brief Return the DMA hande state.
  683. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  684. * the configuration information for the specified DMA Channel.
  685. * @retval HAL state
  686. */
  687. HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
  688. {
  689. /* Return DMA handle state */
  690. return hdma->State;
  691. }
  692. /**
  693. * @brief Return the DMA error code.
  694. * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
  695. * the configuration information for the specified DMA Channel.
  696. * @retval DMA Error Code
  697. */
  698. uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
  699. {
  700. return hdma->ErrorCode;
  701. }
  702. /**
  703. * @}
  704. */
  705. /**
  706. * @}
  707. */
  708. /** @addtogroup DMA_Private_Functions
  709. * @{
  710. */
  711. /**
  712. * @brief Sets the DMA Transfer parameter.
  713. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  714. * the configuration information for the specified DMA Channel.
  715. * @param SrcAddress: The source memory Buffer address
  716. * @param DstAddress: The destination memory Buffer address
  717. * @param DataLength: The length of data to be transferred from source to destination
  718. * @retval HAL status
  719. */
  720. static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
  721. {
  722. /* Clear all flags */
  723. hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
  724. /* Configure DMA Channel data length */
  725. hdma->Instance->CNDTR = DataLength;
  726. /* Memory to Peripheral */
  727. if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
  728. {
  729. /* Configure DMA Channel destination address */
  730. hdma->Instance->CPAR = DstAddress;
  731. /* Configure DMA Channel source address */
  732. hdma->Instance->CMAR = SrcAddress;
  733. }
  734. /* Peripheral to Memory */
  735. else
  736. {
  737. /* Configure DMA Channel source address */
  738. hdma->Instance->CPAR = SrcAddress;
  739. /* Configure DMA Channel destination address */
  740. hdma->Instance->CMAR = DstAddress;
  741. }
  742. }
  743. /**
  744. * @}
  745. */
  746. #endif /* HAL_DMA_MODULE_ENABLED */
  747. /**
  748. * @}
  749. */
  750. /**
  751. * @}
  752. */
  753. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/