Implement a secure ICS protocol targeting LoRa Node151 microcontroller for controlling irrigation.
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  1. /**
  2. ******************************************************************************
  3. * @file stm32l1xx_hal_flash_ex.h
  4. * @author MCD Application Team
  5. * @brief Header file of Flash HAL Extended module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef __STM32L1xx_HAL_FLASH_EX_H
  21. #define __STM32L1xx_HAL_FLASH_EX_H
  22. #ifdef __cplusplus
  23. extern "C" {
  24. #endif
  25. /* Includes ------------------------------------------------------------------*/
  26. #include "stm32l1xx_hal_def.h"
  27. /** @addtogroup STM32L1xx_HAL_Driver
  28. * @{
  29. */
  30. /** @addtogroup FLASHEx
  31. * @{
  32. */
  33. /** @addtogroup FLASHEx_Private_Constants
  34. * @{
  35. */
  36. #if defined(FLASH_SR_RDERR) && defined(FLASH_SR_OPTVERRUSR)
  37. #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \
  38. FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \
  39. FLASH_FLAG_OPTVERRUSR | FLASH_FLAG_RDERR)
  40. #elif defined(FLASH_SR_RDERR)
  41. #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \
  42. FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \
  43. FLASH_FLAG_RDERR)
  44. #elif defined(FLASH_SR_OPTVERRUSR)
  45. #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \
  46. FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \
  47. FLASH_FLAG_OPTVERRUSR)
  48. #else
  49. #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \
  50. FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR)
  51. #endif /* FLASH_SR_RDERR & FLASH_SR_OPTVERRUSR */
  52. #if defined(STM32L100xB) || defined(STM32L151xB) || defined(STM32L152xB) || defined(STM32L100xBA) \
  53. || defined(STM32L151xBA) || defined(STM32L152xBA)
  54. /******* Devices with FLASH 128K *******/
  55. #define FLASH_NBPAGES_MAX 512U /* 512 pages from page 0 to page 511U */
  56. #elif defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \
  57. || defined(STM32L151xCA) || defined(STM32L152xCA) || defined(STM32L162xCA)
  58. /******* Devices with FLASH 256K *******/
  59. #define FLASH_NBPAGES_MAX 1025U /* 1025 pages from page 0 to page 1024U */
  60. #elif defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xD) || defined(STM32L152xDX) \
  61. || defined(STM32L162xD) || defined(STM32L162xDX)
  62. /******* Devices with FLASH 384K *******/
  63. #define FLASH_NBPAGES_MAX 1536U /* 1536 pages from page 0 to page 1535U */
  64. #elif defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE)
  65. /******* Devices with FLASH 512K *******/
  66. #define FLASH_NBPAGES_MAX 2048U /* 2048 pages from page 0 to page 2047U */
  67. #endif /* STM32L100xB || STM32L151xB || STM32L152xB || STM32L100xBA || STM32L151xBA || STM32L152xBA */
  68. #define WRP_MASK_LOW (0x0000FFFFU)
  69. #define WRP_MASK_HIGH (0xFFFF0000U)
  70. /**
  71. * @}
  72. */
  73. /** @addtogroup FLASHEx_Private_Macros
  74. * @{
  75. */
  76. #define IS_FLASH_TYPEERASE(__VALUE__) (((__VALUE__) == FLASH_TYPEERASE_PAGES))
  77. #define IS_OPTIONBYTE(__VALUE__) (((__VALUE__) <= (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_BOR)))
  78. #define IS_WRPSTATE(__VALUE__) (((__VALUE__) == OB_WRPSTATE_DISABLE) || \
  79. ((__VALUE__) == OB_WRPSTATE_ENABLE))
  80. #define IS_OB_WRP(__PAGE__) (((__PAGE__) != 0x0000000U))
  81. #define IS_OB_RDP(__LEVEL__) (((__LEVEL__) == OB_RDP_LEVEL_0) ||\
  82. ((__LEVEL__) == OB_RDP_LEVEL_1) ||\
  83. ((__LEVEL__) == OB_RDP_LEVEL_2))
  84. #define IS_OB_BOR_LEVEL(__LEVEL__) (((__LEVEL__) == OB_BOR_OFF) || \
  85. ((__LEVEL__) == OB_BOR_LEVEL1) || \
  86. ((__LEVEL__) == OB_BOR_LEVEL2) || \
  87. ((__LEVEL__) == OB_BOR_LEVEL3) || \
  88. ((__LEVEL__) == OB_BOR_LEVEL4) || \
  89. ((__LEVEL__) == OB_BOR_LEVEL5))
  90. #define IS_OB_IWDG_SOURCE(__SOURCE__) (((__SOURCE__) == OB_IWDG_SW) || ((__SOURCE__) == OB_IWDG_HW))
  91. #define IS_OB_STOP_SOURCE(__SOURCE__) (((__SOURCE__) == OB_STOP_NORST) || ((__SOURCE__) == OB_STOP_RST))
  92. #define IS_OB_STDBY_SOURCE(__SOURCE__) (((__SOURCE__) == OB_STDBY_NORST) || ((__SOURCE__) == OB_STDBY_RST))
  93. #if defined(FLASH_OBR_SPRMOD) && defined(FLASH_OBR_nRST_BFB2)
  94. #define IS_OBEX(__VALUE__) (((__VALUE__) == OPTIONBYTE_PCROP) || ((__VALUE__) == OPTIONBYTE_BOOTCONFIG))
  95. #elif defined(FLASH_OBR_SPRMOD) && !defined(FLASH_OBR_nRST_BFB2)
  96. #define IS_OBEX(__VALUE__) ((__VALUE__) == OPTIONBYTE_PCROP)
  97. #elif !defined(FLASH_OBR_SPRMOD) && defined(FLASH_OBR_nRST_BFB2)
  98. #define IS_OBEX(__VALUE__) ((__VALUE__) == OPTIONBYTE_BOOTCONFIG)
  99. #endif /* FLASH_OBR_SPRMOD && FLASH_OBR_nRST_BFB2 */
  100. #if defined(FLASH_OBR_SPRMOD)
  101. #define IS_PCROPSTATE(__VALUE__) (((__VALUE__) == OB_PCROP_STATE_DISABLE) || \
  102. ((__VALUE__) == OB_PCROP_STATE_ENABLE))
  103. #define IS_OB_PCROP(__PAGE__) (((__PAGE__) != 0x0000000U))
  104. #endif /* FLASH_OBR_SPRMOD */
  105. #if defined(FLASH_OBR_nRST_BFB2)
  106. #define IS_OB_BOOT_BANK(__BANK__) (((__BANK__) == OB_BOOT_BANK2) || ((__BANK__) == OB_BOOT_BANK1))
  107. #endif /* FLASH_OBR_nRST_BFB2 */
  108. #define IS_TYPEERASEDATA(__VALUE__) (((__VALUE__) == FLASH_TYPEERASEDATA_BYTE) || \
  109. ((__VALUE__) == FLASH_TYPEERASEDATA_HALFWORD) || \
  110. ((__VALUE__) == FLASH_TYPEERASEDATA_WORD))
  111. #define IS_TYPEPROGRAMDATA(__VALUE__) (((__VALUE__) == FLASH_TYPEPROGRAMDATA_BYTE) || \
  112. ((__VALUE__) == FLASH_TYPEPROGRAMDATA_HALFWORD) || \
  113. ((__VALUE__) == FLASH_TYPEPROGRAMDATA_WORD) || \
  114. ((__VALUE__) == FLASH_TYPEPROGRAMDATA_FASTBYTE) || \
  115. ((__VALUE__) == FLASH_TYPEPROGRAMDATA_FASTHALFWORD) || \
  116. ((__VALUE__) == FLASH_TYPEPROGRAMDATA_FASTWORD))
  117. /** @defgroup FLASHEx_Address FLASHEx Address
  118. * @{
  119. */
  120. #define IS_FLASH_DATA_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_EEPROM_BASE) && ((__ADDRESS__) <= FLASH_EEPROM_END))
  121. #if defined(STM32L100xB) || defined(STM32L151xB) || defined(STM32L152xB) || defined(STM32L100xBA) \
  122. || defined(STM32L151xBA) || defined(STM32L152xBA) || defined(STM32L100xC) || defined(STM32L151xC) \
  123. || defined(STM32L152xC) || defined(STM32L162xC) || defined(STM32L151xCA) || defined(STM32L152xCA) \
  124. || defined(STM32L162xCA)
  125. #define IS_FLASH_PROGRAM_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_END))
  126. #else /*STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
  127. #define IS_FLASH_PROGRAM_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_BANK2_END))
  128. #define IS_FLASH_PROGRAM_BANK1_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_BANK1_END))
  129. #define IS_FLASH_PROGRAM_BANK2_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BANK2_BASE) && ((__ADDRESS__) <= FLASH_BANK2_END))
  130. #endif /* STM32L100xB || STM32L151xB || STM32L152xB || (...) || STM32L151xCA || STM32L152xCA || STM32L162xCA */
  131. #define IS_NBPAGES(__PAGES__) (((__PAGES__) >= 1U) && ((__PAGES__) <= FLASH_NBPAGES_MAX))
  132. /**
  133. * @}
  134. */
  135. /**
  136. * @}
  137. */
  138. /* Exported types ------------------------------------------------------------*/
  139. /** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types
  140. * @{
  141. */
  142. /**
  143. * @brief FLASH Erase structure definition
  144. */
  145. typedef struct
  146. {
  147. uint32_t TypeErase; /*!< TypeErase: Page Erase only.
  148. This parameter can be a value of @ref FLASHEx_Type_Erase */
  149. uint32_t PageAddress; /*!< PageAddress: Initial FLASH address to be erased
  150. This parameter must be a value belonging to FLASH Programm address (depending on the devices) */
  151. uint32_t NbPages; /*!< NbPages: Number of pages to be erased.
  152. This parameter must be a value between 1 and (max number of pages - value of Initial page)*/
  153. } FLASH_EraseInitTypeDef;
  154. /**
  155. * @brief FLASH Option Bytes PROGRAM structure definition
  156. */
  157. typedef struct
  158. {
  159. uint32_t OptionType; /*!< OptionType: Option byte to be configured.
  160. This parameter can be a value of @ref FLASHEx_Option_Type */
  161. uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation.
  162. This parameter can be a value of @ref FLASHEx_WRP_State */
  163. uint32_t WRPSector0To31; /*!< WRPSector0To31: specifies the sector(s) which are write protected between Sector 0 to 31
  164. This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection1 */
  165. #if defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \
  166. || defined(STM32L151xCA) || defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xCA) \
  167. || defined(STM32L152xD) || defined(STM32L152xDX) || defined(STM32L162xCA) || defined(STM32L162xD) \
  168. || defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE)
  169. uint32_t WRPSector32To63; /*!< WRPSector32To63: specifies the sector(s) which are write protected between Sector 32 to 63
  170. This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection2 */
  171. #endif /* STM32L100xC || STM32L151xC || STM32L152xC || (...) || STM32L151xE || STM32L152xE || STM32L162xE */
  172. #if defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xD) || defined(STM32L152xDX) \
  173. || defined(STM32L162xD) || defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) \
  174. || defined(STM32L162xE)
  175. uint32_t WRPSector64To95; /*!< WRPSector64to95: specifies the sector(s) which are write protected between Sector 64 to 95
  176. This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection3 */
  177. #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
  178. #if defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) || defined(STM32L151xDX) \
  179. || defined(STM32L152xDX) || defined(STM32L162xDX)
  180. uint32_t WRPSector96To127; /*!< WRPSector96To127: specifies the sector(s) which are write protected between Sector 96 to 127 or
  181. Sectors 96 to 111 for STM32L1xxxDX devices.
  182. This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection4 */
  183. #endif /* STM32L151xE || STM32L152xE || STM32L162xE || STM32L151xDX || ... */
  184. uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level.
  185. This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */
  186. uint8_t BORLevel; /*!< BORLevel: Set the BOR Level.
  187. This parameter can be a value of @ref FLASHEx_Option_Bytes_BOR_Level */
  188. uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
  189. This parameter can be a combination of @ref FLASHEx_Option_Bytes_IWatchdog,
  190. @ref FLASHEx_Option_Bytes_nRST_STOP and @ref FLASHEx_Option_Bytes_nRST_STDBY*/
  191. } FLASH_OBProgramInitTypeDef;
  192. #if defined(FLASH_OBR_SPRMOD) || defined(FLASH_OBR_nRST_BFB2)
  193. /**
  194. * @brief FLASH Advanced Option Bytes Program structure definition
  195. */
  196. typedef struct
  197. {
  198. uint32_t OptionType; /*!< OptionType: Option byte to be configured for extension .
  199. This parameter can be a value of @ref FLASHEx_OptionAdv_Type */
  200. #if defined(FLASH_OBR_SPRMOD)
  201. uint32_t PCROPState; /*!< PCROPState: PCROP activation or deactivation.
  202. This parameter can be a value of @ref FLASHEx_PCROP_State */
  203. uint32_t PCROPSector0To31; /*!< PCROPSector0To31: specifies the sector(s) set for PCROP
  204. This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection1 */
  205. #if defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC)
  206. uint32_t PCROPSector32To63; /*!< PCROPSector32To63: specifies the sector(s) set for PCROP
  207. This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection2 */
  208. #endif /* STM32L151xC || STM32L152xC || STM32L162xC */
  209. #endif /* FLASH_OBR_SPRMOD */
  210. #if defined(FLASH_OBR_nRST_BFB2)
  211. uint16_t BootConfig; /*!< BootConfig: specifies Option bytes for boot config
  212. This parameter can be a value of @ref FLASHEx_Option_Bytes_BOOT */
  213. #endif /* FLASH_OBR_nRST_BFB2*/
  214. } FLASH_AdvOBProgramInitTypeDef;
  215. /**
  216. * @}
  217. */
  218. #endif /* FLASH_OBR_SPRMOD || FLASH_OBR_nRST_BFB2 */
  219. /* Exported constants --------------------------------------------------------*/
  220. /** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants
  221. * @{
  222. */
  223. /** @defgroup FLASHEx_Type_Erase FLASHEx_Type_Erase
  224. * @{
  225. */
  226. #define FLASH_TYPEERASE_PAGES (0x00U) /*!<Page erase only*/
  227. /**
  228. * @}
  229. */
  230. /** @defgroup FLASHEx_Option_Type FLASHEx Option Type
  231. * @{
  232. */
  233. #define OPTIONBYTE_WRP (0x01U) /*!<WRP option byte configuration*/
  234. #define OPTIONBYTE_RDP (0x02U) /*!<RDP option byte configuration*/
  235. #define OPTIONBYTE_USER (0x04U) /*!<USER option byte configuration*/
  236. #define OPTIONBYTE_BOR (0x08U) /*!<BOR option byte configuration*/
  237. /**
  238. * @}
  239. */
  240. /** @defgroup FLASHEx_WRP_State FLASHEx WRP State
  241. * @{
  242. */
  243. #define OB_WRPSTATE_DISABLE (0x00U) /*!<Disable the write protection of the desired sectors*/
  244. #define OB_WRPSTATE_ENABLE (0x01U) /*!<Enable the write protection of the desired sectors*/
  245. /**
  246. * @}
  247. */
  248. /** @defgroup FLASHEx_Option_Bytes_Write_Protection1 FLASHEx Option Bytes Write Protection1
  249. * @{
  250. */
  251. /* Common pages for Cat1, Cat2, Cat3, Cat4 & Cat5 devices */
  252. #define OB_WRP1_PAGES0TO15 (0x00000001U) /* Write protection of Sector0 */
  253. #define OB_WRP1_PAGES16TO31 (0x00000002U) /* Write protection of Sector1 */
  254. #define OB_WRP1_PAGES32TO47 (0x00000004U) /* Write protection of Sector2 */
  255. #define OB_WRP1_PAGES48TO63 (0x00000008U) /* Write protection of Sector3 */
  256. #define OB_WRP1_PAGES64TO79 (0x00000010U) /* Write protection of Sector4 */
  257. #define OB_WRP1_PAGES80TO95 (0x00000020U) /* Write protection of Sector5 */
  258. #define OB_WRP1_PAGES96TO111 (0x00000040U) /* Write protection of Sector6 */
  259. #define OB_WRP1_PAGES112TO127 (0x00000080U) /* Write protection of Sector7 */
  260. #define OB_WRP1_PAGES128TO143 (0x00000100U) /* Write protection of Sector8 */
  261. #define OB_WRP1_PAGES144TO159 (0x00000200U) /* Write protection of Sector9 */
  262. #define OB_WRP1_PAGES160TO175 (0x00000400U) /* Write protection of Sector10 */
  263. #define OB_WRP1_PAGES176TO191 (0x00000800U) /* Write protection of Sector11 */
  264. #define OB_WRP1_PAGES192TO207 (0x00001000U) /* Write protection of Sector12 */
  265. #define OB_WRP1_PAGES208TO223 (0x00002000U) /* Write protection of Sector13 */
  266. #define OB_WRP1_PAGES224TO239 (0x00004000U) /* Write protection of Sector14 */
  267. #define OB_WRP1_PAGES240TO255 (0x00008000U) /* Write protection of Sector15 */
  268. #define OB_WRP1_PAGES256TO271 (0x00010000U) /* Write protection of Sector16 */
  269. #define OB_WRP1_PAGES272TO287 (0x00020000U) /* Write protection of Sector17 */
  270. #define OB_WRP1_PAGES288TO303 (0x00040000U) /* Write protection of Sector18 */
  271. #define OB_WRP1_PAGES304TO319 (0x00080000U) /* Write protection of Sector19 */
  272. #define OB_WRP1_PAGES320TO335 (0x00100000U) /* Write protection of Sector20 */
  273. #define OB_WRP1_PAGES336TO351 (0x00200000U) /* Write protection of Sector21 */
  274. #define OB_WRP1_PAGES352TO367 (0x00400000U) /* Write protection of Sector22 */
  275. #define OB_WRP1_PAGES368TO383 (0x00800000U) /* Write protection of Sector23 */
  276. #define OB_WRP1_PAGES384TO399 (0x01000000U) /* Write protection of Sector24 */
  277. #define OB_WRP1_PAGES400TO415 (0x02000000U) /* Write protection of Sector25 */
  278. #define OB_WRP1_PAGES416TO431 (0x04000000U) /* Write protection of Sector26 */
  279. #define OB_WRP1_PAGES432TO447 (0x08000000U) /* Write protection of Sector27 */
  280. #define OB_WRP1_PAGES448TO463 (0x10000000U) /* Write protection of Sector28 */
  281. #define OB_WRP1_PAGES464TO479 (0x20000000U) /* Write protection of Sector29 */
  282. #define OB_WRP1_PAGES480TO495 (0x40000000U) /* Write protection of Sector30 */
  283. #define OB_WRP1_PAGES496TO511 (0x80000000U) /* Write protection of Sector31 */
  284. #define OB_WRP1_ALLPAGES ((uint32_t)FLASH_WRPR1_WRP) /*!< Write protection of all Sectors */
  285. /**
  286. * @}
  287. */
  288. #if defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \
  289. || defined(STM32L151xCA) || defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xCA) \
  290. || defined(STM32L152xD) || defined(STM32L152xDX) || defined(STM32L162xCA) || defined(STM32L162xD) \
  291. || defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE)
  292. /** @defgroup FLASHEx_Option_Bytes_Write_Protection2 FLASHEx Option Bytes Write Protection2
  293. * @{
  294. */
  295. /* Pages for Cat3, Cat4 & Cat5 devices*/
  296. #define OB_WRP2_PAGES512TO527 (0x00000001U) /* Write protection of Sector32 */
  297. #define OB_WRP2_PAGES528TO543 (0x00000002U) /* Write protection of Sector33 */
  298. #define OB_WRP2_PAGES544TO559 (0x00000004U) /* Write protection of Sector34 */
  299. #define OB_WRP2_PAGES560TO575 (0x00000008U) /* Write protection of Sector35 */
  300. #define OB_WRP2_PAGES576TO591 (0x00000010U) /* Write protection of Sector36 */
  301. #define OB_WRP2_PAGES592TO607 (0x00000020U) /* Write protection of Sector37 */
  302. #define OB_WRP2_PAGES608TO623 (0x00000040U) /* Write protection of Sector38 */
  303. #define OB_WRP2_PAGES624TO639 (0x00000080U) /* Write protection of Sector39 */
  304. #define OB_WRP2_PAGES640TO655 (0x00000100U) /* Write protection of Sector40 */
  305. #define OB_WRP2_PAGES656TO671 (0x00000200U) /* Write protection of Sector41 */
  306. #define OB_WRP2_PAGES672TO687 (0x00000400U) /* Write protection of Sector42 */
  307. #define OB_WRP2_PAGES688TO703 (0x00000800U) /* Write protection of Sector43 */
  308. #define OB_WRP2_PAGES704TO719 (0x00001000U) /* Write protection of Sector44 */
  309. #define OB_WRP2_PAGES720TO735 (0x00002000U) /* Write protection of Sector45 */
  310. #define OB_WRP2_PAGES736TO751 (0x00004000U) /* Write protection of Sector46 */
  311. #define OB_WRP2_PAGES752TO767 (0x00008000U) /* Write protection of Sector47 */
  312. #if defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \
  313. || defined(STM32L151xCA) || defined(STM32L151xD) || defined(STM32L152xCA) || defined(STM32L152xD) \
  314. || defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L151xE) || defined(STM32L152xE) \
  315. || defined(STM32L162xE)
  316. #define OB_WRP2_PAGES768TO783 (0x00010000U) /* Write protection of Sector48 */
  317. #define OB_WRP2_PAGES784TO799 (0x00020000U) /* Write protection of Sector49 */
  318. #define OB_WRP2_PAGES800TO815 (0x00040000U) /* Write protection of Sector50 */
  319. #define OB_WRP2_PAGES816TO831 (0x00080000U) /* Write protection of Sector51 */
  320. #define OB_WRP2_PAGES832TO847 (0x00100000U) /* Write protection of Sector52 */
  321. #define OB_WRP2_PAGES848TO863 (0x00200000U) /* Write protection of Sector53 */
  322. #define OB_WRP2_PAGES864TO879 (0x00400000U) /* Write protection of Sector54 */
  323. #define OB_WRP2_PAGES880TO895 (0x00800000U) /* Write protection of Sector55 */
  324. #define OB_WRP2_PAGES896TO911 (0x01000000U) /* Write protection of Sector56 */
  325. #define OB_WRP2_PAGES912TO927 (0x02000000U) /* Write protection of Sector57 */
  326. #define OB_WRP2_PAGES928TO943 (0x04000000U) /* Write protection of Sector58 */
  327. #define OB_WRP2_PAGES944TO959 (0x08000000U) /* Write protection of Sector59 */
  328. #define OB_WRP2_PAGES960TO975 (0x10000000U) /* Write protection of Sector60 */
  329. #define OB_WRP2_PAGES976TO991 (0x20000000U) /* Write protection of Sector61 */
  330. #define OB_WRP2_PAGES992TO1007 (0x40000000U) /* Write protection of Sector62 */
  331. #define OB_WRP2_PAGES1008TO1023 (0x80000000U) /* Write protection of Sector63 */
  332. #endif /* STM32L100xC || STM32L151xC || STM32L152xC || (...) || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
  333. #define OB_WRP2_ALLPAGES ((uint32_t)FLASH_WRPR2_WRP) /*!< Write protection of all Sectors */
  334. /**
  335. * @}
  336. */
  337. #endif /* STM32L100xC || STM32L151xC || STM32L152xC || (...) || STM32L162xD || STM32L151xDX || STM32L152xE || STM32L162xE */
  338. #if defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xD) || defined(STM32L152xDX) \
  339. || defined(STM32L162xD) || defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) \
  340. || defined(STM32L162xE)
  341. /** @defgroup FLASHEx_Option_Bytes_Write_Protection3 FLASHEx Option Bytes Write Protection3
  342. * @{
  343. */
  344. /* Pages for devices with FLASH >= 256KB*/
  345. #define OB_WRP3_PAGES1024TO1039 (0x00000001U) /* Write protection of Sector64 */
  346. #define OB_WRP3_PAGES1040TO1055 (0x00000002U) /* Write protection of Sector65 */
  347. #define OB_WRP3_PAGES1056TO1071 (0x00000004U) /* Write protection of Sector66 */
  348. #define OB_WRP3_PAGES1072TO1087 (0x00000008U) /* Write protection of Sector67 */
  349. #define OB_WRP3_PAGES1088TO1103 (0x00000010U) /* Write protection of Sector68 */
  350. #define OB_WRP3_PAGES1104TO1119 (0x00000020U) /* Write protection of Sector69 */
  351. #define OB_WRP3_PAGES1120TO1135 (0x00000040U) /* Write protection of Sector70 */
  352. #define OB_WRP3_PAGES1136TO1151 (0x00000080U) /* Write protection of Sector71 */
  353. #define OB_WRP3_PAGES1152TO1167 (0x00000100U) /* Write protection of Sector72 */
  354. #define OB_WRP3_PAGES1168TO1183 (0x00000200U) /* Write protection of Sector73 */
  355. #define OB_WRP3_PAGES1184TO1199 (0x00000400U) /* Write protection of Sector74 */
  356. #define OB_WRP3_PAGES1200TO1215 (0x00000800U) /* Write protection of Sector75 */
  357. #define OB_WRP3_PAGES1216TO1231 (0x00001000U) /* Write protection of Sector76 */
  358. #define OB_WRP3_PAGES1232TO1247 (0x00002000U) /* Write protection of Sector77 */
  359. #define OB_WRP3_PAGES1248TO1263 (0x00004000U) /* Write protection of Sector78 */
  360. #define OB_WRP3_PAGES1264TO1279 (0x00008000U) /* Write protection of Sector79 */
  361. #define OB_WRP3_PAGES1280TO1295 (0x00010000U) /* Write protection of Sector80 */
  362. #define OB_WRP3_PAGES1296TO1311 (0x00020000U) /* Write protection of Sector81 */
  363. #define OB_WRP3_PAGES1312TO1327 (0x00040000U) /* Write protection of Sector82 */
  364. #define OB_WRP3_PAGES1328TO1343 (0x00080000U) /* Write protection of Sector83 */
  365. #define OB_WRP3_PAGES1344TO1359 (0x00100000U) /* Write protection of Sector84 */
  366. #define OB_WRP3_PAGES1360TO1375 (0x00200000U) /* Write protection of Sector85 */
  367. #define OB_WRP3_PAGES1376TO1391 (0x00400000U) /* Write protection of Sector86 */
  368. #define OB_WRP3_PAGES1392TO1407 (0x00800000U) /* Write protection of Sector87 */
  369. #define OB_WRP3_PAGES1408TO1423 (0x01000000U) /* Write protection of Sector88 */
  370. #define OB_WRP3_PAGES1424TO1439 (0x02000000U) /* Write protection of Sector89 */
  371. #define OB_WRP3_PAGES1440TO1455 (0x04000000U) /* Write protection of Sector90 */
  372. #define OB_WRP3_PAGES1456TO1471 (0x08000000U) /* Write protection of Sector91 */
  373. #define OB_WRP3_PAGES1472TO1487 (0x10000000U) /* Write protection of Sector92 */
  374. #define OB_WRP3_PAGES1488TO1503 (0x20000000U) /* Write protection of Sector93 */
  375. #define OB_WRP3_PAGES1504TO1519 (0x40000000U) /* Write protection of Sector94 */
  376. #define OB_WRP3_PAGES1520TO1535 (0x80000000U) /* Write protection of Sector95 */
  377. #define OB_WRP3_ALLPAGES ((uint32_t)FLASH_WRPR3_WRP) /*!< Write protection of all Sectors */
  378. /**
  379. * @}
  380. */
  381. #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE*/
  382. #if defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) || defined(STM32L151xDX) \
  383. || defined(STM32L152xDX) || defined(STM32L162xDX)
  384. /** @defgroup FLASHEx_Option_Bytes_Write_Protection4 FLASHEx Option Bytes Write Protection4
  385. * @{
  386. */
  387. /* Pages for Cat5 devices*/
  388. #define OB_WRP4_PAGES1536TO1551 (0x00000001U)/* Write protection of Sector96*/
  389. #define OB_WRP4_PAGES1552TO1567 (0x00000002U)/* Write protection of Sector97*/
  390. #define OB_WRP4_PAGES1568TO1583 (0x00000004U)/* Write protection of Sector98*/
  391. #define OB_WRP4_PAGES1584TO1599 (0x00000008U)/* Write protection of Sector99*/
  392. #define OB_WRP4_PAGES1600TO1615 (0x00000010U) /* Write protection of Sector100*/
  393. #define OB_WRP4_PAGES1616TO1631 (0x00000020U) /* Write protection of Sector101*/
  394. #define OB_WRP4_PAGES1632TO1647 (0x00000040U) /* Write protection of Sector102*/
  395. #define OB_WRP4_PAGES1648TO1663 (0x00000080U) /* Write protection of Sector103*/
  396. #define OB_WRP4_PAGES1664TO1679 (0x00000100U) /* Write protection of Sector104*/
  397. #define OB_WRP4_PAGES1680TO1695 (0x00000200U) /* Write protection of Sector105*/
  398. #define OB_WRP4_PAGES1696TO1711 (0x00000400U) /* Write protection of Sector106*/
  399. #define OB_WRP4_PAGES1712TO1727 (0x00000800U) /* Write protection of Sector107*/
  400. #define OB_WRP4_PAGES1728TO1743 (0x00001000U) /* Write protection of Sector108*/
  401. #define OB_WRP4_PAGES1744TO1759 (0x00002000U) /* Write protection of Sector109*/
  402. #define OB_WRP4_PAGES1760TO1775 (0x00004000U) /* Write protection of Sector110*/
  403. #define OB_WRP4_PAGES1776TO1791 (0x00008000U) /* Write protection of Sector111*/
  404. #if defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE)
  405. #define OB_WRP4_PAGES1792TO1807 (0x00010000U) /* Write protection of Sector112*/
  406. #define OB_WRP4_PAGES1808TO1823 (0x00020000U) /* Write protection of Sector113*/
  407. #define OB_WRP4_PAGES1824TO1839 (0x00040000U) /* Write protection of Sector114*/
  408. #define OB_WRP4_PAGES1840TO1855 (0x00080000U) /* Write protection of Sector115*/
  409. #define OB_WRP4_PAGES1856TO1871 (0x00100000U) /* Write protection of Sector116*/
  410. #define OB_WRP4_PAGES1872TO1887 (0x00200000U) /* Write protection of Sector117*/
  411. #define OB_WRP4_PAGES1888TO1903 (0x00400000U) /* Write protection of Sector118*/
  412. #define OB_WRP4_PAGES1904TO1919 (0x00800000U) /* Write protection of Sector119*/
  413. #define OB_WRP4_PAGES1920TO1935 (0x01000000U) /* Write protection of Sector120*/
  414. #define OB_WRP4_PAGES1936TO1951 (0x02000000U) /* Write protection of Sector121*/
  415. #define OB_WRP4_PAGES1952TO1967 (0x04000000U) /* Write protection of Sector122*/
  416. #define OB_WRP4_PAGES1968TO1983 (0x08000000U) /* Write protection of Sector123*/
  417. #define OB_WRP4_PAGES1984TO1999 (0x10000000U) /* Write protection of Sector124*/
  418. #define OB_WRP4_PAGES2000TO2015 (0x20000000U) /* Write protection of Sector125*/
  419. #define OB_WRP4_PAGES2016TO2031 (0x40000000U) /* Write protection of Sector126*/
  420. #define OB_WRP4_PAGES2032TO2047 (0x80000000U) /* Write protection of Sector127*/
  421. #endif /* STM32L151xE || STM32L152xE || STM32L162xE */
  422. #define OB_WRP4_ALLPAGES ((uint32_t)FLASH_WRPR4_WRP) /*!< Write protection of all Sectors */
  423. /**
  424. * @}
  425. */
  426. #endif /* STM32L151xE || STM32L152xE || STM32L162xE || STM32L151xDX || ... */
  427. /** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASHEx Option Bytes Read Protection
  428. * @{
  429. */
  430. #define OB_RDP_LEVEL_0 ((uint8_t)0xAAU)
  431. #define OB_RDP_LEVEL_1 ((uint8_t)0xBBU)
  432. #define OB_RDP_LEVEL_2 ((uint8_t)0xCCU) /* Warning: When enabling read protection level 2
  433. it is no more possible to go back to level 1 or 0 */
  434. /**
  435. * @}
  436. */
  437. /** @defgroup FLASHEx_Option_Bytes_BOR_Level FLASHEx Option Bytes BOR Level
  438. * @{
  439. */
  440. #define OB_BOR_OFF ((uint8_t)0x00U) /*!< BOR is disabled at power down, the reset is asserted when the VDD
  441. power supply reaches the PDR(Power Down Reset) threshold (1.5V) */
  442. #define OB_BOR_LEVEL1 ((uint8_t)0x08U) /*!< BOR Reset threshold levels for 1.7V - 1.8V VDD power supply */
  443. #define OB_BOR_LEVEL2 ((uint8_t)0x09U) /*!< BOR Reset threshold levels for 1.9V - 2.0V VDD power supply */
  444. #define OB_BOR_LEVEL3 ((uint8_t)0x0AU) /*!< BOR Reset threshold levels for 2.3V - 2.4V VDD power supply */
  445. #define OB_BOR_LEVEL4 ((uint8_t)0x0BU) /*!< BOR Reset threshold levels for 2.55V - 2.65V VDD power supply */
  446. #define OB_BOR_LEVEL5 ((uint8_t)0x0CU) /*!< BOR Reset threshold levels for 2.8V - 2.9V VDD power supply */
  447. /**
  448. * @}
  449. */
  450. /** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASHEx Option Bytes IWatchdog
  451. * @{
  452. */
  453. #define OB_IWDG_SW ((uint8_t)0x10U) /*!< Software WDG selected */
  454. #define OB_IWDG_HW ((uint8_t)0x00U) /*!< Hardware WDG selected */
  455. /**
  456. * @}
  457. */
  458. /** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASHEx Option Bytes nRST_STOP
  459. * @{
  460. */
  461. #define OB_STOP_NORST ((uint8_t)0x20U) /*!< No reset generated when entering in STOP */
  462. #define OB_STOP_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STOP */
  463. /**
  464. * @}
  465. */
  466. /** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASHEx Option Bytes nRST_STDBY
  467. * @{
  468. */
  469. #define OB_STDBY_NORST ((uint8_t)0x40U) /*!< No reset generated when entering in STANDBY */
  470. #define OB_STDBY_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STANDBY */
  471. /**
  472. * @}
  473. */
  474. #if defined(FLASH_OBR_SPRMOD)
  475. /** @defgroup FLASHEx_OptionAdv_Type FLASHEx Option Advanced Type
  476. * @{
  477. */
  478. #define OPTIONBYTE_PCROP (0x01U) /*!<PCROP option byte configuration*/
  479. /**
  480. * @}
  481. */
  482. #endif /* FLASH_OBR_SPRMOD */
  483. #if defined(FLASH_OBR_nRST_BFB2)
  484. /** @defgroup FLASHEx_OptionAdv_Type FLASHEx Option Advanced Type
  485. * @{
  486. */
  487. #define OPTIONBYTE_BOOTCONFIG (0x02U) /*!<BOOTConfig option byte configuration*/
  488. /**
  489. * @}
  490. */
  491. #endif /* FLASH_OBR_nRST_BFB2 */
  492. #if defined(FLASH_OBR_SPRMOD)
  493. /** @defgroup FLASHEx_PCROP_State FLASHEx PCROP State
  494. * @{
  495. */
  496. #define OB_PCROP_STATE_DISABLE (0x00U) /*!<Disable PCROP for selected sectors */
  497. #define OB_PCROP_STATE_ENABLE (0x01U) /*!<Enable PCROP for selected sectors */
  498. /**
  499. * @}
  500. */
  501. /** @defgroup FLASHEx_Selection_Protection_Mode FLASHEx Selection Protection Mode
  502. * @{
  503. */
  504. #define OB_PCROP_DESELECTED ((uint16_t)0x0000U) /*!< Disabled PCROP, nWPRi bits used for Write Protection on sector i */
  505. #define OB_PCROP_SELECTED ((uint16_t)FLASH_OBR_SPRMOD) /*!< Enable PCROP, nWPRi bits used for PCRoP Protection on sector i */
  506. /**
  507. * @}
  508. */
  509. #endif /* FLASH_OBR_SPRMOD */
  510. #if defined(STM32L151xBA) || defined(STM32L152xBA) || defined(STM32L151xC) || defined(STM32L152xC) \
  511. || defined(STM32L162xC)
  512. /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection1 FLASHEx Option Bytes PC ReadWrite Protection 1
  513. * @{
  514. */
  515. /* Common pages for Cat1, Cat2, Cat3, Cat4 & Cat5 devices */
  516. #define OB_PCROP1_PAGES0TO15 (0x00000001U) /* PC Read/Write protection of Sector0 */
  517. #define OB_PCROP1_PAGES16TO31 (0x00000002U) /* PC Read/Write protection of Sector1 */
  518. #define OB_PCROP1_PAGES32TO47 (0x00000004U) /* PC Read/Write protection of Sector2 */
  519. #define OB_PCROP1_PAGES48TO63 (0x00000008U) /* PC Read/Write protection of Sector3 */
  520. #define OB_PCROP1_PAGES64TO79 (0x00000010U) /* PC Read/Write protection of Sector4 */
  521. #define OB_PCROP1_PAGES80TO95 (0x00000020U) /* PC Read/Write protection of Sector5 */
  522. #define OB_PCROP1_PAGES96TO111 (0x00000040U) /* PC Read/Write protection of Sector6 */
  523. #define OB_PCROP1_PAGES112TO127 (0x00000080U) /* PC Read/Write protection of Sector7 */
  524. #define OB_PCROP1_PAGES128TO143 (0x00000100U) /* PC Read/Write protection of Sector8 */
  525. #define OB_PCROP1_PAGES144TO159 (0x00000200U) /* PC Read/Write protection of Sector9 */
  526. #define OB_PCROP1_PAGES160TO175 (0x00000400U) /* PC Read/Write protection of Sector10 */
  527. #define OB_PCROP1_PAGES176TO191 (0x00000800U) /* PC Read/Write protection of Sector11 */
  528. #define OB_PCROP1_PAGES192TO207 (0x00001000U) /* PC Read/Write protection of Sector12 */
  529. #define OB_PCROP1_PAGES208TO223 (0x00002000U) /* PC Read/Write protection of Sector13 */
  530. #define OB_PCROP1_PAGES224TO239 (0x00004000U) /* PC Read/Write protection of Sector14 */
  531. #define OB_PCROP1_PAGES240TO255 (0x00008000U) /* PC Read/Write protection of Sector15 */
  532. #define OB_PCROP1_PAGES256TO271 (0x00010000U) /* PC Read/Write protection of Sector16 */
  533. #define OB_PCROP1_PAGES272TO287 (0x00020000U) /* PC Read/Write protection of Sector17 */
  534. #define OB_PCROP1_PAGES288TO303 (0x00040000U) /* PC Read/Write protection of Sector18 */
  535. #define OB_PCROP1_PAGES304TO319 (0x00080000U) /* PC Read/Write protection of Sector19 */
  536. #define OB_PCROP1_PAGES320TO335 (0x00100000U) /* PC Read/Write protection of Sector20 */
  537. #define OB_PCROP1_PAGES336TO351 (0x00200000U) /* PC Read/Write protection of Sector21 */
  538. #define OB_PCROP1_PAGES352TO367 (0x00400000U) /* PC Read/Write protection of Sector22 */
  539. #define OB_PCROP1_PAGES368TO383 (0x00800000U) /* PC Read/Write protection of Sector23 */
  540. #define OB_PCROP1_PAGES384TO399 (0x01000000U) /* PC Read/Write protection of Sector24 */
  541. #define OB_PCROP1_PAGES400TO415 (0x02000000U) /* PC Read/Write protection of Sector25 */
  542. #define OB_PCROP1_PAGES416TO431 (0x04000000U) /* PC Read/Write protection of Sector26 */
  543. #define OB_PCROP1_PAGES432TO447 (0x08000000U) /* PC Read/Write protection of Sector27 */
  544. #define OB_PCROP1_PAGES448TO463 (0x10000000U) /* PC Read/Write protection of Sector28 */
  545. #define OB_PCROP1_PAGES464TO479 (0x20000000U) /* PC Read/Write protection of Sector29 */
  546. #define OB_PCROP1_PAGES480TO495 (0x40000000U) /* PC Read/Write protection of Sector30 */
  547. #define OB_PCROP1_PAGES496TO511 (0x80000000U) /* PC Read/Write protection of Sector31 */
  548. #define OB_PCROP1_ALLPAGES (0xFFFFFFFFU) /*!< PC Read/Write protection of all Sectors */
  549. /**
  550. * @}
  551. */
  552. #endif /* STM32L151xBA || STM32L152xBA || STM32L151xC || STM32L152xC || STM32L162xC */
  553. #if defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC)
  554. /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection2 FLASHEx Option Bytes PC ReadWrite Protection 2
  555. * @{
  556. */
  557. /* Pages for Cat3, Cat4 & Cat5 devices*/
  558. #define OB_PCROP2_PAGES512TO527 (0x00000001U) /* PC Read/Write protection of Sector32 */
  559. #define OB_PCROP2_PAGES528TO543 (0x00000002U) /* PC Read/Write protection of Sector33 */
  560. #define OB_PCROP2_PAGES544TO559 (0x00000004U) /* PC Read/Write protection of Sector34 */
  561. #define OB_PCROP2_PAGES560TO575 (0x00000008U) /* PC Read/Write protection of Sector35 */
  562. #define OB_PCROP2_PAGES576TO591 (0x00000010U) /* PC Read/Write protection of Sector36 */
  563. #define OB_PCROP2_PAGES592TO607 (0x00000020U) /* PC Read/Write protection of Sector37 */
  564. #define OB_PCROP2_PAGES608TO623 (0x00000040U) /* PC Read/Write protection of Sector38 */
  565. #define OB_PCROP2_PAGES624TO639 (0x00000080U) /* PC Read/Write protection of Sector39 */
  566. #define OB_PCROP2_PAGES640TO655 (0x00000100U) /* PC Read/Write protection of Sector40 */
  567. #define OB_PCROP2_PAGES656TO671 (0x00000200U) /* PC Read/Write protection of Sector41 */
  568. #define OB_PCROP2_PAGES672TO687 (0x00000400U) /* PC Read/Write protection of Sector42 */
  569. #define OB_PCROP2_PAGES688TO703 (0x00000800U) /* PC Read/Write protection of Sector43 */
  570. #define OB_PCROP2_PAGES704TO719 (0x00001000U) /* PC Read/Write protection of Sector44 */
  571. #define OB_PCROP2_PAGES720TO735 (0x00002000U) /* PC Read/Write protection of Sector45 */
  572. #define OB_PCROP2_PAGES736TO751 (0x00004000U) /* PC Read/Write protection of Sector46 */
  573. #define OB_PCROP2_PAGES752TO767 (0x00008000U) /* PC Read/Write protection of Sector47 */
  574. #define OB_PCROP2_PAGES768TO783 (0x00010000U) /* PC Read/Write protection of Sector48 */
  575. #define OB_PCROP2_PAGES784TO799 (0x00020000U) /* PC Read/Write protection of Sector49 */
  576. #define OB_PCROP2_PAGES800TO815 (0x00040000U) /* PC Read/Write protection of Sector50 */
  577. #define OB_PCROP2_PAGES816TO831 (0x00080000U) /* PC Read/Write protection of Sector51 */
  578. #define OB_PCROP2_PAGES832TO847 (0x00100000U) /* PC Read/Write protection of Sector52 */
  579. #define OB_PCROP2_PAGES848TO863 (0x00200000U) /* PC Read/Write protection of Sector53 */
  580. #define OB_PCROP2_PAGES864TO879 (0x00400000U) /* PC Read/Write protection of Sector54 */
  581. #define OB_PCROP2_PAGES880TO895 (0x00800000U) /* PC Read/Write protection of Sector55 */
  582. #define OB_PCROP2_PAGES896TO911 (0x01000000U) /* PC Read/Write protection of Sector56 */
  583. #define OB_PCROP2_PAGES912TO927 (0x02000000U) /* PC Read/Write protection of Sector57 */
  584. #define OB_PCROP2_PAGES928TO943 (0x04000000U) /* PC Read/Write protection of Sector58 */
  585. #define OB_PCROP2_PAGES944TO959 (0x08000000U) /* PC Read/Write protection of Sector59 */
  586. #define OB_PCROP2_PAGES960TO975 (0x10000000U) /* PC Read/Write protection of Sector60 */
  587. #define OB_PCROP2_PAGES976TO991 (0x20000000U) /* PC Read/Write protection of Sector61 */
  588. #define OB_PCROP2_PAGES992TO1007 (0x40000000U) /* PC Read/Write protection of Sector62 */
  589. #define OB_PCROP2_PAGES1008TO1023 (0x80000000U) /* PC Read/Write protection of Sector63 */
  590. #define OB_PCROP2_ALLPAGES (0xFFFFFFFFU) /*!< PC Read/Write protection of all Sectors */
  591. /**
  592. * @}
  593. */
  594. #endif /* STM32L151xC || STM32L152xC || STM32L162xC */
  595. /** @defgroup FLASHEx_Type_Erase_Data FLASHEx Type Erase Data
  596. * @{
  597. */
  598. #define FLASH_TYPEERASEDATA_BYTE (0x00U) /*!<Erase byte (8-bit) at a specified address.*/
  599. #define FLASH_TYPEERASEDATA_HALFWORD (0x01U) /*!<Erase a half-word (16-bit) at a specified address.*/
  600. #define FLASH_TYPEERASEDATA_WORD (0x02U) /*!<Erase a word (32-bit) at a specified address.*/
  601. /**
  602. * @}
  603. */
  604. /** @defgroup FLASHEx_Type_Program_Data FLASHEx Type Program Data
  605. * @{
  606. */
  607. #define FLASH_TYPEPROGRAMDATA_BYTE (0x00U) /*!<Program byte (8-bit) at a specified address.*/
  608. #define FLASH_TYPEPROGRAMDATA_HALFWORD (0x01U) /*!<Program a half-word (16-bit) at a specified address.*/
  609. #define FLASH_TYPEPROGRAMDATA_WORD (0x02U) /*!<Program a word (32-bit) at a specified address.*/
  610. #define FLASH_TYPEPROGRAMDATA_FASTBYTE (0x04U) /*!<Fast Program byte (8-bit) at a specified address.*/
  611. #define FLASH_TYPEPROGRAMDATA_FASTHALFWORD (0x08U) /*!<Fast Program a half-word (16-bit) at a specified address.*/
  612. #define FLASH_TYPEPROGRAMDATA_FASTWORD (0x10U) /*!<Fast Program a word (32-bit) at a specified address.*/
  613. /**
  614. * @}
  615. */
  616. #if defined(FLASH_OBR_nRST_BFB2)
  617. /** @defgroup FLASHEx_Option_Bytes_BOOT FLASHEx Option Bytes BOOT
  618. * @{
  619. */
  620. #define OB_BOOT_BANK2 ((uint8_t)0x00U) /*!< At startup, if boot pins are set in boot from user Flash position
  621. and this parameter is selected the device will boot from Bank 2
  622. or Bank 1, depending on the activation of the bank */
  623. #define OB_BOOT_BANK1 ((uint8_t)(FLASH_OBR_nRST_BFB2 >> 16U)) /*!< At startup, if boot pins are set in boot from user Flash position
  624. and this parameter is selected the device will boot from Bank1(Default) */
  625. /**
  626. * @}
  627. */
  628. #endif /* FLASH_OBR_nRST_BFB2 */
  629. /**
  630. * @}
  631. */
  632. /* Exported macro ------------------------------------------------------------*/
  633. /** @defgroup FLASHEx_Exported_Macros FLASHEx Exported Macros
  634. * @{
  635. */
  636. /**
  637. * @brief Set the FLASH Latency.
  638. * @param __LATENCY__ FLASH Latency
  639. * This parameter can be one of the following values:
  640. * @arg @ref FLASH_LATENCY_0 FLASH Zero Latency cycle
  641. * @arg @ref FLASH_LATENCY_1 FLASH One Latency cycle
  642. * @retval none
  643. */
  644. #define __HAL_FLASH_SET_LATENCY(__LATENCY__) do { \
  645. if ((__LATENCY__) == FLASH_LATENCY_1) {__HAL_FLASH_ACC64_ENABLE();} \
  646. MODIFY_REG((FLASH->ACR), FLASH_ACR_LATENCY, (__LATENCY__)); \
  647. } while(0U)
  648. /**
  649. * @brief Get the FLASH Latency.
  650. * @retval FLASH Latency
  651. * This parameter can be one of the following values:
  652. * @arg @ref FLASH_LATENCY_0 FLASH Zero Latency cycle
  653. * @arg @ref FLASH_LATENCY_1 FLASH One Latency cycle
  654. */
  655. #define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))
  656. /**
  657. * @brief Enable the FLASH 64-bit access.
  658. * @note Read access 64 bit is used.
  659. * @note This bit cannot be written at the same time as the LATENCY and
  660. * PRFTEN bits.
  661. * @retval none
  662. */
  663. #define __HAL_FLASH_ACC64_ENABLE() (SET_BIT((FLASH->ACR), FLASH_ACR_ACC64))
  664. /**
  665. * @brief Disable the FLASH 64-bit access.
  666. * @note Read access 32 bit is used
  667. * @note To reset this bit, the LATENCY should be zero wait state and the
  668. * prefetch off.
  669. * @retval none
  670. */
  671. #define __HAL_FLASH_ACC64_DISABLE() (CLEAR_BIT((FLASH->ACR), FLASH_ACR_ACC64))
  672. /**
  673. * @brief Enable the FLASH prefetch buffer.
  674. * @retval none
  675. */
  676. #define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() do { __HAL_FLASH_ACC64_ENABLE(); \
  677. SET_BIT((FLASH->ACR), FLASH_ACR_PRFTEN); \
  678. } while(0U)
  679. /**
  680. * @brief Disable the FLASH prefetch buffer.
  681. * @retval none
  682. */
  683. #define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() CLEAR_BIT((FLASH->ACR), FLASH_ACR_PRFTEN)
  684. /**
  685. * @brief Enable the FLASH power down during Sleep mode
  686. * @retval none
  687. */
  688. #define __HAL_FLASH_SLEEP_POWERDOWN_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD)
  689. /**
  690. * @brief Disable the FLASH power down during Sleep mode
  691. * @retval none
  692. */
  693. #define __HAL_FLASH_SLEEP_POWERDOWN_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD)
  694. /**
  695. * @brief Enable the Flash Run power down mode.
  696. * @note Writing this bit to 0 this bit, automatically the keys are
  697. * loss and a new unlock sequence is necessary to re-write it to 1.
  698. */
  699. #define __HAL_FLASH_POWER_DOWN_ENABLE() do { FLASH->PDKEYR = FLASH_PDKEY1; \
  700. FLASH->PDKEYR = FLASH_PDKEY2; \
  701. SET_BIT((FLASH->ACR), FLASH_ACR_RUN_PD); \
  702. } while (0U)
  703. /**
  704. * @brief Disable the Flash Run power down mode.
  705. * @note Writing this bit to 0 this bit, automatically the keys are
  706. * loss and a new unlock sequence is necessary to re-write it to 1.
  707. */
  708. #define __HAL_FLASH_POWER_DOWN_DISABLE() do { FLASH->PDKEYR = FLASH_PDKEY1; \
  709. FLASH->PDKEYR = FLASH_PDKEY2; \
  710. CLEAR_BIT((FLASH->ACR), FLASH_ACR_RUN_PD); \
  711. } while (0U)
  712. /**
  713. * @}
  714. */
  715. /* Exported functions --------------------------------------------------------*/
  716. /** @addtogroup FLASHEx_Exported_Functions
  717. * @{
  718. */
  719. /** @addtogroup FLASHEx_Exported_Functions_Group1
  720. * @{
  721. */
  722. HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError);
  723. HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
  724. /**
  725. * @}
  726. */
  727. /** @addtogroup FLASHEx_Exported_Functions_Group2
  728. * @{
  729. */
  730. HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
  731. void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
  732. #if defined(FLASH_OBR_SPRMOD) || defined(FLASH_OBR_nRST_BFB2)
  733. HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
  734. void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
  735. #endif /* FLASH_OBR_SPRMOD || FLASH_OBR_nRST_BFB2 */
  736. #if defined(FLASH_OBR_SPRMOD)
  737. HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void);
  738. HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void);
  739. #endif /* FLASH_OBR_SPRMOD */
  740. /**
  741. * @}
  742. */
  743. /** @addtogroup FLASHEx_Exported_Functions_Group3
  744. * @{
  745. */
  746. HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Unlock(void);
  747. HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Lock(void);
  748. HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Erase(uint32_t TypeErase, uint32_t Address);
  749. HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Program(uint32_t TypeProgram, uint32_t Address, uint32_t Data);
  750. void HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram(void);
  751. void HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram(void);
  752. /**
  753. * @}
  754. */
  755. /**
  756. * @}
  757. */
  758. /**
  759. * @}
  760. */
  761. /**
  762. * @}
  763. */
  764. #ifdef __cplusplus
  765. }
  766. #endif
  767. #endif /* __STM32L1xx_HAL_FLASH_EX_H */
  768. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/