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Implement a secure ICS protocol targeting LoRa Node151 microcontroller for controlling irrigation.
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lora-irrigation/stm32/l151ccux/stm32l1xx_hal_pcd.h

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  1. /**

  2.   ******************************************************************************

  3.   * @file    stm32l1xx_hal_pcd.h

  4.   * @author  MCD Application Team

  5.   * @brief   Header file of PCD HAL module.

  6.   ******************************************************************************

  7.   * @attention

  8.   *

  9.   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.

  10.   * All rights reserved.</center></h2>

  11.   *

  12.   * This software component is licensed by ST under BSD 3-Clause license,

  13.   * the "License"; You may not use this file except in compliance with the

  14.   * License. You may obtain a copy of the License at:

  15.   *                        opensource.org/licenses/BSD-3-Clause

  16.   *

  17.   ******************************************************************************

  18.   */

  19. 

  20. /* Define to prevent recursive inclusion -------------------------------------*/

  21. #ifndef STM32L1xx_HAL_PCD_H

  22. #define STM32L1xx_HAL_PCD_H

  23. 

  24. #ifdef __cplusplus

  25. extern "C" {

  26. #endif

  27. 

  28. /* Includes ------------------------------------------------------------------*/

  29. #include "stm32l1xx_ll_usb.h"

  30. 

  31. #if defined (USB)

  32. 

  33. /** @addtogroup STM32L1xx_HAL_Driver

  34.   * @{

  35.   */

  36. 

  37. /** @addtogroup PCD

  38.   * @{

  39.   */

  40. 

  41. /* Exported types ------------------------------------------------------------*/

  42. /** @defgroup PCD_Exported_Types PCD Exported Types

  43.   * @{

  44.   */

  45. 

  46. /**

  47.   * @brief  PCD State structure definition

  48.   */

  49. typedef enum

  50. {

  51.   HAL_PCD_STATE_RESET   = 0x00,

  52.   HAL_PCD_STATE_READY   = 0x01,

  53.   HAL_PCD_STATE_ERROR   = 0x02,

  54.   HAL_PCD_STATE_BUSY    = 0x03,

  55.   HAL_PCD_STATE_TIMEOUT = 0x04

  56. } PCD_StateTypeDef;

  57. 

  58. /* Device LPM suspend state */

  59. typedef enum

  60. {

  61.   LPM_L0 = 0x00, /* on */

  62.   LPM_L1 = 0x01, /* LPM L1 sleep */

  63.   LPM_L2 = 0x02, /* suspend */

  64.   LPM_L3 = 0x03, /* off */

  65. } PCD_LPM_StateTypeDef;

  66. 

  67. typedef enum

  68. {

  69.   PCD_LPM_L0_ACTIVE = 0x00, /* on */

  70.   PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */

  71. } PCD_LPM_MsgTypeDef;

  72. 

  73. typedef enum

  74. {

  75.   PCD_BCD_ERROR                     = 0xFF,

  76.   PCD_BCD_CONTACT_DETECTION         = 0xFE,

  77.   PCD_BCD_STD_DOWNSTREAM_PORT       = 0xFD,

  78.   PCD_BCD_CHARGING_DOWNSTREAM_PORT  = 0xFC,

  79.   PCD_BCD_DEDICATED_CHARGING_PORT   = 0xFB,

  80.   PCD_BCD_DISCOVERY_COMPLETED       = 0x00,

  81. 

  82. } PCD_BCD_MsgTypeDef;

  83. 

  84. 

  85. 

  86. 

  87. 

  88. typedef USB_TypeDef        PCD_TypeDef;

  89. typedef USB_CfgTypeDef     PCD_InitTypeDef;

  90. typedef USB_EPTypeDef      PCD_EPTypeDef;

  91. 

  92. 

  93. /**

  94.   * @brief  PCD Handle Structure definition

  95.   */

  96. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)

  97. typedef struct __PCD_HandleTypeDef

  98. #else

  99. typedef struct

  100. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */

  101. {

  102.   PCD_TypeDef             *Instance;   /*!< Register base address              */

  103.   PCD_InitTypeDef         Init;        /*!< PCD required parameters            */

  104.   __IO uint8_t            USB_Address; /*!< USB Address                        */

  105.   PCD_EPTypeDef           IN_ep[8];   /*!< IN endpoint parameters             */

  106.   PCD_EPTypeDef           OUT_ep[8];  /*!< OUT endpoint parameters            */

  107.   HAL_LockTypeDef         Lock;        /*!< PCD peripheral status              */

  108.   __IO PCD_StateTypeDef   State;       /*!< PCD communication state            */

  109.   __IO  uint32_t          ErrorCode;   /*!< PCD Error code                     */

  110.   uint32_t                Setup[12];   /*!< Setup packet buffer                */

  111.   PCD_LPM_StateTypeDef    LPM_State;   /*!< LPM State                          */

  112.   uint32_t                BESL;

  113. 

  114.   void                    *pData;      /*!< Pointer to upper stack Handler */

  115. 

  116. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)

  117.   void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd);                              /*!< USB OTG PCD SOF callback                */

  118.   void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Setup Stage callback        */

  119.   void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd);                            /*!< USB OTG PCD Reset callback              */

  120.   void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Suspend callback            */

  121.   void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd);                           /*!< USB OTG PCD Resume callback             */

  122.   void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Connect callback            */

  123.   void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Disconnect callback         */

  124. 

  125.   void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);      /*!< USB OTG PCD Data OUT Stage callback     */

  126.   void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);       /*!< USB OTG PCD Data IN Stage callback      */

  127.   void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);  /*!< USB OTG PCD ISO OUT Incomplete callback */

  128.   void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);   /*!< USB OTG PCD ISO IN Incomplete callback  */

  129. 

  130.   void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Msp Init callback           */

  131.   void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd);                        /*!< USB OTG PCD Msp DeInit callback         */

  132. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */

  133. } PCD_HandleTypeDef;

  134. 

  135. /**

  136.   * @}

  137.   */

  138. 

  139. /* Include PCD HAL Extended module */

  140. #include "stm32l1xx_hal_pcd_ex.h"

  141. 

  142. /* Exported constants --------------------------------------------------------*/

  143. /** @defgroup PCD_Exported_Constants PCD Exported Constants

  144.   * @{

  145.   */

  146. 

  147. /** @defgroup PCD_Speed PCD Speed

  148.   * @{

  149.   */

  150. #define PCD_SPEED_FULL               2U

  151. /**

  152.   * @}

  153.   */

  154. 

  155. /** @defgroup PCD_PHY_Module PCD PHY Module

  156.   * @{

  157.   */

  158. #define PCD_PHY_ULPI                 1U

  159. #define PCD_PHY_EMBEDDED             2U

  160. #define PCD_PHY_UTMI                 3U

  161. /**

  162.   * @}

  163.   */

  164. 

  165. /** @defgroup PCD_Error_Code_definition PCD Error Code definition

  166.   * @brief  PCD Error Code definition

  167.   * @{

  168.   */

  169. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)

  170. #define  HAL_PCD_ERROR_INVALID_CALLBACK                        (0x00000010U)    /*!< Invalid Callback error  */

  171. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */

  172. 

  173. /**

  174.   * @}

  175.   */

  176. 

  177. /**

  178.   * @}

  179.   */

  180. 

  181. /* Exported macros -----------------------------------------------------------*/

  182. /** @defgroup PCD_Exported_Macros PCD Exported Macros

  183.  *  @brief macros to handle interrupts and specific clock configurations

  184.  * @{

  185.  */

  186. 

  187. 

  188. #define __HAL_PCD_ENABLE(__HANDLE__)                                  (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)

  189. #define __HAL_PCD_DISABLE(__HANDLE__)                                 (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)

  190. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__)                 ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))

  191. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)               (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))

  192. 

  193. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT()                             EXTI->IMR |= USB_WAKEUP_EXTI_LINE

  194. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT()                            EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)

  195. #define __HAL_USB_WAKEUP_EXTI_GET_FLAG()                              EXTI->PR & (USB_WAKEUP_EXTI_LINE)

  196. #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG()                            EXTI->PR = USB_WAKEUP_EXTI_LINE

  197. 

  198. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE()                 \

  199.                         do {                                        \

  200.                              EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \

  201.                              EXTI->RTSR |= USB_WAKEUP_EXTI_LINE;    \

  202.                            } while(0U)

  203. 

  204. 

  205. 

  206. /**

  207.   * @}

  208.   */

  209. 

  210. /* Exported functions --------------------------------------------------------*/

  211. /** @addtogroup PCD_Exported_Functions PCD Exported Functions

  212.   * @{

  213.   */

  214. 

  215. /* Initialization/de-initialization functions  ********************************/

  216. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions

  217.   * @{

  218.   */

  219. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);

  220. HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);

  221. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);

  222. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);

  223. 

  224. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)

  225. /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition

  226.   * @brief  HAL USB OTG PCD Callback ID enumeration definition

  227.   * @{

  228.   */

  229. typedef enum

  230. {

  231.   HAL_PCD_SOF_CB_ID          = 0x01,      /*!< USB PCD SOF callback ID          */

  232.   HAL_PCD_SETUPSTAGE_CB_ID   = 0x02,      /*!< USB PCD Setup Stage callback ID  */

  233.   HAL_PCD_RESET_CB_ID        = 0x03,      /*!< USB PCD Reset callback ID        */

  234.   HAL_PCD_SUSPEND_CB_ID      = 0x04,      /*!< USB PCD Suspend callback ID      */

  235.   HAL_PCD_RESUME_CB_ID       = 0x05,      /*!< USB PCD Resume callback ID       */

  236.   HAL_PCD_CONNECT_CB_ID      = 0x06,      /*!< USB PCD Connect callback ID      */

  237.   HAL_PCD_DISCONNECT_CB_ID  = 0x07,      /*!< USB PCD Disconnect callback ID   */

  238. 

  239.   HAL_PCD_MSPINIT_CB_ID      = 0x08,      /*!< USB PCD MspInit callback ID      */

  240.   HAL_PCD_MSPDEINIT_CB_ID    = 0x09       /*!< USB PCD MspDeInit callback ID    */

  241. 

  242. } HAL_PCD_CallbackIDTypeDef;

  243. /**

  244.   * @}

  245.   */

  246. 

  247. /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition

  248.   * @brief  HAL USB OTG PCD Callback pointer definition

  249.   * @{

  250.   */

  251. 

  252. typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd);                                   /*!< pointer to a common USB OTG PCD callback function  */

  253. typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD Data OUT Stage callback     */

  254. typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD Data IN Stage callback      */

  255. typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */

  256. typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD ISO IN Incomplete callback  */

  257. 

  258. /**

  259.   * @}

  260.   */

  261. 

  262. HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, pPCD_CallbackTypeDef pCallback);

  263. HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);

  264. 

  265. HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCallbackTypeDef pCallback);

  266. HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);

  267. 

  268. HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCallbackTypeDef pCallback);

  269. HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);

  270. 

  271. HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCallbackTypeDef pCallback);

  272. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);

  273. 

  274. HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCallbackTypeDef pCallback);

  275. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);

  276. 

  277. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */

  278. /**

  279.   * @}

  280.   */

  281. 

  282. /* I/O operation functions  ***************************************************/

  283. /* Non-Blocking mode: Interrupt */

  284. /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions

  285.   * @{

  286.   */

  287. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);

  288. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);

  289. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);

  290. 

  291. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);

  292. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);

  293. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);

  294. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);

  295. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);

  296. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);

  297. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);

  298. 

  299. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);

  300. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);

  301. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);

  302. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);

  303. /**

  304.   * @}

  305.   */

  306. 

  307. /* Peripheral Control functions  **********************************************/

  308. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions

  309.   * @{

  310.   */

  311. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);

  312. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);

  313. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);

  314. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);

  315. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);

  316. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);

  317. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);

  318. uint32_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);

  319. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);

  320. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);

  321. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);

  322. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);

  323. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);

  324. /**

  325.   * @}

  326.   */

  327. 

  328. /* Peripheral State functions  ************************************************/

  329. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions

  330.   * @{

  331.   */

  332. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);

  333. /**

  334.   * @}

  335.   */

  336. 

  337. /**

  338.   * @}

  339.   */

  340. 

  341. /* Private constants ---------------------------------------------------------*/

  342. /** @defgroup PCD_Private_Constants PCD Private Constants

  343.   * @{

  344.   */

  345. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt

  346.   * @{

  347.   */

  348. 

  349. 

  350. #define  USB_WAKEUP_EXTI_LINE                                         (0x1U << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */

  351. 

  352. 

  353. /**

  354.   * @}

  355.   */

  356. 

  357. /** @defgroup PCD_EP0_MPS PCD EP0 MPS

  358.   * @{

  359.   */

  360. #define PCD_EP0MPS_64                                                 DEP0CTL_MPS_64

  361. #define PCD_EP0MPS_32                                                 DEP0CTL_MPS_32

  362. #define PCD_EP0MPS_16                                                 DEP0CTL_MPS_16

  363. #define PCD_EP0MPS_08                                                 DEP0CTL_MPS_8

  364. /**

  365.   * @}

  366.   */

  367. 

  368. /** @defgroup PCD_ENDP PCD ENDP

  369.   * @{

  370.   */

  371. #define PCD_ENDP0                                                     0U

  372. #define PCD_ENDP1                                                     1U

  373. #define PCD_ENDP2                                                     2U

  374. #define PCD_ENDP3                                                     3U

  375. #define PCD_ENDP4                                                     4U

  376. #define PCD_ENDP5                                                     5U

  377. #define PCD_ENDP6                                                     6U

  378. #define PCD_ENDP7                                                     7U

  379. /**

  380.   * @}

  381.   */

  382. 

  383. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind

  384.   * @{

  385.   */

  386. #define PCD_SNG_BUF                                                   0U

  387. #define PCD_DBL_BUF                                                   1U

  388. /**

  389.   * @}

  390.   */

  391. 

  392. /**

  393.   * @}

  394.   */

  395. 

  396. /* Private macros ------------------------------------------------------------*/

  397. /** @defgroup PCD_Private_Macros PCD Private Macros

  398.  * @{

  399.  */

  400. 

  401. /********************  Bit definition for USB_COUNTn_RX register  *************/

  402. #define USB_CNTRX_NBLK_MSK                    (0x1FU << 10)

  403. #define USB_CNTRX_BLSIZE                      (0x1U << 15)

  404. 

  405. /* SetENDPOINT */

  406. #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue)  (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))

  407. 

  408. /* GetENDPOINT */

  409. #define PCD_GET_ENDPOINT(USBx, bEpNum)            (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))

  410. 

  411. /* ENDPOINT transfer */

  412. #define USB_EP0StartXfer                          USB_EPStartXfer

  413. 

  414. /**

  415.   * @brief  sets the type in the endpoint register(bits EP_TYPE[1:0])

  416.   * @param  USBx USB peripheral instance register address.

  417.   * @param  bEpNum Endpoint Number.

  418.   * @param  wType Endpoint Type.

  419.   * @retval None

  420.   */

  421. #define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), \

  422.                                              ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))

  423. 

  424. /**

  425.   * @brief  gets the type in the endpoint register(bits EP_TYPE[1:0])

  426.   * @param  USBx USB peripheral instance register address.

  427.   * @param  bEpNum Endpoint Number.

  428.   * @retval Endpoint Type

  429.   */

  430. #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)

  431. 

  432. /**

  433.   * @brief free buffer used from the application realizing it to the line

  434.   *         toggles bit SW_BUF in the double buffered endpoint register

  435.   * @param USBx USB device.

  436.   * @param   bEpNum, bDir

  437.   * @retval None

  438.   */

  439. #define PCD_FreeUserBuffer(USBx, bEpNum, bDir) do { \

  440.   if ((bDir) == 0U) \

  441.   { \

  442.     /* OUT double buffered endpoint */ \

  443.     PCD_TX_DTOG((USBx), (bEpNum)); \

  444.   } \

  445.   else if ((bDir) == 1U) \

  446.   { \

  447.     /* IN double buffered endpoint */ \

  448.     PCD_RX_DTOG((USBx), (bEpNum)); \

  449.   } \

  450. } while(0)

  451. 

  452. /**

  453.   * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).

  454.   * @param  USBx USB peripheral instance register address.

  455.   * @param  bEpNum Endpoint Number.

  456.   * @param  wState new state

  457.   * @retval None

  458.   */

  459. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) do { \

  460.    register uint16_t _wRegVal; \

  461.    \

  462.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \

  463.    /* toggle first bit ? */ \

  464.    if ((USB_EPTX_DTOG1 & (wState))!= 0U) \

  465.    { \

  466.       _wRegVal ^= USB_EPTX_DTOG1; \

  467.    } \

  468.    /* toggle second bit ?  */ \

  469.    if ((USB_EPTX_DTOG2 & (wState))!= 0U) \

  470.    { \

  471.       _wRegVal ^= USB_EPTX_DTOG2; \

  472.    } \

  473.    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \

  474.   } while(0) /* PCD_SET_EP_TX_STATUS */

  475. 

  476. /**

  477.   * @brief  sets the status for rx transfer (bits STAT_TX[1:0])

  478.   * @param  USBx USB peripheral instance register address.

  479.   * @param  bEpNum Endpoint Number.

  480.   * @param  wState new state

  481.   * @retval None

  482.   */

  483. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) do { \

  484.     register uint16_t _wRegVal; \

  485.     \

  486.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \

  487.     /* toggle first bit ? */ \

  488.     if ((USB_EPRX_DTOG1 & (wState))!= 0U) \

  489.     { \

  490.        _wRegVal ^= USB_EPRX_DTOG1; \

  491.     } \

  492.     /* toggle second bit ? */ \

  493.     if ((USB_EPRX_DTOG2 & (wState))!= 0U) \

  494.     { \

  495.        _wRegVal ^= USB_EPRX_DTOG2; \

  496.     } \

  497.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \

  498.   } while(0) /* PCD_SET_EP_RX_STATUS */

  499. 

  500. /**

  501.   * @brief  sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])

  502.   * @param  USBx USB peripheral instance register address.

  503.   * @param  bEpNum Endpoint Number.

  504.   * @param  wStaterx new state.

  505.   * @param  wStatetx new state.

  506.   * @retval None

  507.   */

  508. #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) do { \

  509.     register uint16_t _wRegVal; \

  510.     \

  511.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \

  512.     /* toggle first bit ? */ \

  513.     if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \

  514.     { \

  515.       _wRegVal ^= USB_EPRX_DTOG1; \

  516.     } \

  517.     /* toggle second bit ? */ \

  518.     if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \

  519.     { \

  520.       _wRegVal ^= USB_EPRX_DTOG2; \

  521.     } \

  522.     /* toggle first bit ? */ \

  523.     if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \

  524.     { \

  525.       _wRegVal ^= USB_EPTX_DTOG1; \

  526.     } \

  527.     /* toggle second bit ?  */ \

  528.     if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \

  529.     { \

  530.       _wRegVal ^= USB_EPTX_DTOG2; \

  531.     } \

  532.     \

  533.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \

  534.   } while(0) /* PCD_SET_EP_TXRX_STATUS */

  535. 

  536. /**

  537.   * @brief  gets the status for tx/rx transfer (bits STAT_TX[1:0]

  538.   *         /STAT_RX[1:0])

  539.   * @param  USBx USB peripheral instance register address.

  540.   * @param  bEpNum Endpoint Number.

  541.   * @retval status

  542.   */

  543. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)

  544. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)

  545. 

  546. /**

  547.   * @brief  sets directly the VALID tx/rx-status into the endpoint register

  548.   * @param  USBx USB peripheral instance register address.

  549.   * @param  bEpNum Endpoint Number.

  550.   * @retval None

  551.   */

  552. #define PCD_SET_EP_TX_VALID(USBx, bEpNum)      (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))

  553. #define PCD_SET_EP_RX_VALID(USBx, bEpNum)      (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))

  554. 

  555. /**

  556.   * @brief  checks stall condition in an endpoint.

  557.   * @param  USBx USB peripheral instance register address.

  558.   * @param  bEpNum Endpoint Number.

  559.   * @retval TRUE = endpoint in stall condition.

  560.   */

  561. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \

  562.                                    == USB_EP_TX_STALL)

  563. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \

  564.                                    == USB_EP_RX_STALL)

  565. 

  566. /**

  567.   * @brief  set & clear EP_KIND bit.

  568.   * @param  USBx USB peripheral instance register address.

  569.   * @param  bEpNum Endpoint Number.

  570.   * @retval None

  571.   */

  572. #define PCD_SET_EP_KIND(USBx, bEpNum) do { \

  573.     register uint16_t _wRegVal; \

  574.     \

  575.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \

  576.     \

  577.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \

  578.   } while(0) /* PCD_SET_EP_KIND */

  579. 

  580. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) do { \

  581.     register uint16_t _wRegVal; \

  582.     \

  583.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \

  584.     \

  585.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \

  586.   } while(0) /* PCD_CLEAR_EP_KIND */

  587. 

  588. /**

  589.   * @brief  Sets/clears directly STATUS_OUT bit in the endpoint register.

  590.   * @param  USBx USB peripheral instance register address.

  591.   * @param  bEpNum Endpoint Number.

  592.   * @retval None

  593.   */

  594. #define PCD_SET_OUT_STATUS(USBx, bEpNum)       PCD_SET_EP_KIND((USBx), (bEpNum))

  595. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum)     PCD_CLEAR_EP_KIND((USBx), (bEpNum))

  596. 

  597. /**

  598.   * @brief  Sets/clears directly EP_KIND bit in the endpoint register.

  599.   * @param  USBx USB peripheral instance register address.

  600.   * @param  bEpNum Endpoint Number.

  601.   * @retval None

  602.   */

  603. #define PCD_SET_EP_DBUF(USBx, bEpNum)          PCD_SET_EP_KIND((USBx), (bEpNum))

  604. #define PCD_CLEAR_EP_DBUF(USBx, bEpNum)        PCD_CLEAR_EP_KIND((USBx), (bEpNum))

  605. 

  606. /**

  607.   * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.

  608.   * @param  USBx USB peripheral instance register address.

  609.   * @param  bEpNum Endpoint Number.

  610.   * @retval None

  611.   */

  612. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) do { \

  613.     register uint16_t _wRegVal; \

  614.     \

  615.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \

  616.     \

  617.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \

  618.   } while(0) /* PCD_CLEAR_RX_EP_CTR */

  619. 

  620. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) do { \

  621.     register uint16_t _wRegVal; \

  622.     \

  623.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \

  624.     \

  625.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \

  626.   } while(0) /* PCD_CLEAR_TX_EP_CTR */

  627. 

  628. /**

  629.   * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.

  630.   * @param  USBx USB peripheral instance register address.

  631.   * @param  bEpNum Endpoint Number.

  632.   * @retval None

  633.   */

  634. #define PCD_RX_DTOG(USBx, bEpNum) do { \

  635.     register uint16_t _wEPVal; \

  636.     \

  637.     _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \

  638.     \

  639.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \

  640.   } while(0) /* PCD_RX_DTOG */

  641. 

  642. #define PCD_TX_DTOG(USBx, bEpNum) do { \

  643.     register uint16_t _wEPVal; \

  644.     \

  645.     _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \

  646.     \

  647.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \

  648.   } while(0) /* PCD_TX_DTOG */

  649. /**

  650.   * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.

  651.   * @param  USBx USB peripheral instance register address.

  652.   * @param  bEpNum Endpoint Number.

  653.   * @retval None

  654.   */

  655. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) do { \

  656.     register uint16_t _wRegVal; \

  657.     \

  658.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \

  659.     \

  660.     if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\

  661.     { \

  662.       PCD_RX_DTOG((USBx), (bEpNum)); \

  663.     } \

  664.   } while(0) /* PCD_CLEAR_RX_DTOG */

  665. 

  666. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) do { \

  667.     register uint16_t _wRegVal; \

  668.     \

  669.     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \

  670.     \

  671.     if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\

  672.     { \

  673.       PCD_TX_DTOG((USBx), (bEpNum)); \

  674.     } \

  675.   } while(0) /* PCD_CLEAR_TX_DTOG */

  676. 

  677. /**

  678.   * @brief  Sets address in an endpoint register.

  679.   * @param  USBx USB peripheral instance register address.

  680.   * @param  bEpNum Endpoint Number.

  681.   * @param  bAddr Address.

  682.   * @retval None

  683.   */

  684. #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) do { \

  685.     register uint16_t _wRegVal; \

  686.     \

  687.     _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \

  688.     \

  689.     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \

  690.   } while(0) /* PCD_SET_EP_ADDRESS */

  691. 

  692. /**

  693.   * @brief  Gets address in an endpoint register.

  694.   * @param  USBx USB peripheral instance register address.

  695.   * @param  bEpNum Endpoint Number.

  696.   * @retval None

  697.   */

  698. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))

  699. 

  700. #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))

  701. #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))

  702. 

  703. /**

  704.   * @brief  sets address of the tx/rx buffer.

  705.   * @param  USBx USB peripheral instance register address.

  706.   * @param  bEpNum Endpoint Number.

  707.   * @param  wAddr address to be set (must be word aligned).

  708.   * @retval None

  709.   */

  710. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) do { \

  711.   register uint16_t *_wRegVal; \

  712.   register uint32_t _wRegBase = (uint32_t)USBx; \

  713.   \

  714.   _wRegBase += (uint32_t)(USBx)->BTABLE; \

  715.   _wRegVal = (uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \

  716.   *_wRegVal = ((wAddr) >> 1) << 1; \

  717. } while(0) /* PCD_SET_EP_TX_ADDRESS */

  718. 

  719. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) do { \

  720.   register uint16_t *_wRegVal; \

  721.   register uint32_t _wRegBase = (uint32_t)USBx; \

  722.   \

  723.   _wRegBase += (uint32_t)(USBx)->BTABLE; \

  724.   _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \

  725.   *_wRegVal = ((wAddr) >> 1) << 1; \

  726. } while(0) /* PCD_SET_EP_RX_ADDRESS */

  727. 

  728. /**

  729.   * @brief  Gets address of the tx/rx buffer.

  730.   * @param  USBx USB peripheral instance register address.

  731.   * @param  bEpNum Endpoint Number.

  732.   * @retval address of the buffer.

  733.   */

  734. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))

  735. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))

  736. 

  737. /**

  738.   * @brief  Sets counter of rx buffer with no. of blocks.

  739.   * @param  pdwReg Register pointer

  740.   * @param  wCount Counter.

  741.   * @param  wNBlocks no. of Blocks.

  742.   * @retval None

  743.   */

  744. #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) do { \

  745.     (wNBlocks) = (wCount) >> 5; \

  746.     *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \

  747.   } while(0) /* PCD_CALC_BLK32 */

  748. 

  749. #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) do { \

  750.     (wNBlocks) = (wCount) >> 1; \

  751.     if (((wCount) & 0x1U) != 0U) \

  752.     { \

  753.       (wNBlocks)++; \

  754.     } \

  755.     *(pdwReg) = (uint16_t)((wNBlocks) << 10); \

  756.   } while(0) /* PCD_CALC_BLK2 */

  757. 

  758. #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount)  do { \

  759.     uint32_t wNBlocks; \

  760.     if ((wCount) == 0U) \

  761.     { \

  762.       *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \

  763.       *(pdwReg) |= USB_CNTRX_BLSIZE; \

  764.     } \

  765.     else if((wCount) < 62U) \

  766.     { \

  767.       PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \

  768.     } \

  769.     else \

  770.     { \

  771.       PCD_CALC_BLK32((pdwReg),(wCount), wNBlocks); \

  772.     } \

  773.   } while(0) /* PCD_SET_EP_CNT_RX_REG */

  774. 

  775. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) do { \

  776.      register uint32_t _wRegBase = (uint32_t)(USBx); \

  777.      uint16_t *pdwReg; \

  778.      \

  779.     _wRegBase += (uint32_t)(USBx)->BTABLE; \

  780.     pdwReg = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \

  781.     PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \

  782.   } while(0)

  783. 

  784. /**

  785.   * @brief  sets counter for the tx/rx buffer.

  786.   * @param  USBx USB peripheral instance register address.

  787.   * @param  bEpNum Endpoint Number.

  788.   * @param  wCount Counter value.

  789.   * @retval None

  790.   */

  791. #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) do { \

  792.     register uint32_t _wRegBase = (uint32_t)(USBx); \

  793.     uint16_t *_wRegVal; \

  794.     \

  795.     _wRegBase += (uint32_t)(USBx)->BTABLE; \

  796.     _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \

  797.     *_wRegVal = (uint16_t)(wCount); \

  798. } while(0)

  799. 

  800. #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) do { \

  801.     register uint32_t _wRegBase = (uint32_t)(USBx); \

  802.     uint16_t *_wRegVal; \

  803.     \

  804.     _wRegBase += (uint32_t)(USBx)->BTABLE; \

  805.     _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \

  806.     PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \

  807. } while(0)

  808. 

  809. /**

  810.   * @brief  gets counter of the tx buffer.

  811.   * @param  USBx USB peripheral instance register address.

  812.   * @param  bEpNum Endpoint Number.

  813.   * @retval Counter value

  814.   */

  815. #define PCD_GET_EP_TX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)

  816. #define PCD_GET_EP_RX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)

  817. 

  818. /**

  819.   * @brief  Sets buffer 0/1 address in a double buffer endpoint.

  820.   * @param  USBx USB peripheral instance register address.

  821.   * @param  bEpNum Endpoint Number.

  822.   * @param  wBuf0Addr buffer 0 address.

  823.   * @retval Counter value

  824.   */

  825. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) do { \

  826.     PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \

  827.   } while(0) /* PCD_SET_EP_DBUF0_ADDR */

  828. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) do { \

  829.     PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \

  830.   } while(0) /* PCD_SET_EP_DBUF1_ADDR */

  831. 

  832. /**

  833.   * @brief  Sets addresses in a double buffer endpoint.

  834.   * @param  USBx USB peripheral instance register address.

  835.   * @param  bEpNum Endpoint Number.

  836.   * @param  wBuf0Addr: buffer 0 address.

  837.   * @param  wBuf1Addr = buffer 1 address.

  838.   * @retval None

  839.   */

  840. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) do { \

  841.     PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \

  842.     PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \

  843.   } while(0) /* PCD_SET_EP_DBUF_ADDR */

  844. 

  845. /**

  846.   * @brief  Gets buffer 0/1 address of a double buffer endpoint.

  847.   * @param  USBx USB peripheral instance register address.

  848.   * @param  bEpNum Endpoint Number.

  849.   * @retval None

  850.   */

  851. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum)    (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))

  852. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum)    (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))

  853. 

  854. /**

  855.   * @brief  Gets buffer 0/1 address of a double buffer endpoint.

  856.   * @param  USBx USB peripheral instance register address.

  857.   * @param  bEpNum Endpoint Number.

  858.   * @param  bDir endpoint dir  EP_DBUF_OUT = OUT

  859.   *         EP_DBUF_IN  = IN

  860.   * @param  wCount: Counter value

  861.   * @retval None

  862.   */

  863. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) do { \

  864.     if ((bDir) == 0U) \

  865.       /* OUT endpoint */ \

  866.     { \

  867.       PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \

  868.     } \

  869.     else \

  870.     { \

  871.       if ((bDir) == 1U) \

  872.       { \

  873.         /* IN endpoint */ \

  874.         PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \

  875.       } \

  876.     } \

  877.   } while(0) /* SetEPDblBuf0Count*/

  878. 

  879. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) do { \

  880.     register uint32_t _wBase = (uint32_t)(USBx); \

  881.     uint16_t *_wEPRegVal; \

  882.     \

  883.     if ((bDir) == 0U) \

  884.     { \

  885.       /* OUT endpoint */ \

  886.       PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \

  887.     } \

  888.     else \

  889.     { \

  890.       if ((bDir) == 1U) \

  891.       { \

  892.         /* IN endpoint */ \

  893.         _wBase += (uint32_t)(USBx)->BTABLE; \

  894.         _wEPRegVal = (uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \

  895.         *_wEPRegVal = (uint16_t)(wCount); \

  896.       } \

  897.     } \

  898.   } while(0) /* SetEPDblBuf1Count */

  899. 

  900. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) do { \

  901.     PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \

  902.     PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \

  903.   } while(0) /* PCD_SET_EP_DBUF_CNT  */

  904. 

  905. /**

  906.   * @brief  Gets buffer 0/1 rx/tx counter for double buffering.

  907.   * @param  USBx USB peripheral instance register address.

  908.   * @param  bEpNum Endpoint Number.

  909.   * @retval None

  910.   */

  911. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum)     (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))

  912. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum)     (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))

  913. 

  914. 

  915. 

  916. /**

  917.   * @}

  918.   */

  919. 

  920. /**

  921.   * @}

  922.   */

  923. 

  924. /**

  925.   * @}

  926.   */

  927. #endif /* defined (USB) */

  928. 

  929. #ifdef __cplusplus

  930. }

  931. #endif

  932. 

  933. #endif /* STM32L1xx_HAL_PCD_H */

  934. 

  935. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/